Jason Wessel | 5cbad0e | 2008-02-20 13:33:40 -0600 | [diff] [blame] | 1 | /* |
| 2 | * ARM KGDB support |
| 3 | * |
| 4 | * Author: Deepak Saxena <dsaxena@mvista.com> |
| 5 | * |
| 6 | * Copyright (C) 2002 MontaVista Software Inc. |
| 7 | * |
| 8 | */ |
| 9 | |
| 10 | #ifndef __ARM_KGDB_H__ |
| 11 | #define __ARM_KGDB_H__ |
| 12 | |
| 13 | #include <linux/ptrace.h> |
| 14 | |
| 15 | /* |
| 16 | * GDB assumes that we're a user process being debugged, so |
| 17 | * it will send us an SWI command to write into memory as the |
| 18 | * debug trap. When an SWI occurs, the next instruction addr is |
| 19 | * placed into R14_svc before jumping to the vector trap. |
| 20 | * This doesn't work for kernel debugging as we are already in SVC |
| 21 | * we would loose the kernel's LR, which is a bad thing. This |
| 22 | * is bad thing. |
| 23 | * |
| 24 | * By doing this as an undefined instruction trap, we force a mode |
| 25 | * switch from SVC to UND mode, allowing us to save full kernel state. |
| 26 | * |
| 27 | * We also define a KGDB_COMPILED_BREAK which can be used to compile |
| 28 | * in breakpoints. This is important for things like sysrq-G and for |
| 29 | * the initial breakpoint from trap_init(). |
| 30 | * |
| 31 | * Note to ARM HW designers: Add real trap support like SH && PPC to |
| 32 | * make our lives much much simpler. :) |
| 33 | */ |
| 34 | #define BREAK_INSTR_SIZE 4 |
| 35 | #define GDB_BREAKINST 0xef9f0001 |
| 36 | #define KGDB_BREAKINST 0xe7ffdefe |
| 37 | #define KGDB_COMPILED_BREAK 0xe7ffdeff |
| 38 | #define CACHE_FLUSH_IS_SAFE 1 |
| 39 | |
| 40 | #ifndef __ASSEMBLY__ |
| 41 | |
| 42 | static inline void arch_kgdb_breakpoint(void) |
| 43 | { |
| 44 | asm(".word 0xe7ffdeff"); |
| 45 | } |
| 46 | |
| 47 | extern void kgdb_handle_bus_error(void); |
| 48 | extern int kgdb_fault_expected; |
| 49 | |
| 50 | #endif /* !__ASSEMBLY__ */ |
| 51 | |
| 52 | /* |
| 53 | * From Kevin Hilman: |
| 54 | * |
| 55 | * gdb is expecting the following registers layout. |
| 56 | * |
| 57 | * r0-r15: 1 long word each |
| 58 | * f0-f7: unused, 3 long words each !! |
| 59 | * fps: unused, 1 long word |
| 60 | * cpsr: 1 long word |
| 61 | * |
| 62 | * Even though f0-f7 and fps are not used, they need to be |
| 63 | * present in the registers sent for correct processing in |
| 64 | * the host-side gdb. |
| 65 | * |
| 66 | * In particular, it is crucial that CPSR is in the right place, |
| 67 | * otherwise gdb will not be able to correctly interpret stepping over |
| 68 | * conditional branches. |
| 69 | */ |
| 70 | #define _GP_REGS 16 |
| 71 | #define _FP_REGS 8 |
| 72 | #define _EXTRA_REGS 2 |
| 73 | #define GDB_MAX_REGS (_GP_REGS + (_FP_REGS * 3) + _EXTRA_REGS) |
| 74 | |
| 75 | #define KGDB_MAX_NO_CPUS 1 |
| 76 | #define BUFMAX 400 |
| 77 | #define NUMREGBYTES (GDB_MAX_REGS << 2) |
| 78 | #define NUMCRITREGBYTES (32 << 2) |
| 79 | |
| 80 | #define _R0 0 |
| 81 | #define _R1 1 |
| 82 | #define _R2 2 |
| 83 | #define _R3 3 |
| 84 | #define _R4 4 |
| 85 | #define _R5 5 |
| 86 | #define _R6 6 |
| 87 | #define _R7 7 |
| 88 | #define _R8 8 |
| 89 | #define _R9 9 |
| 90 | #define _R10 10 |
| 91 | #define _FP 11 |
| 92 | #define _IP 12 |
| 93 | #define _SPT 13 |
| 94 | #define _LR 14 |
| 95 | #define _PC 15 |
| 96 | #define _CPSR (GDB_MAX_REGS - 1) |
| 97 | |
| 98 | /* |
| 99 | * So that we can denote the end of a frame for tracing, |
| 100 | * in the simple case: |
| 101 | */ |
| 102 | #define CFI_END_FRAME(func) __CFI_END_FRAME(_PC, _SPT, func) |
| 103 | |
| 104 | #endif /* __ASM_KGDB_H__ */ |