Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 1 | /* |
| 2 | * cx18 ADEC audio functions |
| 3 | * |
| 4 | * Derived from cx25840-core.c |
| 5 | * |
| 6 | * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl> |
Andy Walls | 1ed9dcc | 2008-11-22 01:37:34 -0300 | [diff] [blame] | 7 | * Copyright (C) 2008 Andy Walls <awalls@radix.net> |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 8 | * |
| 9 | * This program is free software; you can redistribute it and/or |
| 10 | * modify it under the terms of the GNU General Public License |
| 11 | * as published by the Free Software Foundation; either version 2 |
| 12 | * of the License, or (at your option) any later version. |
| 13 | * |
| 14 | * This program is distributed in the hope that it will be useful, |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | * GNU General Public License for more details. |
| 18 | * |
| 19 | * You should have received a copy of the GNU General Public License |
| 20 | * along with this program; if not, write to the Free Software |
| 21 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA |
| 22 | * 02110-1301, USA. |
| 23 | */ |
| 24 | |
Andy Walls | 1a26704 | 2009-02-14 02:32:39 -0300 | [diff] [blame] | 25 | #include <media/v4l2-chip-ident.h> |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 26 | #include "cx18-driver.h" |
Andy Walls | b152642 | 2008-08-30 16:03:44 -0300 | [diff] [blame] | 27 | #include "cx18-io.h" |
Andy Walls | 1a26704 | 2009-02-14 02:32:39 -0300 | [diff] [blame] | 28 | #include "cx18-cards.h" |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 29 | |
| 30 | int cx18_av_write(struct cx18 *cx, u16 addr, u8 value) |
| 31 | { |
Andy Walls | b152642 | 2008-08-30 16:03:44 -0300 | [diff] [blame] | 32 | u32 reg = 0xc40000 + (addr & ~3); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 33 | u32 mask = 0xff; |
| 34 | int shift = (addr & 3) * 8; |
Andy Walls | b152642 | 2008-08-30 16:03:44 -0300 | [diff] [blame] | 35 | u32 x = cx18_read_reg(cx, reg); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 36 | |
| 37 | x = (x & ~(mask << shift)) | ((u32)value << shift); |
Andy Walls | b152642 | 2008-08-30 16:03:44 -0300 | [diff] [blame] | 38 | cx18_write_reg(cx, x, reg); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 39 | return 0; |
| 40 | } |
| 41 | |
Andy Walls | ced0737 | 2008-11-02 10:59:04 -0300 | [diff] [blame] | 42 | int cx18_av_write_expect(struct cx18 *cx, u16 addr, u8 value, u8 eval, u8 mask) |
| 43 | { |
| 44 | u32 reg = 0xc40000 + (addr & ~3); |
| 45 | int shift = (addr & 3) * 8; |
| 46 | u32 x = cx18_read_reg(cx, reg); |
| 47 | |
| 48 | x = (x & ~((u32)0xff << shift)) | ((u32)value << shift); |
| 49 | cx18_write_reg_expect(cx, x, reg, |
| 50 | ((u32)eval << shift), ((u32)mask << shift)); |
| 51 | return 0; |
| 52 | } |
| 53 | |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 54 | int cx18_av_write4(struct cx18 *cx, u16 addr, u32 value) |
| 55 | { |
Andy Walls | b152642 | 2008-08-30 16:03:44 -0300 | [diff] [blame] | 56 | cx18_write_reg(cx, value, 0xc40000 + addr); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 57 | return 0; |
| 58 | } |
| 59 | |
Andy Walls | ced0737 | 2008-11-02 10:59:04 -0300 | [diff] [blame] | 60 | int |
| 61 | cx18_av_write4_expect(struct cx18 *cx, u16 addr, u32 value, u32 eval, u32 mask) |
| 62 | { |
| 63 | cx18_write_reg_expect(cx, value, 0xc40000 + addr, eval, mask); |
| 64 | return 0; |
| 65 | } |
| 66 | |
Andy Walls | d267d85 | 2008-09-28 21:46:02 -0300 | [diff] [blame] | 67 | int cx18_av_write4_noretry(struct cx18 *cx, u16 addr, u32 value) |
| 68 | { |
| 69 | cx18_write_reg_noretry(cx, value, 0xc40000 + addr); |
| 70 | return 0; |
| 71 | } |
| 72 | |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 73 | u8 cx18_av_read(struct cx18 *cx, u16 addr) |
| 74 | { |
Andy Walls | b152642 | 2008-08-30 16:03:44 -0300 | [diff] [blame] | 75 | u32 x = cx18_read_reg(cx, 0xc40000 + (addr & ~3)); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 76 | int shift = (addr & 3) * 8; |
| 77 | |
| 78 | return (x >> shift) & 0xff; |
| 79 | } |
| 80 | |
| 81 | u32 cx18_av_read4(struct cx18 *cx, u16 addr) |
| 82 | { |
Andy Walls | b152642 | 2008-08-30 16:03:44 -0300 | [diff] [blame] | 83 | return cx18_read_reg(cx, 0xc40000 + addr); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 84 | } |
| 85 | |
| 86 | int cx18_av_and_or(struct cx18 *cx, u16 addr, unsigned and_mask, |
| 87 | u8 or_value) |
| 88 | { |
| 89 | return cx18_av_write(cx, addr, |
| 90 | (cx18_av_read(cx, addr) & and_mask) | |
| 91 | or_value); |
| 92 | } |
| 93 | |
| 94 | int cx18_av_and_or4(struct cx18 *cx, u16 addr, u32 and_mask, |
| 95 | u32 or_value) |
| 96 | { |
| 97 | return cx18_av_write4(cx, addr, |
| 98 | (cx18_av_read4(cx, addr) & and_mask) | |
| 99 | or_value); |
| 100 | } |
| 101 | |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 102 | static void cx18_av_initialize(struct cx18 *cx) |
| 103 | { |
Hans Verkuil | ca130ee | 2008-07-17 12:26:45 -0300 | [diff] [blame] | 104 | struct cx18_av_state *state = &cx->av_state; |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 105 | u32 v; |
| 106 | |
| 107 | cx18_av_loadfw(cx); |
| 108 | /* Stop 8051 code execution */ |
Andy Walls | ced0737 | 2008-11-02 10:59:04 -0300 | [diff] [blame] | 109 | cx18_av_write4_expect(cx, CXADEC_DL_CTL, 0x03000000, |
| 110 | 0x03000000, 0x13000000); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 111 | |
| 112 | /* initallize the PLL by toggling sleep bit */ |
| 113 | v = cx18_av_read4(cx, CXADEC_HOST_REG1); |
Andy Walls | ced0737 | 2008-11-02 10:59:04 -0300 | [diff] [blame] | 114 | /* enable sleep mode - register appears to be read only... */ |
| 115 | cx18_av_write4_expect(cx, CXADEC_HOST_REG1, v | 1, v, 0xfffe); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 116 | /* disable sleep mode */ |
Andy Walls | ced0737 | 2008-11-02 10:59:04 -0300 | [diff] [blame] | 117 | cx18_av_write4_expect(cx, CXADEC_HOST_REG1, v & 0xfffe, |
| 118 | v & 0xfffe, 0xffff); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 119 | |
| 120 | /* initialize DLLs */ |
| 121 | v = cx18_av_read4(cx, CXADEC_DLL1_DIAG_CTRL) & 0xE1FFFEFF; |
| 122 | /* disable FLD */ |
| 123 | cx18_av_write4(cx, CXADEC_DLL1_DIAG_CTRL, v); |
| 124 | /* enable FLD */ |
| 125 | cx18_av_write4(cx, CXADEC_DLL1_DIAG_CTRL, v | 0x10000100); |
| 126 | |
| 127 | v = cx18_av_read4(cx, CXADEC_DLL2_DIAG_CTRL) & 0xE1FFFEFF; |
| 128 | /* disable FLD */ |
| 129 | cx18_av_write4(cx, CXADEC_DLL2_DIAG_CTRL, v); |
| 130 | /* enable FLD */ |
| 131 | cx18_av_write4(cx, CXADEC_DLL2_DIAG_CTRL, v | 0x06000100); |
| 132 | |
| 133 | /* set analog bias currents. Set Vreg to 1.20V. */ |
| 134 | cx18_av_write4(cx, CXADEC_AFE_DIAG_CTRL1, 0x000A1802); |
| 135 | |
| 136 | v = cx18_av_read4(cx, CXADEC_AFE_DIAG_CTRL3) | 1; |
| 137 | /* enable TUNE_FIL_RST */ |
Andy Walls | ced0737 | 2008-11-02 10:59:04 -0300 | [diff] [blame] | 138 | cx18_av_write4_expect(cx, CXADEC_AFE_DIAG_CTRL3, v, v, 0x03009F0F); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 139 | /* disable TUNE_FIL_RST */ |
Andy Walls | ced0737 | 2008-11-02 10:59:04 -0300 | [diff] [blame] | 140 | cx18_av_write4_expect(cx, CXADEC_AFE_DIAG_CTRL3, |
| 141 | v & 0xFFFFFFFE, v & 0xFFFFFFFE, 0x03009F0F); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 142 | |
| 143 | /* enable 656 output */ |
| 144 | cx18_av_and_or4(cx, CXADEC_PIN_CTRL1, ~0, 0x040C00); |
| 145 | |
| 146 | /* video output drive strength */ |
| 147 | cx18_av_and_or4(cx, CXADEC_PIN_CTRL2, ~0, 0x2); |
| 148 | |
| 149 | /* reset video */ |
| 150 | cx18_av_write4(cx, CXADEC_SOFT_RST_CTRL, 0x8000); |
| 151 | cx18_av_write4(cx, CXADEC_SOFT_RST_CTRL, 0); |
| 152 | |
| 153 | /* set video to auto-detect */ |
| 154 | /* Clear bits 11-12 to enable slow locking mode. Set autodetect mode */ |
| 155 | /* set the comb notch = 1 */ |
| 156 | cx18_av_and_or4(cx, CXADEC_MODE_CTRL, 0xFFF7E7F0, 0x02040800); |
| 157 | |
| 158 | /* Enable wtw_en in CRUSH_CTRL (Set bit 22) */ |
| 159 | /* Enable maj_sel in CRUSH_CTRL (Set bit 20) */ |
| 160 | cx18_av_and_or4(cx, CXADEC_CRUSH_CTRL, ~0, 0x00500000); |
| 161 | |
| 162 | /* Set VGA_TRACK_RANGE to 0x20 */ |
| 163 | cx18_av_and_or4(cx, CXADEC_DFE_CTRL2, 0xFFFF00FF, 0x00002000); |
| 164 | |
Andy Walls | 302df97 | 2009-01-31 00:33:02 -0300 | [diff] [blame] | 165 | /* |
| 166 | * Initial VBI setup |
| 167 | * VIP-1.1, 10 bit mode, enable Raw, disable sliced, |
Andy Walls | 812b1f9 | 2009-02-08 22:40:04 -0300 | [diff] [blame] | 168 | * don't clamp raw samples when codes are in use, 1 byte user D-words, |
| 169 | * IDID0 has line #, RP code V bit transition on VBLANK, data during |
Andy Walls | 302df97 | 2009-01-31 00:33:02 -0300 | [diff] [blame] | 170 | * blanking intervals |
| 171 | */ |
Andy Walls | 812b1f9 | 2009-02-08 22:40:04 -0300 | [diff] [blame] | 172 | cx18_av_write4(cx, CXADEC_OUT_CTRL1, 0x4013252e); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 173 | |
| 174 | /* Set the video input. |
| 175 | The setting in MODE_CTRL gets lost when we do the above setup */ |
| 176 | /* EncSetSignalStd(dwDevNum, pEnc->dwSigStd); */ |
| 177 | /* EncSetVideoInput(dwDevNum, pEnc->VidIndSelection); */ |
| 178 | |
| 179 | v = cx18_av_read4(cx, CXADEC_AFE_CTRL); |
| 180 | v &= 0xFFFBFFFF; /* turn OFF bit 18 for droop_comp_ch1 */ |
| 181 | v &= 0xFFFF7FFF; /* turn OFF bit 9 for clamp_sel_ch1 */ |
| 182 | v &= 0xFFFFFFFE; /* turn OFF bit 0 for 12db_ch1 */ |
| 183 | /* v |= 0x00000001;*/ /* turn ON bit 0 for 12db_ch1 */ |
| 184 | cx18_av_write4(cx, CXADEC_AFE_CTRL, v); |
| 185 | |
| 186 | /* if(dwEnable && dw3DCombAvailable) { */ |
| 187 | /* CxDevWrReg(CXADEC_SRC_COMB_CFG, 0x7728021F); */ |
| 188 | /* } else { */ |
| 189 | /* CxDevWrReg(CXADEC_SRC_COMB_CFG, 0x6628021F); */ |
| 190 | /* } */ |
| 191 | cx18_av_write4(cx, CXADEC_SRC_COMB_CFG, 0x6628021F); |
Hans Verkuil | ca130ee | 2008-07-17 12:26:45 -0300 | [diff] [blame] | 192 | state->default_volume = 228 - cx18_av_read(cx, 0x8d4); |
| 193 | state->default_volume = ((state->default_volume / 2) + 23) << 9; |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 194 | } |
| 195 | |
Andy Walls | 1a26704 | 2009-02-14 02:32:39 -0300 | [diff] [blame] | 196 | static int cx18_av_reset(struct v4l2_subdev *sd, u32 val) |
| 197 | { |
| 198 | struct cx18 *cx = v4l2_get_subdevdata(sd); |
| 199 | |
| 200 | cx18_av_initialize(cx); |
| 201 | return 0; |
| 202 | } |
| 203 | |
Andy Walls | fa3e703 | 2009-02-16 02:23:25 -0300 | [diff] [blame] | 204 | static int cx18_av_init(struct v4l2_subdev *sd, u32 val) |
Andy Walls | 1a26704 | 2009-02-14 02:32:39 -0300 | [diff] [blame] | 205 | { |
Hans Verkuil | cc26b07 | 2009-03-29 19:20:26 -0300 | [diff] [blame] | 206 | struct cx18 *cx = v4l2_get_subdevdata(sd); |
| 207 | |
| 208 | /* |
| 209 | * The crystal freq used in calculations in this driver will be |
| 210 | * 28.636360 MHz. |
| 211 | * Aim to run the PLLs' VCOs near 400 MHz to minimze errors. |
| 212 | */ |
| 213 | |
| 214 | /* |
| 215 | * VDCLK Integer = 0x0f, Post Divider = 0x04 |
| 216 | * AIMCLK Integer = 0x0e, Post Divider = 0x16 |
| 217 | */ |
| 218 | cx18_av_write4(cx, CXADEC_PLL_CTRL1, 0x160e040f); |
| 219 | |
| 220 | /* VDCLK Fraction = 0x2be2fe */ |
| 221 | /* xtal * 0xf.15f17f0/4 = 108 MHz: 432 MHz before post divide */ |
| 222 | cx18_av_write4(cx, CXADEC_VID_PLL_FRAC, 0x002be2fe); |
| 223 | |
| 224 | /* AIMCLK Fraction = 0x05227ad */ |
| 225 | /* xtal * 0xe.2913d68/0x16 = 48000 * 384: 406 MHz pre post-div*/ |
| 226 | cx18_av_write4(cx, CXADEC_AUX_PLL_FRAC, 0x005227ad); |
| 227 | |
| 228 | /* SA_MCLK_SEL=1, SA_MCLK_DIV=0x16 */ |
| 229 | cx18_av_write(cx, CXADEC_I2S_MCLK, 0x56); |
| 230 | return 0; |
| 231 | } |
| 232 | |
| 233 | static int cx18_av_load_fw(struct v4l2_subdev *sd) |
| 234 | { |
Andy Walls | 1a26704 | 2009-02-14 02:32:39 -0300 | [diff] [blame] | 235 | struct cx18_av_state *state = to_cx18_av_state(sd); |
| 236 | struct cx18 *cx = v4l2_get_subdevdata(sd); |
| 237 | |
Hans Verkuil | cc26b07 | 2009-03-29 19:20:26 -0300 | [diff] [blame] | 238 | if (!state->is_initialized) { |
| 239 | /* initialize on first use */ |
| 240 | state->is_initialized = 1; |
| 241 | cx18_av_initialize(cx); |
Andy Walls | 1a26704 | 2009-02-14 02:32:39 -0300 | [diff] [blame] | 242 | } |
| 243 | return 0; |
| 244 | } |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 245 | |
Hans Verkuil | 03b52c3 | 2008-07-17 12:33:08 -0300 | [diff] [blame] | 246 | void cx18_av_std_setup(struct cx18 *cx) |
| 247 | { |
| 248 | struct cx18_av_state *state = &cx->av_state; |
Andy Walls | 6246d4e | 2009-02-21 22:27:37 -0300 | [diff] [blame] | 249 | struct v4l2_subdev *sd = &state->sd; |
Hans Verkuil | 03b52c3 | 2008-07-17 12:33:08 -0300 | [diff] [blame] | 250 | v4l2_std_id std = state->std; |
| 251 | int hblank, hactive, burst, vblank, vactive, sc; |
| 252 | int vblank656, src_decimation; |
| 253 | int luma_lpf, uv_lpf, comb; |
| 254 | u32 pll_int, pll_frac, pll_post; |
| 255 | |
| 256 | /* datasheet startup, step 8d */ |
| 257 | if (std & ~V4L2_STD_NTSC) |
| 258 | cx18_av_write(cx, 0x49f, 0x11); |
| 259 | else |
| 260 | cx18_av_write(cx, 0x49f, 0x14); |
| 261 | |
| 262 | if (std & V4L2_STD_625_50) { |
Andy Walls | 812b1f9 | 2009-02-08 22:40:04 -0300 | [diff] [blame] | 263 | /* FIXME - revisit these for Sliced VBI */ |
Hans Verkuil | 03b52c3 | 2008-07-17 12:33:08 -0300 | [diff] [blame] | 264 | hblank = 132; |
| 265 | hactive = 720; |
| 266 | burst = 93; |
| 267 | vblank = 36; |
| 268 | vactive = 580; |
| 269 | vblank656 = 40; |
| 270 | src_decimation = 0x21f; |
| 271 | |
| 272 | luma_lpf = 2; |
| 273 | if (std & V4L2_STD_PAL) { |
| 274 | uv_lpf = 1; |
| 275 | comb = 0x20; |
| 276 | sc = 688739; |
| 277 | } else if (std == V4L2_STD_PAL_Nc) { |
| 278 | uv_lpf = 1; |
| 279 | comb = 0x20; |
| 280 | sc = 556453; |
| 281 | } else { /* SECAM */ |
| 282 | uv_lpf = 0; |
| 283 | comb = 0; |
| 284 | sc = 672351; |
| 285 | } |
| 286 | } else { |
Andy Walls | 812b1f9 | 2009-02-08 22:40:04 -0300 | [diff] [blame] | 287 | /* |
| 288 | * The following relationships of half line counts should hold: |
| 289 | * 525 = vsync + vactive + vblank656 |
| 290 | * 12 = vblank656 - vblank |
| 291 | * |
| 292 | * vsync: always 6 half-lines of vsync pulses |
| 293 | * vactive: half lines of active video |
Andy Walls | af7c58b | 2009-02-28 20:13:50 -0300 | [diff] [blame] | 294 | * vblank656: half lines, after line 3/mid-266, of blanked video |
| 295 | * vblank: half lines, after line 9/272, of blanked video |
Andy Walls | 812b1f9 | 2009-02-08 22:40:04 -0300 | [diff] [blame] | 296 | * |
Andy Walls | af7c58b | 2009-02-28 20:13:50 -0300 | [diff] [blame] | 297 | * As far as I can tell: |
Andy Walls | 812b1f9 | 2009-02-08 22:40:04 -0300 | [diff] [blame] | 298 | * vblank656 starts counting from the falling edge of the first |
Andy Walls | af7c58b | 2009-02-28 20:13:50 -0300 | [diff] [blame] | 299 | * vsync pulse (start of line 4 or mid-266) |
Andy Walls | 812b1f9 | 2009-02-08 22:40:04 -0300 | [diff] [blame] | 300 | * vblank starts counting from the after the 6 vsync pulses and |
Andy Walls | af7c58b | 2009-02-28 20:13:50 -0300 | [diff] [blame] | 301 | * 6 or 5 equalization pulses (start of line 10 or 272) |
Andy Walls | 812b1f9 | 2009-02-08 22:40:04 -0300 | [diff] [blame] | 302 | * |
| 303 | * For 525 line systems the driver will extract VBI information |
Andy Walls | af7c58b | 2009-02-28 20:13:50 -0300 | [diff] [blame] | 304 | * from lines 10-21 and lines 273-284. |
Andy Walls | 812b1f9 | 2009-02-08 22:40:04 -0300 | [diff] [blame] | 305 | */ |
Andy Walls | af7c58b | 2009-02-28 20:13:50 -0300 | [diff] [blame] | 306 | vblank656 = 38; /* lines 4 - 22 & 266 - 284 */ |
| 307 | vblank = 26; /* lines 10 - 22 & 272 - 284 */ |
| 308 | vactive = 481; /* lines 23 - 263 & 285 - 525 */ |
Andy Walls | 812b1f9 | 2009-02-08 22:40:04 -0300 | [diff] [blame] | 309 | |
Andy Walls | af7c58b | 2009-02-28 20:13:50 -0300 | [diff] [blame] | 310 | /* |
| 311 | * For a 13.5 Mpps clock and 15,734.26 Hz line rate, a line is |
| 312 | * is 858 pixels = 720 active + 138 blanking. The Hsync leading |
| 313 | * edge should happen 1.2 us * 13.5 Mpps ~= 16 pixels after the |
| 314 | * end of active video, leaving 122 pixels of hblank to ignore |
| 315 | * before active video starts. |
| 316 | */ |
Hans Verkuil | 03b52c3 | 2008-07-17 12:33:08 -0300 | [diff] [blame] | 317 | hactive = 720; |
| 318 | hblank = 122; |
Hans Verkuil | 03b52c3 | 2008-07-17 12:33:08 -0300 | [diff] [blame] | 319 | luma_lpf = 1; |
| 320 | uv_lpf = 1; |
Hans Verkuil | 03b52c3 | 2008-07-17 12:33:08 -0300 | [diff] [blame] | 321 | |
| 322 | src_decimation = 0x21f; |
| 323 | if (std == V4L2_STD_PAL_60) { |
| 324 | burst = 0x5b; |
| 325 | luma_lpf = 2; |
| 326 | comb = 0x20; |
| 327 | sc = 688739; |
| 328 | } else if (std == V4L2_STD_PAL_M) { |
| 329 | burst = 0x61; |
| 330 | comb = 0x20; |
| 331 | sc = 555452; |
| 332 | } else { |
| 333 | burst = 0x5b; |
| 334 | comb = 0x66; |
| 335 | sc = 556063; |
| 336 | } |
| 337 | } |
| 338 | |
| 339 | /* DEBUG: Displays configured PLL frequency */ |
| 340 | pll_int = cx18_av_read(cx, 0x108); |
| 341 | pll_frac = cx18_av_read4(cx, 0x10c) & 0x1ffffff; |
| 342 | pll_post = cx18_av_read(cx, 0x109); |
Andy Walls | 6246d4e | 2009-02-21 22:27:37 -0300 | [diff] [blame] | 343 | CX18_DEBUG_INFO_DEV(sd, "PLL regs = int: %u, frac: %u, post: %u\n", |
| 344 | pll_int, pll_frac, pll_post); |
Hans Verkuil | 03b52c3 | 2008-07-17 12:33:08 -0300 | [diff] [blame] | 345 | |
| 346 | if (pll_post) { |
Andy Walls | f416734 | 2008-11-02 18:54:10 -0300 | [diff] [blame] | 347 | int fin, fsc, pll; |
Hans Verkuil | 03b52c3 | 2008-07-17 12:33:08 -0300 | [diff] [blame] | 348 | |
Andy Walls | 55d81aa | 2008-12-20 23:48:57 -0300 | [diff] [blame] | 349 | pll = (28636360L * ((((u64)pll_int) << 25) + pll_frac)) >> 25; |
Hans Verkuil | 03b52c3 | 2008-07-17 12:33:08 -0300 | [diff] [blame] | 350 | pll /= pll_post; |
Andy Walls | 6246d4e | 2009-02-21 22:27:37 -0300 | [diff] [blame] | 351 | CX18_DEBUG_INFO_DEV(sd, "PLL = %d.%06d MHz\n", |
| 352 | pll / 1000000, pll % 1000000); |
| 353 | CX18_DEBUG_INFO_DEV(sd, "PLL/8 = %d.%06d MHz\n", |
| 354 | pll / 8000000, (pll / 8) % 1000000); |
Hans Verkuil | 03b52c3 | 2008-07-17 12:33:08 -0300 | [diff] [blame] | 355 | |
| 356 | fin = ((u64)src_decimation * pll) >> 12; |
Andy Walls | 6246d4e | 2009-02-21 22:27:37 -0300 | [diff] [blame] | 357 | CX18_DEBUG_INFO_DEV(sd, "ADC Sampling freq = %d.%06d MHz\n", |
| 358 | fin / 1000000, fin % 1000000); |
Hans Verkuil | 03b52c3 | 2008-07-17 12:33:08 -0300 | [diff] [blame] | 359 | |
| 360 | fsc = (((u64)sc) * pll) >> 24L; |
Andy Walls | 6246d4e | 2009-02-21 22:27:37 -0300 | [diff] [blame] | 361 | CX18_DEBUG_INFO_DEV(sd, |
| 362 | "Chroma sub-carrier freq = %d.%06d MHz\n", |
| 363 | fsc / 1000000, fsc % 1000000); |
Hans Verkuil | 03b52c3 | 2008-07-17 12:33:08 -0300 | [diff] [blame] | 364 | |
Andy Walls | 6246d4e | 2009-02-21 22:27:37 -0300 | [diff] [blame] | 365 | CX18_DEBUG_INFO_DEV(sd, "hblank %i, hactive %i, vblank %i, " |
| 366 | "vactive %i, vblank656 %i, src_dec %i, " |
| 367 | "burst 0x%02x, luma_lpf %i, uv_lpf %i, " |
| 368 | "comb 0x%02x, sc 0x%06x\n", |
| 369 | hblank, hactive, vblank, vactive, vblank656, |
| 370 | src_decimation, burst, luma_lpf, uv_lpf, |
| 371 | comb, sc); |
Hans Verkuil | 03b52c3 | 2008-07-17 12:33:08 -0300 | [diff] [blame] | 372 | } |
| 373 | |
| 374 | /* Sets horizontal blanking delay and active lines */ |
| 375 | cx18_av_write(cx, 0x470, hblank); |
| 376 | cx18_av_write(cx, 0x471, 0xff & (((hblank >> 8) & 0x3) | |
| 377 | (hactive << 4))); |
| 378 | cx18_av_write(cx, 0x472, hactive >> 4); |
| 379 | |
| 380 | /* Sets burst gate delay */ |
| 381 | cx18_av_write(cx, 0x473, burst); |
| 382 | |
| 383 | /* Sets vertical blanking delay and active duration */ |
| 384 | cx18_av_write(cx, 0x474, vblank); |
| 385 | cx18_av_write(cx, 0x475, 0xff & (((vblank >> 8) & 0x3) | |
| 386 | (vactive << 4))); |
| 387 | cx18_av_write(cx, 0x476, vactive >> 4); |
| 388 | cx18_av_write(cx, 0x477, vblank656); |
| 389 | |
| 390 | /* Sets src decimation rate */ |
| 391 | cx18_av_write(cx, 0x478, 0xff & src_decimation); |
| 392 | cx18_av_write(cx, 0x479, 0xff & (src_decimation >> 8)); |
| 393 | |
| 394 | /* Sets Luma and UV Low pass filters */ |
| 395 | cx18_av_write(cx, 0x47a, luma_lpf << 6 | ((uv_lpf << 4) & 0x30)); |
| 396 | |
| 397 | /* Enables comb filters */ |
| 398 | cx18_av_write(cx, 0x47b, comb); |
| 399 | |
| 400 | /* Sets SC Step*/ |
| 401 | cx18_av_write(cx, 0x47c, sc); |
| 402 | cx18_av_write(cx, 0x47d, 0xff & sc >> 8); |
| 403 | cx18_av_write(cx, 0x47e, 0xff & sc >> 16); |
| 404 | |
Hans Verkuil | 03b52c3 | 2008-07-17 12:33:08 -0300 | [diff] [blame] | 405 | if (std & V4L2_STD_625_50) { |
Andy Walls | 812b1f9 | 2009-02-08 22:40:04 -0300 | [diff] [blame] | 406 | state->slicer_line_delay = 1; |
| 407 | state->slicer_line_offset = (6 + state->slicer_line_delay - 2); |
Hans Verkuil | 03b52c3 | 2008-07-17 12:33:08 -0300 | [diff] [blame] | 408 | } else { |
Andy Walls | 812b1f9 | 2009-02-08 22:40:04 -0300 | [diff] [blame] | 409 | state->slicer_line_delay = 0; |
| 410 | state->slicer_line_offset = (10 + state->slicer_line_delay - 2); |
Hans Verkuil | 03b52c3 | 2008-07-17 12:33:08 -0300 | [diff] [blame] | 411 | } |
Andy Walls | 812b1f9 | 2009-02-08 22:40:04 -0300 | [diff] [blame] | 412 | cx18_av_write(cx, 0x47f, state->slicer_line_delay); |
Hans Verkuil | 03b52c3 | 2008-07-17 12:33:08 -0300 | [diff] [blame] | 413 | } |
| 414 | |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 415 | static void input_change(struct cx18 *cx) |
| 416 | { |
| 417 | struct cx18_av_state *state = &cx->av_state; |
| 418 | v4l2_std_id std = state->std; |
Andy Walls | ced0737 | 2008-11-02 10:59:04 -0300 | [diff] [blame] | 419 | u8 v; |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 420 | |
| 421 | /* Follow step 8c and 8d of section 3.16 in the cx18_av datasheet */ |
Hans Verkuil | c173890 | 2008-06-27 15:33:02 -0300 | [diff] [blame] | 422 | cx18_av_write(cx, 0x49f, (std & V4L2_STD_NTSC) ? 0x14 : 0x11); |
| 423 | cx18_av_and_or(cx, 0x401, ~0x60, 0); |
| 424 | cx18_av_and_or(cx, 0x401, ~0x60, 0x60); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 425 | |
| 426 | if (std & V4L2_STD_525_60) { |
| 427 | if (std == V4L2_STD_NTSC_M_JP) { |
| 428 | /* Japan uses EIAJ audio standard */ |
Andy Walls | ced0737 | 2008-11-02 10:59:04 -0300 | [diff] [blame] | 429 | cx18_av_write_expect(cx, 0x808, 0xf7, 0xf7, 0xff); |
| 430 | cx18_av_write_expect(cx, 0x80b, 0x02, 0x02, 0x3f); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 431 | } else if (std == V4L2_STD_NTSC_M_KR) { |
| 432 | /* South Korea uses A2 audio standard */ |
Andy Walls | ced0737 | 2008-11-02 10:59:04 -0300 | [diff] [blame] | 433 | cx18_av_write_expect(cx, 0x808, 0xf8, 0xf8, 0xff); |
| 434 | cx18_av_write_expect(cx, 0x80b, 0x03, 0x03, 0x3f); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 435 | } else { |
| 436 | /* Others use the BTSC audio standard */ |
Andy Walls | ced0737 | 2008-11-02 10:59:04 -0300 | [diff] [blame] | 437 | cx18_av_write_expect(cx, 0x808, 0xf6, 0xf6, 0xff); |
| 438 | cx18_av_write_expect(cx, 0x80b, 0x01, 0x01, 0x3f); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 439 | } |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 440 | } else if (std & V4L2_STD_PAL) { |
| 441 | /* Follow tuner change procedure for PAL */ |
Andy Walls | ced0737 | 2008-11-02 10:59:04 -0300 | [diff] [blame] | 442 | cx18_av_write_expect(cx, 0x808, 0xff, 0xff, 0xff); |
| 443 | cx18_av_write_expect(cx, 0x80b, 0x03, 0x03, 0x3f); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 444 | } else if (std & V4L2_STD_SECAM) { |
| 445 | /* Select autodetect for SECAM */ |
Andy Walls | ced0737 | 2008-11-02 10:59:04 -0300 | [diff] [blame] | 446 | cx18_av_write_expect(cx, 0x808, 0xff, 0xff, 0xff); |
| 447 | cx18_av_write_expect(cx, 0x80b, 0x03, 0x03, 0x3f); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 448 | } |
| 449 | |
Andy Walls | ced0737 | 2008-11-02 10:59:04 -0300 | [diff] [blame] | 450 | v = cx18_av_read(cx, 0x803); |
| 451 | if (v & 0x10) { |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 452 | /* restart audio decoder microcontroller */ |
Andy Walls | ced0737 | 2008-11-02 10:59:04 -0300 | [diff] [blame] | 453 | v &= ~0x10; |
| 454 | cx18_av_write_expect(cx, 0x803, v, v, 0x1f); |
| 455 | v |= 0x10; |
| 456 | cx18_av_write_expect(cx, 0x803, v, v, 0x1f); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 457 | } |
| 458 | } |
| 459 | |
Andy Walls | 1a26704 | 2009-02-14 02:32:39 -0300 | [diff] [blame] | 460 | static int cx18_av_s_frequency(struct v4l2_subdev *sd, |
| 461 | struct v4l2_frequency *freq) |
| 462 | { |
| 463 | struct cx18 *cx = v4l2_get_subdevdata(sd); |
| 464 | input_change(cx); |
| 465 | return 0; |
| 466 | } |
| 467 | |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 468 | static int set_input(struct cx18 *cx, enum cx18_av_video_input vid_input, |
| 469 | enum cx18_av_audio_input aud_input) |
| 470 | { |
| 471 | struct cx18_av_state *state = &cx->av_state; |
Andy Walls | 6246d4e | 2009-02-21 22:27:37 -0300 | [diff] [blame] | 472 | struct v4l2_subdev *sd = &state->sd; |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 473 | u8 is_composite = (vid_input >= CX18_AV_COMPOSITE1 && |
| 474 | vid_input <= CX18_AV_COMPOSITE8); |
| 475 | u8 reg; |
Andy Walls | ced0737 | 2008-11-02 10:59:04 -0300 | [diff] [blame] | 476 | u8 v; |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 477 | |
Andy Walls | 6246d4e | 2009-02-21 22:27:37 -0300 | [diff] [blame] | 478 | CX18_DEBUG_INFO_DEV(sd, "decoder set video input %d, audio input %d\n", |
| 479 | vid_input, aud_input); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 480 | |
| 481 | if (is_composite) { |
| 482 | reg = 0xf0 + (vid_input - CX18_AV_COMPOSITE1); |
| 483 | } else { |
| 484 | int luma = vid_input & 0xf0; |
| 485 | int chroma = vid_input & 0xf00; |
| 486 | |
| 487 | if ((vid_input & ~0xff0) || |
| 488 | luma < CX18_AV_SVIDEO_LUMA1 || |
Hans Verkuil | 45270a1 | 2008-06-07 11:18:17 -0300 | [diff] [blame] | 489 | luma > CX18_AV_SVIDEO_LUMA8 || |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 490 | chroma < CX18_AV_SVIDEO_CHROMA4 || |
| 491 | chroma > CX18_AV_SVIDEO_CHROMA8) { |
Andy Walls | 6246d4e | 2009-02-21 22:27:37 -0300 | [diff] [blame] | 492 | CX18_ERR_DEV(sd, "0x%04x is not a valid video input!\n", |
| 493 | vid_input); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 494 | return -EINVAL; |
| 495 | } |
| 496 | reg = 0xf0 + ((luma - CX18_AV_SVIDEO_LUMA1) >> 4); |
| 497 | if (chroma >= CX18_AV_SVIDEO_CHROMA7) { |
| 498 | reg &= 0x3f; |
| 499 | reg |= (chroma - CX18_AV_SVIDEO_CHROMA7) >> 2; |
| 500 | } else { |
| 501 | reg &= 0xcf; |
| 502 | reg |= (chroma - CX18_AV_SVIDEO_CHROMA4) >> 4; |
| 503 | } |
| 504 | } |
| 505 | |
| 506 | switch (aud_input) { |
Hans Verkuil | 81cb727d | 2008-06-28 12:49:20 -0300 | [diff] [blame] | 507 | case CX18_AV_AUDIO_SERIAL1: |
| 508 | case CX18_AV_AUDIO_SERIAL2: |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 509 | /* do nothing, use serial audio input */ |
| 510 | break; |
| 511 | case CX18_AV_AUDIO4: reg &= ~0x30; break; |
| 512 | case CX18_AV_AUDIO5: reg &= ~0x30; reg |= 0x10; break; |
| 513 | case CX18_AV_AUDIO6: reg &= ~0x30; reg |= 0x20; break; |
| 514 | case CX18_AV_AUDIO7: reg &= ~0xc0; break; |
| 515 | case CX18_AV_AUDIO8: reg &= ~0xc0; reg |= 0x40; break; |
| 516 | |
| 517 | default: |
Andy Walls | 6246d4e | 2009-02-21 22:27:37 -0300 | [diff] [blame] | 518 | CX18_ERR_DEV(sd, "0x%04x is not a valid audio input!\n", |
| 519 | aud_input); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 520 | return -EINVAL; |
| 521 | } |
| 522 | |
Andy Walls | ced0737 | 2008-11-02 10:59:04 -0300 | [diff] [blame] | 523 | cx18_av_write_expect(cx, 0x103, reg, reg, 0xf7); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 524 | /* Set INPUT_MODE to Composite (0) or S-Video (1) */ |
Hans Verkuil | c173890 | 2008-06-27 15:33:02 -0300 | [diff] [blame] | 525 | cx18_av_and_or(cx, 0x401, ~0x6, is_composite ? 0 : 0x02); |
Andy Walls | ced0737 | 2008-11-02 10:59:04 -0300 | [diff] [blame] | 526 | |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 527 | /* Set CH_SEL_ADC2 to 1 if input comes from CH3 */ |
Andy Walls | ced0737 | 2008-11-02 10:59:04 -0300 | [diff] [blame] | 528 | v = cx18_av_read(cx, 0x102); |
| 529 | if (reg & 0x80) |
| 530 | v &= ~0x2; |
| 531 | else |
| 532 | v |= 0x2; |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 533 | /* Set DUAL_MODE_ADC2 to 1 if input comes from both CH2 and CH3 */ |
| 534 | if ((reg & 0xc0) != 0xc0 && (reg & 0x30) != 0x30) |
Andy Walls | ced0737 | 2008-11-02 10:59:04 -0300 | [diff] [blame] | 535 | v |= 0x4; |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 536 | else |
Andy Walls | ced0737 | 2008-11-02 10:59:04 -0300 | [diff] [blame] | 537 | v &= ~0x4; |
| 538 | cx18_av_write_expect(cx, 0x102, v, v, 0x17); |
| 539 | |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 540 | /*cx18_av_and_or4(cx, 0x104, ~0x001b4180, 0x00004180);*/ |
| 541 | |
| 542 | state->vid_input = vid_input; |
| 543 | state->aud_input = aud_input; |
| 544 | cx18_av_audio_set_path(cx); |
| 545 | input_change(cx); |
| 546 | return 0; |
| 547 | } |
| 548 | |
Andy Walls | 1a26704 | 2009-02-14 02:32:39 -0300 | [diff] [blame] | 549 | static int cx18_av_s_video_routing(struct v4l2_subdev *sd, |
| 550 | const struct v4l2_routing *route) |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 551 | { |
Andy Walls | 1a26704 | 2009-02-14 02:32:39 -0300 | [diff] [blame] | 552 | struct cx18_av_state *state = to_cx18_av_state(sd); |
| 553 | struct cx18 *cx = v4l2_get_subdevdata(sd); |
| 554 | return set_input(cx, route->input, state->aud_input); |
| 555 | } |
| 556 | |
| 557 | static int cx18_av_s_audio_routing(struct v4l2_subdev *sd, |
| 558 | const struct v4l2_routing *route) |
| 559 | { |
| 560 | struct cx18_av_state *state = to_cx18_av_state(sd); |
| 561 | struct cx18 *cx = v4l2_get_subdevdata(sd); |
| 562 | return set_input(cx, state->vid_input, route->input); |
| 563 | } |
| 564 | |
| 565 | static int cx18_av_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt) |
| 566 | { |
| 567 | struct cx18_av_state *state = to_cx18_av_state(sd); |
| 568 | struct cx18 *cx = v4l2_get_subdevdata(sd); |
| 569 | u8 vpres; |
| 570 | u8 mode; |
| 571 | int val = 0; |
| 572 | |
| 573 | if (state->radio) |
| 574 | return 0; |
| 575 | |
| 576 | vpres = cx18_av_read(cx, 0x40e) & 0x20; |
| 577 | vt->signal = vpres ? 0xffff : 0x0; |
| 578 | |
| 579 | vt->capability |= |
| 580 | V4L2_TUNER_CAP_STEREO | V4L2_TUNER_CAP_LANG1 | |
| 581 | V4L2_TUNER_CAP_LANG2 | V4L2_TUNER_CAP_SAP; |
| 582 | |
| 583 | mode = cx18_av_read(cx, 0x804); |
| 584 | |
| 585 | /* get rxsubchans and audmode */ |
| 586 | if ((mode & 0xf) == 1) |
| 587 | val |= V4L2_TUNER_SUB_STEREO; |
| 588 | else |
| 589 | val |= V4L2_TUNER_SUB_MONO; |
| 590 | |
| 591 | if (mode == 2 || mode == 4) |
| 592 | val = V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2; |
| 593 | |
| 594 | if (mode & 0x10) |
| 595 | val |= V4L2_TUNER_SUB_SAP; |
| 596 | |
| 597 | vt->rxsubchans = val; |
| 598 | vt->audmode = state->audmode; |
| 599 | return 0; |
| 600 | } |
| 601 | |
| 602 | static int cx18_av_s_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt) |
| 603 | { |
| 604 | struct cx18_av_state *state = to_cx18_av_state(sd); |
| 605 | struct cx18 *cx = v4l2_get_subdevdata(sd); |
| 606 | u8 v; |
| 607 | |
| 608 | if (state->radio) |
| 609 | return 0; |
| 610 | |
| 611 | v = cx18_av_read(cx, 0x809); |
| 612 | v &= ~0xf; |
| 613 | |
| 614 | switch (vt->audmode) { |
| 615 | case V4L2_TUNER_MODE_MONO: |
| 616 | /* mono -> mono |
| 617 | stereo -> mono |
| 618 | bilingual -> lang1 */ |
| 619 | break; |
| 620 | case V4L2_TUNER_MODE_STEREO: |
| 621 | case V4L2_TUNER_MODE_LANG1: |
| 622 | /* mono -> mono |
| 623 | stereo -> stereo |
| 624 | bilingual -> lang1 */ |
| 625 | v |= 0x4; |
| 626 | break; |
| 627 | case V4L2_TUNER_MODE_LANG1_LANG2: |
| 628 | /* mono -> mono |
| 629 | stereo -> stereo |
| 630 | bilingual -> lang1/lang2 */ |
| 631 | v |= 0x7; |
| 632 | break; |
| 633 | case V4L2_TUNER_MODE_LANG2: |
| 634 | /* mono -> mono |
| 635 | stereo -> stereo |
| 636 | bilingual -> lang2 */ |
| 637 | v |= 0x1; |
| 638 | break; |
| 639 | default: |
| 640 | return -EINVAL; |
| 641 | } |
| 642 | cx18_av_write_expect(cx, 0x809, v, v, 0xff); |
| 643 | state->audmode = vt->audmode; |
| 644 | return 0; |
| 645 | } |
| 646 | |
| 647 | static int cx18_av_s_std(struct v4l2_subdev *sd, v4l2_std_id norm) |
| 648 | { |
| 649 | struct cx18_av_state *state = to_cx18_av_state(sd); |
| 650 | struct cx18 *cx = v4l2_get_subdevdata(sd); |
| 651 | |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 652 | u8 fmt = 0; /* zero is autodetect */ |
| 653 | u8 pal_m = 0; |
| 654 | |
Andy Walls | 1a26704 | 2009-02-14 02:32:39 -0300 | [diff] [blame] | 655 | if (state->radio == 0 && state->std == norm) |
| 656 | return 0; |
| 657 | |
| 658 | state->radio = 0; |
| 659 | state->std = norm; |
| 660 | |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 661 | /* First tests should be against specific std */ |
| 662 | if (state->std == V4L2_STD_NTSC_M_JP) { |
| 663 | fmt = 0x2; |
| 664 | } else if (state->std == V4L2_STD_NTSC_443) { |
| 665 | fmt = 0x3; |
| 666 | } else if (state->std == V4L2_STD_PAL_M) { |
| 667 | pal_m = 1; |
| 668 | fmt = 0x5; |
| 669 | } else if (state->std == V4L2_STD_PAL_N) { |
| 670 | fmt = 0x6; |
| 671 | } else if (state->std == V4L2_STD_PAL_Nc) { |
| 672 | fmt = 0x7; |
| 673 | } else if (state->std == V4L2_STD_PAL_60) { |
| 674 | fmt = 0x8; |
| 675 | } else { |
| 676 | /* Then, test against generic ones */ |
| 677 | if (state->std & V4L2_STD_NTSC) |
| 678 | fmt = 0x1; |
| 679 | else if (state->std & V4L2_STD_PAL) |
| 680 | fmt = 0x4; |
| 681 | else if (state->std & V4L2_STD_SECAM) |
| 682 | fmt = 0xc; |
| 683 | } |
| 684 | |
Andy Walls | 6246d4e | 2009-02-21 22:27:37 -0300 | [diff] [blame] | 685 | CX18_DEBUG_INFO_DEV(sd, "changing video std to fmt %i\n", fmt); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 686 | |
| 687 | /* Follow step 9 of section 3.16 in the cx18_av datasheet. |
| 688 | Without this PAL may display a vertical ghosting effect. |
| 689 | This happens for example with the Yuan MPC622. */ |
| 690 | if (fmt >= 4 && fmt < 8) { |
| 691 | /* Set format to NTSC-M */ |
Hans Verkuil | c173890 | 2008-06-27 15:33:02 -0300 | [diff] [blame] | 692 | cx18_av_and_or(cx, 0x400, ~0xf, 1); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 693 | /* Turn off LCOMB */ |
| 694 | cx18_av_and_or(cx, 0x47b, ~6, 0); |
| 695 | } |
Hans Verkuil | c173890 | 2008-06-27 15:33:02 -0300 | [diff] [blame] | 696 | cx18_av_and_or(cx, 0x400, ~0x2f, fmt | 0x20); |
| 697 | cx18_av_and_or(cx, 0x403, ~0x3, pal_m); |
Hans Verkuil | 03b52c3 | 2008-07-17 12:33:08 -0300 | [diff] [blame] | 698 | cx18_av_std_setup(cx); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 699 | input_change(cx); |
| 700 | return 0; |
| 701 | } |
| 702 | |
Andy Walls | 1a26704 | 2009-02-14 02:32:39 -0300 | [diff] [blame] | 703 | static int cx18_av_s_radio(struct v4l2_subdev *sd) |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 704 | { |
Andy Walls | 1a26704 | 2009-02-14 02:32:39 -0300 | [diff] [blame] | 705 | struct cx18_av_state *state = to_cx18_av_state(sd); |
| 706 | state->radio = 1; |
| 707 | return 0; |
| 708 | } |
| 709 | |
| 710 | static int cx18_av_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl) |
| 711 | { |
| 712 | struct cx18 *cx = v4l2_get_subdevdata(sd); |
| 713 | |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 714 | switch (ctrl->id) { |
| 715 | case V4L2_CID_BRIGHTNESS: |
| 716 | if (ctrl->value < 0 || ctrl->value > 255) { |
Andy Walls | 6246d4e | 2009-02-21 22:27:37 -0300 | [diff] [blame] | 717 | CX18_ERR_DEV(sd, "invalid brightness setting %d\n", |
| 718 | ctrl->value); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 719 | return -ERANGE; |
| 720 | } |
| 721 | |
| 722 | cx18_av_write(cx, 0x414, ctrl->value - 128); |
| 723 | break; |
| 724 | |
| 725 | case V4L2_CID_CONTRAST: |
| 726 | if (ctrl->value < 0 || ctrl->value > 127) { |
Andy Walls | 6246d4e | 2009-02-21 22:27:37 -0300 | [diff] [blame] | 727 | CX18_ERR_DEV(sd, "invalid contrast setting %d\n", |
| 728 | ctrl->value); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 729 | return -ERANGE; |
| 730 | } |
| 731 | |
| 732 | cx18_av_write(cx, 0x415, ctrl->value << 1); |
| 733 | break; |
| 734 | |
| 735 | case V4L2_CID_SATURATION: |
| 736 | if (ctrl->value < 0 || ctrl->value > 127) { |
Andy Walls | 6246d4e | 2009-02-21 22:27:37 -0300 | [diff] [blame] | 737 | CX18_ERR_DEV(sd, "invalid saturation setting %d\n", |
| 738 | ctrl->value); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 739 | return -ERANGE; |
| 740 | } |
| 741 | |
| 742 | cx18_av_write(cx, 0x420, ctrl->value << 1); |
| 743 | cx18_av_write(cx, 0x421, ctrl->value << 1); |
| 744 | break; |
| 745 | |
| 746 | case V4L2_CID_HUE: |
Hans Verkuil | de6476f5 | 2009-01-29 16:09:13 -0300 | [diff] [blame] | 747 | if (ctrl->value < -128 || ctrl->value > 127) { |
Andy Walls | 6246d4e | 2009-02-21 22:27:37 -0300 | [diff] [blame] | 748 | CX18_ERR_DEV(sd, "invalid hue setting %d\n", |
| 749 | ctrl->value); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 750 | return -ERANGE; |
| 751 | } |
| 752 | |
| 753 | cx18_av_write(cx, 0x422, ctrl->value); |
| 754 | break; |
| 755 | |
| 756 | case V4L2_CID_AUDIO_VOLUME: |
| 757 | case V4L2_CID_AUDIO_BASS: |
| 758 | case V4L2_CID_AUDIO_TREBLE: |
| 759 | case V4L2_CID_AUDIO_BALANCE: |
| 760 | case V4L2_CID_AUDIO_MUTE: |
Hans Verkuil | 41c129a | 2009-03-30 06:43:13 -0300 | [diff] [blame] | 761 | return cx18_av_audio_s_ctrl(cx, ctrl); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 762 | |
| 763 | default: |
| 764 | return -EINVAL; |
| 765 | } |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 766 | return 0; |
| 767 | } |
| 768 | |
Andy Walls | 1a26704 | 2009-02-14 02:32:39 -0300 | [diff] [blame] | 769 | static int cx18_av_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl) |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 770 | { |
Andy Walls | 1a26704 | 2009-02-14 02:32:39 -0300 | [diff] [blame] | 771 | struct cx18 *cx = v4l2_get_subdevdata(sd); |
| 772 | |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 773 | switch (ctrl->id) { |
| 774 | case V4L2_CID_BRIGHTNESS: |
| 775 | ctrl->value = (s8)cx18_av_read(cx, 0x414) + 128; |
| 776 | break; |
| 777 | case V4L2_CID_CONTRAST: |
| 778 | ctrl->value = cx18_av_read(cx, 0x415) >> 1; |
| 779 | break; |
| 780 | case V4L2_CID_SATURATION: |
| 781 | ctrl->value = cx18_av_read(cx, 0x420) >> 1; |
| 782 | break; |
| 783 | case V4L2_CID_HUE: |
| 784 | ctrl->value = (s8)cx18_av_read(cx, 0x422); |
| 785 | break; |
| 786 | case V4L2_CID_AUDIO_VOLUME: |
| 787 | case V4L2_CID_AUDIO_BASS: |
| 788 | case V4L2_CID_AUDIO_TREBLE: |
| 789 | case V4L2_CID_AUDIO_BALANCE: |
| 790 | case V4L2_CID_AUDIO_MUTE: |
Hans Verkuil | 41c129a | 2009-03-30 06:43:13 -0300 | [diff] [blame] | 791 | return cx18_av_audio_g_ctrl(cx, ctrl); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 792 | default: |
| 793 | return -EINVAL; |
| 794 | } |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 795 | return 0; |
| 796 | } |
| 797 | |
Andy Walls | 1a26704 | 2009-02-14 02:32:39 -0300 | [diff] [blame] | 798 | static int cx18_av_queryctrl(struct v4l2_subdev *sd, struct v4l2_queryctrl *qc) |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 799 | { |
Andy Walls | 1a26704 | 2009-02-14 02:32:39 -0300 | [diff] [blame] | 800 | struct cx18_av_state *state = to_cx18_av_state(sd); |
| 801 | |
| 802 | switch (qc->id) { |
| 803 | case V4L2_CID_BRIGHTNESS: |
| 804 | return v4l2_ctrl_query_fill(qc, 0, 255, 1, 128); |
| 805 | case V4L2_CID_CONTRAST: |
| 806 | case V4L2_CID_SATURATION: |
| 807 | return v4l2_ctrl_query_fill(qc, 0, 127, 1, 64); |
| 808 | case V4L2_CID_HUE: |
| 809 | return v4l2_ctrl_query_fill(qc, -128, 127, 1, 0); |
| 810 | default: |
| 811 | break; |
| 812 | } |
| 813 | |
| 814 | switch (qc->id) { |
| 815 | case V4L2_CID_AUDIO_VOLUME: |
| 816 | return v4l2_ctrl_query_fill(qc, 0, 65535, |
| 817 | 65535 / 100, state->default_volume); |
| 818 | case V4L2_CID_AUDIO_MUTE: |
| 819 | return v4l2_ctrl_query_fill(qc, 0, 1, 1, 0); |
| 820 | case V4L2_CID_AUDIO_BALANCE: |
| 821 | case V4L2_CID_AUDIO_BASS: |
| 822 | case V4L2_CID_AUDIO_TREBLE: |
| 823 | return v4l2_ctrl_query_fill(qc, 0, 65535, 65535 / 100, 32768); |
| 824 | default: |
| 825 | return -EINVAL; |
| 826 | } |
| 827 | return -EINVAL; |
| 828 | } |
| 829 | |
| 830 | static int cx18_av_g_fmt(struct v4l2_subdev *sd, struct v4l2_format *fmt) |
| 831 | { |
| 832 | struct cx18 *cx = v4l2_get_subdevdata(sd); |
| 833 | |
Hans Verkuil | 41c129a | 2009-03-30 06:43:13 -0300 | [diff] [blame] | 834 | return cx18_av_vbi_g_fmt(cx, fmt); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 835 | } |
| 836 | |
Andy Walls | 1a26704 | 2009-02-14 02:32:39 -0300 | [diff] [blame] | 837 | static int cx18_av_s_fmt(struct v4l2_subdev *sd, struct v4l2_format *fmt) |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 838 | { |
Andy Walls | 1a26704 | 2009-02-14 02:32:39 -0300 | [diff] [blame] | 839 | struct cx18_av_state *state = to_cx18_av_state(sd); |
| 840 | struct cx18 *cx = v4l2_get_subdevdata(sd); |
| 841 | |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 842 | struct v4l2_pix_format *pix; |
| 843 | int HSC, VSC, Vsrc, Hsrc, filter, Vlines; |
| 844 | int is_50Hz = !(state->std & V4L2_STD_525_60); |
| 845 | |
| 846 | switch (fmt->type) { |
| 847 | case V4L2_BUF_TYPE_VIDEO_CAPTURE: |
| 848 | pix = &(fmt->fmt.pix); |
| 849 | |
| 850 | Vsrc = (cx18_av_read(cx, 0x476) & 0x3f) << 4; |
| 851 | Vsrc |= (cx18_av_read(cx, 0x475) & 0xf0) >> 4; |
| 852 | |
| 853 | Hsrc = (cx18_av_read(cx, 0x472) & 0x3f) << 4; |
| 854 | Hsrc |= (cx18_av_read(cx, 0x471) & 0xf0) >> 4; |
| 855 | |
Andy Walls | 72401b7 | 2009-02-28 14:51:47 -0300 | [diff] [blame] | 856 | /* |
| 857 | * This adjustment reflects the excess of vactive, set in |
| 858 | * cx18_av_std_setup(), above standard values: |
| 859 | * |
| 860 | * 480 + 1 for 60 Hz systems |
| 861 | * 576 + 4 for 50 Hz systems |
| 862 | */ |
| 863 | Vlines = pix->height + (is_50Hz ? 4 : 1); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 864 | |
Andy Walls | 72401b7 | 2009-02-28 14:51:47 -0300 | [diff] [blame] | 865 | /* |
| 866 | * Invalid height and width scaling requests are: |
| 867 | * 1. width less than 1/16 of the source width |
| 868 | * 2. width greater than the source width |
| 869 | * 3. height less than 1/8 of the source height |
| 870 | * 4. height greater than the source height |
| 871 | */ |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 872 | if ((pix->width * 16 < Hsrc) || (Hsrc < pix->width) || |
| 873 | (Vlines * 8 < Vsrc) || (Vsrc < Vlines)) { |
Andy Walls | 6246d4e | 2009-02-21 22:27:37 -0300 | [diff] [blame] | 874 | CX18_ERR_DEV(sd, "%dx%d is not a valid size!\n", |
| 875 | pix->width, pix->height); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 876 | return -ERANGE; |
| 877 | } |
| 878 | |
| 879 | HSC = (Hsrc * (1 << 20)) / pix->width - (1 << 20); |
| 880 | VSC = (1 << 16) - (Vsrc * (1 << 9) / Vlines - (1 << 9)); |
| 881 | VSC &= 0x1fff; |
| 882 | |
| 883 | if (pix->width >= 385) |
| 884 | filter = 0; |
| 885 | else if (pix->width > 192) |
| 886 | filter = 1; |
| 887 | else if (pix->width > 96) |
| 888 | filter = 2; |
| 889 | else |
| 890 | filter = 3; |
| 891 | |
Andy Walls | 6246d4e | 2009-02-21 22:27:37 -0300 | [diff] [blame] | 892 | CX18_DEBUG_INFO_DEV(sd, |
| 893 | "decoder set size %dx%d -> scale %ux%u\n", |
| 894 | pix->width, pix->height, HSC, VSC); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 895 | |
| 896 | /* HSCALE=HSC */ |
| 897 | cx18_av_write(cx, 0x418, HSC & 0xff); |
| 898 | cx18_av_write(cx, 0x419, (HSC >> 8) & 0xff); |
| 899 | cx18_av_write(cx, 0x41a, HSC >> 16); |
| 900 | /* VSCALE=VSC */ |
| 901 | cx18_av_write(cx, 0x41c, VSC & 0xff); |
| 902 | cx18_av_write(cx, 0x41d, VSC >> 8); |
| 903 | /* VS_INTRLACE=1 VFILT=filter */ |
| 904 | cx18_av_write(cx, 0x41e, 0x8 | filter); |
| 905 | break; |
| 906 | |
| 907 | case V4L2_BUF_TYPE_SLICED_VBI_CAPTURE: |
Hans Verkuil | 41c129a | 2009-03-30 06:43:13 -0300 | [diff] [blame] | 908 | return cx18_av_vbi_s_fmt(cx, fmt); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 909 | |
| 910 | case V4L2_BUF_TYPE_VBI_CAPTURE: |
Hans Verkuil | 41c129a | 2009-03-30 06:43:13 -0300 | [diff] [blame] | 911 | return cx18_av_vbi_s_fmt(cx, fmt); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 912 | |
| 913 | default: |
| 914 | return -EINVAL; |
| 915 | } |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 916 | return 0; |
| 917 | } |
| 918 | |
Andy Walls | 1a26704 | 2009-02-14 02:32:39 -0300 | [diff] [blame] | 919 | static int cx18_av_s_stream(struct v4l2_subdev *sd, int enable) |
Andy Walls | e474200 | 2009-01-30 22:21:45 -0300 | [diff] [blame] | 920 | { |
Andy Walls | 1a26704 | 2009-02-14 02:32:39 -0300 | [diff] [blame] | 921 | struct cx18 *cx = v4l2_get_subdevdata(sd); |
Andy Walls | e474200 | 2009-01-30 22:21:45 -0300 | [diff] [blame] | 922 | |
Andy Walls | 6246d4e | 2009-02-21 22:27:37 -0300 | [diff] [blame] | 923 | CX18_DEBUG_INFO_DEV(sd, "%s output\n", enable ? "enable" : "disable"); |
Andy Walls | 1a26704 | 2009-02-14 02:32:39 -0300 | [diff] [blame] | 924 | if (enable) { |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 925 | cx18_av_write(cx, 0x115, 0x8c); |
| 926 | cx18_av_write(cx, 0x116, 0x07); |
Andy Walls | 1a26704 | 2009-02-14 02:32:39 -0300 | [diff] [blame] | 927 | } else { |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 928 | cx18_av_write(cx, 0x115, 0x00); |
| 929 | cx18_av_write(cx, 0x116, 0x00); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 930 | } |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 931 | return 0; |
| 932 | } |
| 933 | |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 934 | static void log_video_status(struct cx18 *cx) |
| 935 | { |
| 936 | static const char *const fmt_strs[] = { |
| 937 | "0x0", |
| 938 | "NTSC-M", "NTSC-J", "NTSC-4.43", |
| 939 | "PAL-BDGHI", "PAL-M", "PAL-N", "PAL-Nc", "PAL-60", |
| 940 | "0x9", "0xA", "0xB", |
| 941 | "SECAM", |
| 942 | "0xD", "0xE", "0xF" |
| 943 | }; |
| 944 | |
| 945 | struct cx18_av_state *state = &cx->av_state; |
Andy Walls | 6246d4e | 2009-02-21 22:27:37 -0300 | [diff] [blame] | 946 | struct v4l2_subdev *sd = &state->sd; |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 947 | u8 vidfmt_sel = cx18_av_read(cx, 0x400) & 0xf; |
| 948 | u8 gen_stat1 = cx18_av_read(cx, 0x40d); |
| 949 | u8 gen_stat2 = cx18_av_read(cx, 0x40e); |
| 950 | int vid_input = state->vid_input; |
| 951 | |
Andy Walls | 6246d4e | 2009-02-21 22:27:37 -0300 | [diff] [blame] | 952 | CX18_INFO_DEV(sd, "Video signal: %spresent\n", |
| 953 | (gen_stat2 & 0x20) ? "" : "not "); |
| 954 | CX18_INFO_DEV(sd, "Detected format: %s\n", |
| 955 | fmt_strs[gen_stat1 & 0xf]); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 956 | |
Andy Walls | 6246d4e | 2009-02-21 22:27:37 -0300 | [diff] [blame] | 957 | CX18_INFO_DEV(sd, "Specified standard: %s\n", |
| 958 | vidfmt_sel ? fmt_strs[vidfmt_sel] |
| 959 | : "automatic detection"); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 960 | |
| 961 | if (vid_input >= CX18_AV_COMPOSITE1 && |
| 962 | vid_input <= CX18_AV_COMPOSITE8) { |
Andy Walls | 6246d4e | 2009-02-21 22:27:37 -0300 | [diff] [blame] | 963 | CX18_INFO_DEV(sd, "Specified video input: Composite %d\n", |
| 964 | vid_input - CX18_AV_COMPOSITE1 + 1); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 965 | } else { |
Andy Walls | 6246d4e | 2009-02-21 22:27:37 -0300 | [diff] [blame] | 966 | CX18_INFO_DEV(sd, "Specified video input: " |
| 967 | "S-Video (Luma In%d, Chroma In%d)\n", |
| 968 | (vid_input & 0xf0) >> 4, |
| 969 | (vid_input & 0xf00) >> 8); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 970 | } |
| 971 | |
Andy Walls | 6246d4e | 2009-02-21 22:27:37 -0300 | [diff] [blame] | 972 | CX18_INFO_DEV(sd, "Specified audioclock freq: %d Hz\n", |
| 973 | state->audclk_freq); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 974 | } |
| 975 | |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 976 | static void log_audio_status(struct cx18 *cx) |
| 977 | { |
| 978 | struct cx18_av_state *state = &cx->av_state; |
Andy Walls | 6246d4e | 2009-02-21 22:27:37 -0300 | [diff] [blame] | 979 | struct v4l2_subdev *sd = &state->sd; |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 980 | u8 download_ctl = cx18_av_read(cx, 0x803); |
Hans Verkuil | 63b8c70 | 2008-05-21 17:40:19 -0300 | [diff] [blame] | 981 | u8 mod_det_stat0 = cx18_av_read(cx, 0x804); |
| 982 | u8 mod_det_stat1 = cx18_av_read(cx, 0x805); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 983 | u8 audio_config = cx18_av_read(cx, 0x808); |
| 984 | u8 pref_mode = cx18_av_read(cx, 0x809); |
| 985 | u8 afc0 = cx18_av_read(cx, 0x80b); |
| 986 | u8 mute_ctl = cx18_av_read(cx, 0x8d3); |
| 987 | int aud_input = state->aud_input; |
| 988 | char *p; |
| 989 | |
| 990 | switch (mod_det_stat0) { |
| 991 | case 0x00: p = "mono"; break; |
| 992 | case 0x01: p = "stereo"; break; |
| 993 | case 0x02: p = "dual"; break; |
| 994 | case 0x04: p = "tri"; break; |
| 995 | case 0x10: p = "mono with SAP"; break; |
| 996 | case 0x11: p = "stereo with SAP"; break; |
| 997 | case 0x12: p = "dual with SAP"; break; |
| 998 | case 0x14: p = "tri with SAP"; break; |
| 999 | case 0xfe: p = "forced mode"; break; |
Hans Verkuil | 63b8c70 | 2008-05-21 17:40:19 -0300 | [diff] [blame] | 1000 | default: p = "not defined"; break; |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 1001 | } |
Andy Walls | 6246d4e | 2009-02-21 22:27:37 -0300 | [diff] [blame] | 1002 | CX18_INFO_DEV(sd, "Detected audio mode: %s\n", p); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 1003 | |
| 1004 | switch (mod_det_stat1) { |
Hans Verkuil | 63b8c70 | 2008-05-21 17:40:19 -0300 | [diff] [blame] | 1005 | case 0x00: p = "not defined"; break; |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 1006 | case 0x01: p = "EIAJ"; break; |
| 1007 | case 0x02: p = "A2-M"; break; |
| 1008 | case 0x03: p = "A2-BG"; break; |
| 1009 | case 0x04: p = "A2-DK1"; break; |
| 1010 | case 0x05: p = "A2-DK2"; break; |
| 1011 | case 0x06: p = "A2-DK3"; break; |
| 1012 | case 0x07: p = "A1 (6.0 MHz FM Mono)"; break; |
| 1013 | case 0x08: p = "AM-L"; break; |
| 1014 | case 0x09: p = "NICAM-BG"; break; |
| 1015 | case 0x0a: p = "NICAM-DK"; break; |
| 1016 | case 0x0b: p = "NICAM-I"; break; |
| 1017 | case 0x0c: p = "NICAM-L"; break; |
| 1018 | case 0x0d: p = "BTSC/EIAJ/A2-M Mono (4.5 MHz FMMono)"; break; |
Hans Verkuil | 63b8c70 | 2008-05-21 17:40:19 -0300 | [diff] [blame] | 1019 | case 0x0e: p = "IF FM Radio"; break; |
| 1020 | case 0x0f: p = "BTSC"; break; |
| 1021 | case 0x10: p = "detected chrominance"; break; |
| 1022 | case 0xfd: p = "unknown audio standard"; break; |
| 1023 | case 0xfe: p = "forced audio standard"; break; |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 1024 | case 0xff: p = "no detected audio standard"; break; |
Hans Verkuil | 63b8c70 | 2008-05-21 17:40:19 -0300 | [diff] [blame] | 1025 | default: p = "not defined"; break; |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 1026 | } |
Andy Walls | 6246d4e | 2009-02-21 22:27:37 -0300 | [diff] [blame] | 1027 | CX18_INFO_DEV(sd, "Detected audio standard: %s\n", p); |
| 1028 | CX18_INFO_DEV(sd, "Audio muted: %s\n", |
| 1029 | (mute_ctl & 0x2) ? "yes" : "no"); |
| 1030 | CX18_INFO_DEV(sd, "Audio microcontroller: %s\n", |
| 1031 | (download_ctl & 0x10) ? "running" : "stopped"); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 1032 | |
| 1033 | switch (audio_config >> 4) { |
Hans Verkuil | 63b8c70 | 2008-05-21 17:40:19 -0300 | [diff] [blame] | 1034 | case 0x00: p = "undefined"; break; |
| 1035 | case 0x01: p = "BTSC"; break; |
| 1036 | case 0x02: p = "EIAJ"; break; |
| 1037 | case 0x03: p = "A2-M"; break; |
| 1038 | case 0x04: p = "A2-BG"; break; |
| 1039 | case 0x05: p = "A2-DK1"; break; |
| 1040 | case 0x06: p = "A2-DK2"; break; |
| 1041 | case 0x07: p = "A2-DK3"; break; |
| 1042 | case 0x08: p = "A1 (6.0 MHz FM Mono)"; break; |
| 1043 | case 0x09: p = "AM-L"; break; |
| 1044 | case 0x0a: p = "NICAM-BG"; break; |
| 1045 | case 0x0b: p = "NICAM-DK"; break; |
| 1046 | case 0x0c: p = "NICAM-I"; break; |
| 1047 | case 0x0d: p = "NICAM-L"; break; |
| 1048 | case 0x0e: p = "FM radio"; break; |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 1049 | case 0x0f: p = "automatic detection"; break; |
Hans Verkuil | 63b8c70 | 2008-05-21 17:40:19 -0300 | [diff] [blame] | 1050 | default: p = "undefined"; break; |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 1051 | } |
Andy Walls | 6246d4e | 2009-02-21 22:27:37 -0300 | [diff] [blame] | 1052 | CX18_INFO_DEV(sd, "Configured audio standard: %s\n", p); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 1053 | |
| 1054 | if ((audio_config >> 4) < 0xF) { |
| 1055 | switch (audio_config & 0xF) { |
| 1056 | case 0x00: p = "MONO1 (LANGUAGE A/Mono L+R channel for BTSC, EIAJ, A2)"; break; |
| 1057 | case 0x01: p = "MONO2 (LANGUAGE B)"; break; |
| 1058 | case 0x02: p = "MONO3 (STEREO forced MONO)"; break; |
| 1059 | case 0x03: p = "MONO4 (NICAM ANALOG-Language C/Analog Fallback)"; break; |
| 1060 | case 0x04: p = "STEREO"; break; |
Hans Verkuil | 63b8c70 | 2008-05-21 17:40:19 -0300 | [diff] [blame] | 1061 | case 0x05: p = "DUAL1 (AC)"; break; |
| 1062 | case 0x06: p = "DUAL2 (BC)"; break; |
| 1063 | case 0x07: p = "DUAL3 (AB)"; break; |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 1064 | default: p = "undefined"; |
| 1065 | } |
Andy Walls | 6246d4e | 2009-02-21 22:27:37 -0300 | [diff] [blame] | 1066 | CX18_INFO_DEV(sd, "Configured audio mode: %s\n", p); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 1067 | } else { |
| 1068 | switch (audio_config & 0xF) { |
| 1069 | case 0x00: p = "BG"; break; |
| 1070 | case 0x01: p = "DK1"; break; |
| 1071 | case 0x02: p = "DK2"; break; |
| 1072 | case 0x03: p = "DK3"; break; |
| 1073 | case 0x04: p = "I"; break; |
| 1074 | case 0x05: p = "L"; break; |
| 1075 | case 0x06: p = "BTSC"; break; |
| 1076 | case 0x07: p = "EIAJ"; break; |
| 1077 | case 0x08: p = "A2-M"; break; |
Hans Verkuil | 63b8c70 | 2008-05-21 17:40:19 -0300 | [diff] [blame] | 1078 | case 0x09: p = "FM Radio (4.5 MHz)"; break; |
| 1079 | case 0x0a: p = "FM Radio (5.5 MHz)"; break; |
| 1080 | case 0x0b: p = "S-Video"; break; |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 1081 | case 0x0f: p = "automatic standard and mode detection"; break; |
Hans Verkuil | 63b8c70 | 2008-05-21 17:40:19 -0300 | [diff] [blame] | 1082 | default: p = "undefined"; break; |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 1083 | } |
Andy Walls | 6246d4e | 2009-02-21 22:27:37 -0300 | [diff] [blame] | 1084 | CX18_INFO_DEV(sd, "Configured audio system: %s\n", p); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 1085 | } |
| 1086 | |
| 1087 | if (aud_input) |
Andy Walls | 6246d4e | 2009-02-21 22:27:37 -0300 | [diff] [blame] | 1088 | CX18_INFO_DEV(sd, "Specified audio input: Tuner (In%d)\n", |
| 1089 | aud_input); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 1090 | else |
Andy Walls | 6246d4e | 2009-02-21 22:27:37 -0300 | [diff] [blame] | 1091 | CX18_INFO_DEV(sd, "Specified audio input: External\n"); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 1092 | |
| 1093 | switch (pref_mode & 0xf) { |
| 1094 | case 0: p = "mono/language A"; break; |
| 1095 | case 1: p = "language B"; break; |
| 1096 | case 2: p = "language C"; break; |
| 1097 | case 3: p = "analog fallback"; break; |
| 1098 | case 4: p = "stereo"; break; |
| 1099 | case 5: p = "language AC"; break; |
| 1100 | case 6: p = "language BC"; break; |
| 1101 | case 7: p = "language AB"; break; |
Hans Verkuil | 63b8c70 | 2008-05-21 17:40:19 -0300 | [diff] [blame] | 1102 | default: p = "undefined"; break; |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 1103 | } |
Andy Walls | 6246d4e | 2009-02-21 22:27:37 -0300 | [diff] [blame] | 1104 | CX18_INFO_DEV(sd, "Preferred audio mode: %s\n", p); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 1105 | |
| 1106 | if ((audio_config & 0xf) == 0xf) { |
Hans Verkuil | 63b8c70 | 2008-05-21 17:40:19 -0300 | [diff] [blame] | 1107 | switch ((afc0 >> 3) & 0x1) { |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 1108 | case 0: p = "system DK"; break; |
| 1109 | case 1: p = "system L"; break; |
| 1110 | } |
Andy Walls | 6246d4e | 2009-02-21 22:27:37 -0300 | [diff] [blame] | 1111 | CX18_INFO_DEV(sd, "Selected 65 MHz format: %s\n", p); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 1112 | |
Hans Verkuil | 63b8c70 | 2008-05-21 17:40:19 -0300 | [diff] [blame] | 1113 | switch (afc0 & 0x7) { |
| 1114 | case 0: p = "Chroma"; break; |
| 1115 | case 1: p = "BTSC"; break; |
| 1116 | case 2: p = "EIAJ"; break; |
| 1117 | case 3: p = "A2-M"; break; |
| 1118 | case 4: p = "autodetect"; break; |
| 1119 | default: p = "undefined"; break; |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 1120 | } |
Andy Walls | 6246d4e | 2009-02-21 22:27:37 -0300 | [diff] [blame] | 1121 | CX18_INFO_DEV(sd, "Selected 45 MHz format: %s\n", p); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 1122 | } |
| 1123 | } |
Andy Walls | 1a26704 | 2009-02-14 02:32:39 -0300 | [diff] [blame] | 1124 | |
| 1125 | static int cx18_av_log_status(struct v4l2_subdev *sd) |
| 1126 | { |
| 1127 | struct cx18 *cx = v4l2_get_subdevdata(sd); |
| 1128 | log_video_status(cx); |
| 1129 | log_audio_status(cx); |
| 1130 | return 0; |
| 1131 | } |
| 1132 | |
| 1133 | static inline int cx18_av_dbg_match(const struct v4l2_dbg_match *match) |
| 1134 | { |
| 1135 | return match->type == V4L2_CHIP_MATCH_HOST && match->addr == 1; |
| 1136 | } |
| 1137 | |
| 1138 | static int cx18_av_g_chip_ident(struct v4l2_subdev *sd, |
| 1139 | struct v4l2_dbg_chip_ident *chip) |
| 1140 | { |
Andy Walls | fa3e703 | 2009-02-16 02:23:25 -0300 | [diff] [blame] | 1141 | struct cx18_av_state *state = to_cx18_av_state(sd); |
| 1142 | |
Andy Walls | 1a26704 | 2009-02-14 02:32:39 -0300 | [diff] [blame] | 1143 | if (cx18_av_dbg_match(&chip->match)) { |
Andy Walls | fa3e703 | 2009-02-16 02:23:25 -0300 | [diff] [blame] | 1144 | chip->ident = state->id; |
| 1145 | chip->revision = state->rev; |
Andy Walls | 1a26704 | 2009-02-14 02:32:39 -0300 | [diff] [blame] | 1146 | } |
| 1147 | return 0; |
| 1148 | } |
| 1149 | |
| 1150 | #ifdef CONFIG_VIDEO_ADV_DEBUG |
| 1151 | static int cx18_av_g_register(struct v4l2_subdev *sd, |
| 1152 | struct v4l2_dbg_register *reg) |
| 1153 | { |
| 1154 | struct cx18 *cx = v4l2_get_subdevdata(sd); |
| 1155 | |
| 1156 | if (!cx18_av_dbg_match(®->match)) |
| 1157 | return -EINVAL; |
| 1158 | if ((reg->reg & 0x3) != 0) |
| 1159 | return -EINVAL; |
| 1160 | if (!capable(CAP_SYS_ADMIN)) |
| 1161 | return -EPERM; |
| 1162 | reg->size = 4; |
| 1163 | reg->val = cx18_av_read4(cx, reg->reg & 0x00000ffc); |
| 1164 | return 0; |
| 1165 | } |
| 1166 | |
| 1167 | static int cx18_av_s_register(struct v4l2_subdev *sd, |
| 1168 | struct v4l2_dbg_register *reg) |
| 1169 | { |
| 1170 | struct cx18 *cx = v4l2_get_subdevdata(sd); |
| 1171 | |
| 1172 | if (!cx18_av_dbg_match(®->match)) |
| 1173 | return -EINVAL; |
| 1174 | if ((reg->reg & 0x3) != 0) |
| 1175 | return -EINVAL; |
| 1176 | if (!capable(CAP_SYS_ADMIN)) |
| 1177 | return -EPERM; |
| 1178 | cx18_av_write4(cx, reg->reg & 0x00000ffc, reg->val); |
| 1179 | return 0; |
| 1180 | } |
| 1181 | #endif |
| 1182 | |
| 1183 | static const struct v4l2_subdev_core_ops cx18_av_general_ops = { |
| 1184 | .g_chip_ident = cx18_av_g_chip_ident, |
| 1185 | .log_status = cx18_av_log_status, |
Andy Walls | fa3e703 | 2009-02-16 02:23:25 -0300 | [diff] [blame] | 1186 | .init = cx18_av_init, |
Hans Verkuil | cc26b07 | 2009-03-29 19:20:26 -0300 | [diff] [blame] | 1187 | .load_fw = cx18_av_load_fw, |
Andy Walls | 1a26704 | 2009-02-14 02:32:39 -0300 | [diff] [blame] | 1188 | .reset = cx18_av_reset, |
| 1189 | .queryctrl = cx18_av_queryctrl, |
| 1190 | .g_ctrl = cx18_av_g_ctrl, |
| 1191 | .s_ctrl = cx18_av_s_ctrl, |
Hans Verkuil | f41737e | 2009-04-01 03:52:39 -0300 | [diff] [blame^] | 1192 | .s_std = cx18_av_s_std, |
Andy Walls | 1a26704 | 2009-02-14 02:32:39 -0300 | [diff] [blame] | 1193 | #ifdef CONFIG_VIDEO_ADV_DEBUG |
| 1194 | .g_register = cx18_av_g_register, |
| 1195 | .s_register = cx18_av_s_register, |
| 1196 | #endif |
| 1197 | }; |
| 1198 | |
| 1199 | static const struct v4l2_subdev_tuner_ops cx18_av_tuner_ops = { |
| 1200 | .s_radio = cx18_av_s_radio, |
| 1201 | .s_frequency = cx18_av_s_frequency, |
| 1202 | .g_tuner = cx18_av_g_tuner, |
| 1203 | .s_tuner = cx18_av_s_tuner, |
Andy Walls | 1a26704 | 2009-02-14 02:32:39 -0300 | [diff] [blame] | 1204 | }; |
| 1205 | |
| 1206 | static const struct v4l2_subdev_audio_ops cx18_av_audio_ops = { |
| 1207 | .s_clock_freq = cx18_av_s_clock_freq, |
| 1208 | .s_routing = cx18_av_s_audio_routing, |
| 1209 | }; |
| 1210 | |
| 1211 | static const struct v4l2_subdev_video_ops cx18_av_video_ops = { |
| 1212 | .s_routing = cx18_av_s_video_routing, |
| 1213 | .decode_vbi_line = cx18_av_decode_vbi_line, |
| 1214 | .s_stream = cx18_av_s_stream, |
| 1215 | .g_fmt = cx18_av_g_fmt, |
| 1216 | .s_fmt = cx18_av_s_fmt, |
| 1217 | }; |
| 1218 | |
| 1219 | static const struct v4l2_subdev_ops cx18_av_ops = { |
| 1220 | .core = &cx18_av_general_ops, |
| 1221 | .tuner = &cx18_av_tuner_ops, |
| 1222 | .audio = &cx18_av_audio_ops, |
| 1223 | .video = &cx18_av_video_ops, |
| 1224 | }; |
| 1225 | |
Andy Walls | ff2a200 | 2009-02-20 23:52:13 -0300 | [diff] [blame] | 1226 | int cx18_av_probe(struct cx18 *cx) |
Andy Walls | 1a26704 | 2009-02-14 02:32:39 -0300 | [diff] [blame] | 1227 | { |
Andy Walls | fa3e703 | 2009-02-16 02:23:25 -0300 | [diff] [blame] | 1228 | struct cx18_av_state *state = &cx->av_state; |
Andy Walls | ff2a200 | 2009-02-20 23:52:13 -0300 | [diff] [blame] | 1229 | struct v4l2_subdev *sd; |
Andy Walls | 1a26704 | 2009-02-14 02:32:39 -0300 | [diff] [blame] | 1230 | |
Andy Walls | fa3e703 | 2009-02-16 02:23:25 -0300 | [diff] [blame] | 1231 | state->rev = cx18_av_read4(cx, CXADEC_CHIP_CTRL) & 0xffff; |
| 1232 | state->id = ((state->rev >> 4) == CXADEC_CHIP_TYPE_MAKO) |
| 1233 | ? V4L2_IDENT_CX23418_843 : V4L2_IDENT_UNKNOWN; |
| 1234 | |
| 1235 | state->vid_input = CX18_AV_COMPOSITE7; |
| 1236 | state->aud_input = CX18_AV_AUDIO8; |
| 1237 | state->audclk_freq = 48000; |
| 1238 | state->audmode = V4L2_TUNER_MODE_LANG1; |
| 1239 | state->slicer_line_delay = 0; |
| 1240 | state->slicer_line_offset = (10 + state->slicer_line_delay - 2); |
| 1241 | |
Andy Walls | ff2a200 | 2009-02-20 23:52:13 -0300 | [diff] [blame] | 1242 | sd = &state->sd; |
| 1243 | v4l2_subdev_init(sd, &cx18_av_ops); |
| 1244 | v4l2_set_subdevdata(sd, cx); |
| 1245 | snprintf(sd->name, sizeof(sd->name), |
Andy Walls | 6246d4e | 2009-02-21 22:27:37 -0300 | [diff] [blame] | 1246 | "%s %03x", cx->v4l2_dev.name, (state->rev >> 4)); |
Andy Walls | ff2a200 | 2009-02-20 23:52:13 -0300 | [diff] [blame] | 1247 | sd->grp_id = CX18_HW_418_AV; |
| 1248 | return v4l2_device_register_subdev(&cx->v4l2_dev, sd); |
Andy Walls | 1a26704 | 2009-02-14 02:32:39 -0300 | [diff] [blame] | 1249 | } |