Ralf Baechle | c78cbf4 | 2005-09-30 13:59:37 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2005 MIPS Technologies, Inc. All rights reserved. |
| 3 | * |
| 4 | * This program is free software; you can distribute it and/or modify it |
| 5 | * under the terms of the GNU General Public License (Version 2) as |
| 6 | * published by the Free Software Foundation. |
| 7 | * |
| 8 | * This program is distributed in the hope it will be useful, but WITHOUT |
| 9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
| 11 | * for more details. |
| 12 | * |
| 13 | * You should have received a copy of the GNU General Public License along |
| 14 | * with this program; if not, write to the Free Software Foundation, Inc., |
| 15 | * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. |
| 16 | * |
| 17 | */ |
| 18 | /* |
| 19 | * Simulator Platform-specific hooks for SMP operation |
| 20 | */ |
Ralf Baechle | c78cbf4 | 2005-09-30 13:59:37 +0100 | [diff] [blame] | 21 | #include <linux/kernel.h> |
| 22 | #include <linux/sched.h> |
| 23 | #include <linux/cpumask.h> |
| 24 | #include <linux/interrupt.h> |
| 25 | #include <asm/atomic.h> |
| 26 | #include <asm/cpu.h> |
| 27 | #include <asm/processor.h> |
| 28 | #include <asm/system.h> |
| 29 | #include <asm/hardirq.h> |
| 30 | #include <asm/mmu_context.h> |
| 31 | #include <asm/smp.h> |
| 32 | #ifdef CONFIG_MIPS_MT_SMTC |
| 33 | #include <asm/smtc_ipi.h> |
| 34 | #endif /* CONFIG_MIPS_MT_SMTC */ |
| 35 | |
| 36 | /* VPE/SMP Prototype implements platform interfaces directly */ |
| 37 | #if !defined(CONFIG_MIPS_MT_SMP) |
| 38 | |
| 39 | /* |
| 40 | * Cause the specified action to be performed on a targeted "CPU" |
| 41 | */ |
| 42 | |
| 43 | void core_send_ipi(int cpu, unsigned int action) |
| 44 | { |
| 45 | #ifdef CONFIG_MIPS_MT_SMTC |
Ralf Baechle | c78cbf4 | 2005-09-30 13:59:37 +0100 | [diff] [blame] | 46 | smtc_send_ipi(cpu, LINUX_SMP_IPI, action); |
| 47 | #endif /* CONFIG_MIPS_MT_SMTC */ |
| 48 | /* "CPU" may be TC of same VPE, VPE of same CPU, or different CPU */ |
| 49 | |
| 50 | } |
| 51 | |
| 52 | /* |
Ralf Baechle | c78cbf4 | 2005-09-30 13:59:37 +0100 | [diff] [blame] | 53 | * Platform "CPU" startup hook |
| 54 | */ |
| 55 | |
| 56 | void prom_boot_secondary(int cpu, struct task_struct *idle) |
| 57 | { |
| 58 | #ifdef CONFIG_MIPS_MT_SMTC |
Ralf Baechle | c78cbf4 | 2005-09-30 13:59:37 +0100 | [diff] [blame] | 59 | smtc_boot_secondary(cpu, idle); |
| 60 | #endif /* CONFIG_MIPS_MT_SMTC */ |
| 61 | } |
| 62 | |
| 63 | /* |
| 64 | * Post-config but pre-boot cleanup entry point |
| 65 | */ |
| 66 | |
| 67 | void prom_init_secondary(void) |
| 68 | { |
| 69 | #ifdef CONFIG_MIPS_MT_SMTC |
| 70 | void smtc_init_secondary(void); |
| 71 | |
| 72 | smtc_init_secondary(); |
| 73 | #endif /* CONFIG_MIPS_MT_SMTC */ |
| 74 | } |
| 75 | |
| 76 | /* |
| 77 | * Platform SMP pre-initialization |
| 78 | */ |
| 79 | |
| 80 | void prom_prepare_cpus(unsigned int max_cpus) |
| 81 | { |
| 82 | #ifdef CONFIG_MIPS_MT_SMTC |
Ralf Baechle | c78cbf4 | 2005-09-30 13:59:37 +0100 | [diff] [blame] | 83 | /* |
Ralf Baechle | a3dddd5 | 2006-03-11 08:18:41 +0000 | [diff] [blame] | 84 | * As noted above, we can assume a single CPU for now |
Ralf Baechle | c78cbf4 | 2005-09-30 13:59:37 +0100 | [diff] [blame] | 85 | * but it may be multithreaded. |
| 86 | */ |
| 87 | |
| 88 | if (read_c0_config3() & (1<<2)) { |
| 89 | mipsmt_prepare_cpus(max_cpus); |
| 90 | } |
| 91 | #endif /* CONFIG_MIPS_MT_SMTC */ |
| 92 | } |
| 93 | |
| 94 | /* |
| 95 | * SMP initialization finalization entry point |
| 96 | */ |
| 97 | |
| 98 | void prom_smp_finish(void) |
| 99 | { |
| 100 | #ifdef CONFIG_MIPS_MT_SMTC |
Ralf Baechle | c78cbf4 | 2005-09-30 13:59:37 +0100 | [diff] [blame] | 101 | smtc_smp_finish(); |
| 102 | #endif /* CONFIG_MIPS_MT_SMTC */ |
| 103 | } |
| 104 | |
| 105 | /* |
| 106 | * Hook for after all CPUs are online |
| 107 | */ |
| 108 | |
| 109 | void prom_cpus_done(void) |
| 110 | { |
| 111 | #ifdef CONFIG_MIPS_MT_SMTC |
| 112 | |
| 113 | #endif /* CONFIG_MIPS_MT_SMTC */ |
| 114 | } |
| 115 | #endif /* CONFIG_MIPS32R2_MT_SMP */ |