Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * linux/arch/arm/mach-integrator/core.c |
| 3 | * |
| 4 | * Copyright (C) 2000-2003 Deep Blue Solutions Ltd |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License version 2, as |
| 8 | * published by the Free Software Foundation. |
| 9 | */ |
| 10 | #include <linux/types.h> |
| 11 | #include <linux/kernel.h> |
| 12 | #include <linux/init.h> |
| 13 | #include <linux/device.h> |
| 14 | #include <linux/spinlock.h> |
| 15 | #include <linux/interrupt.h> |
| 16 | #include <linux/sched.h> |
Russell King | 20cf33e | 2005-06-18 10:15:46 +0100 | [diff] [blame] | 17 | #include <linux/smp.h> |
Russell King | fbb18a2 | 2006-03-26 23:13:39 +0100 | [diff] [blame] | 18 | #include <linux/termios.h> |
Russell King | a62c80e | 2006-01-07 13:52:45 +0000 | [diff] [blame] | 19 | #include <linux/amba/bus.h> |
Russell King | fbb18a2 | 2006-03-26 23:13:39 +0100 | [diff] [blame] | 20 | #include <linux/amba/serial.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 21 | |
| 22 | #include <asm/hardware.h> |
| 23 | #include <asm/irq.h> |
| 24 | #include <asm/io.h> |
Russell King | b720f73 | 2005-06-29 15:15:54 +0100 | [diff] [blame] | 25 | #include <asm/hardware/arm_timer.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 26 | #include <asm/arch/cm.h> |
| 27 | #include <asm/system.h> |
| 28 | #include <asm/leds.h> |
| 29 | #include <asm/mach/time.h> |
| 30 | |
| 31 | #include "common.h" |
| 32 | |
Russell King | fbb18a2 | 2006-03-26 23:13:39 +0100 | [diff] [blame] | 33 | static struct amba_pl010_data integrator_uart_data; |
| 34 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 35 | static struct amba_device rtc_device = { |
| 36 | .dev = { |
| 37 | .bus_id = "mb:15", |
| 38 | }, |
| 39 | .res = { |
| 40 | .start = INTEGRATOR_RTC_BASE, |
| 41 | .end = INTEGRATOR_RTC_BASE + SZ_4K - 1, |
| 42 | .flags = IORESOURCE_MEM, |
| 43 | }, |
| 44 | .irq = { IRQ_RTCINT, NO_IRQ }, |
| 45 | .periphid = 0x00041030, |
| 46 | }; |
| 47 | |
| 48 | static struct amba_device uart0_device = { |
| 49 | .dev = { |
| 50 | .bus_id = "mb:16", |
Russell King | fbb18a2 | 2006-03-26 23:13:39 +0100 | [diff] [blame] | 51 | .platform_data = &integrator_uart_data, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 52 | }, |
| 53 | .res = { |
| 54 | .start = INTEGRATOR_UART0_BASE, |
| 55 | .end = INTEGRATOR_UART0_BASE + SZ_4K - 1, |
| 56 | .flags = IORESOURCE_MEM, |
| 57 | }, |
| 58 | .irq = { IRQ_UARTINT0, NO_IRQ }, |
| 59 | .periphid = 0x0041010, |
| 60 | }; |
| 61 | |
| 62 | static struct amba_device uart1_device = { |
| 63 | .dev = { |
| 64 | .bus_id = "mb:17", |
Russell King | fbb18a2 | 2006-03-26 23:13:39 +0100 | [diff] [blame] | 65 | .platform_data = &integrator_uart_data, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 66 | }, |
| 67 | .res = { |
| 68 | .start = INTEGRATOR_UART1_BASE, |
| 69 | .end = INTEGRATOR_UART1_BASE + SZ_4K - 1, |
| 70 | .flags = IORESOURCE_MEM, |
| 71 | }, |
| 72 | .irq = { IRQ_UARTINT1, NO_IRQ }, |
| 73 | .periphid = 0x0041010, |
| 74 | }; |
| 75 | |
| 76 | static struct amba_device kmi0_device = { |
| 77 | .dev = { |
| 78 | .bus_id = "mb:18", |
| 79 | }, |
| 80 | .res = { |
| 81 | .start = KMI0_BASE, |
| 82 | .end = KMI0_BASE + SZ_4K - 1, |
| 83 | .flags = IORESOURCE_MEM, |
| 84 | }, |
| 85 | .irq = { IRQ_KMIINT0, NO_IRQ }, |
| 86 | .periphid = 0x00041050, |
| 87 | }; |
| 88 | |
| 89 | static struct amba_device kmi1_device = { |
| 90 | .dev = { |
| 91 | .bus_id = "mb:19", |
| 92 | }, |
| 93 | .res = { |
| 94 | .start = KMI1_BASE, |
| 95 | .end = KMI1_BASE + SZ_4K - 1, |
| 96 | .flags = IORESOURCE_MEM, |
| 97 | }, |
| 98 | .irq = { IRQ_KMIINT1, NO_IRQ }, |
| 99 | .periphid = 0x00041050, |
| 100 | }; |
| 101 | |
| 102 | static struct amba_device *amba_devs[] __initdata = { |
| 103 | &rtc_device, |
| 104 | &uart0_device, |
| 105 | &uart1_device, |
| 106 | &kmi0_device, |
| 107 | &kmi1_device, |
| 108 | }; |
| 109 | |
| 110 | static int __init integrator_init(void) |
| 111 | { |
| 112 | int i; |
| 113 | |
| 114 | for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { |
| 115 | struct amba_device *d = amba_devs[i]; |
| 116 | amba_device_register(d, &iomem_resource); |
| 117 | } |
| 118 | |
| 119 | return 0; |
| 120 | } |
| 121 | |
| 122 | arch_initcall(integrator_init); |
| 123 | |
Russell King | fbb18a2 | 2006-03-26 23:13:39 +0100 | [diff] [blame] | 124 | /* |
| 125 | * On the Integrator platform, the port RTS and DTR are provided by |
| 126 | * bits in the following SC_CTRLS register bits: |
| 127 | * RTS DTR |
| 128 | * UART0 7 6 |
| 129 | * UART1 5 4 |
| 130 | */ |
| 131 | #define SC_CTRLC (IO_ADDRESS(INTEGRATOR_SC_BASE) + INTEGRATOR_SC_CTRLC_OFFSET) |
| 132 | #define SC_CTRLS (IO_ADDRESS(INTEGRATOR_SC_BASE) + INTEGRATOR_SC_CTRLS_OFFSET) |
| 133 | |
| 134 | static void integrator_uart_set_mctrl(struct amba_device *dev, void __iomem *base, unsigned int mctrl) |
| 135 | { |
| 136 | unsigned int ctrls = 0, ctrlc = 0, rts_mask, dtr_mask; |
| 137 | |
| 138 | if (dev == &uart0_device) { |
| 139 | rts_mask = 1 << 4; |
| 140 | dtr_mask = 1 << 5; |
| 141 | } else { |
| 142 | rts_mask = 1 << 6; |
| 143 | dtr_mask = 1 << 7; |
| 144 | } |
| 145 | |
| 146 | if (mctrl & TIOCM_RTS) |
| 147 | ctrlc |= rts_mask; |
| 148 | else |
| 149 | ctrls |= rts_mask; |
| 150 | |
| 151 | if (mctrl & TIOCM_DTR) |
| 152 | ctrlc |= dtr_mask; |
| 153 | else |
| 154 | ctrls |= dtr_mask; |
| 155 | |
| 156 | __raw_writel(ctrls, SC_CTRLS); |
| 157 | __raw_writel(ctrlc, SC_CTRLC); |
| 158 | } |
| 159 | |
| 160 | static struct amba_pl010_data integrator_uart_data = { |
| 161 | .set_mctrl = integrator_uart_set_mctrl, |
| 162 | }; |
| 163 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 164 | #define CM_CTRL IO_ADDRESS(INTEGRATOR_HDR_BASE) + INTEGRATOR_HDR_CTRL_OFFSET |
| 165 | |
| 166 | static DEFINE_SPINLOCK(cm_lock); |
| 167 | |
| 168 | /** |
| 169 | * cm_control - update the CM_CTRL register. |
| 170 | * @mask: bits to change |
| 171 | * @set: bits to set |
| 172 | */ |
| 173 | void cm_control(u32 mask, u32 set) |
| 174 | { |
| 175 | unsigned long flags; |
| 176 | u32 val; |
| 177 | |
| 178 | spin_lock_irqsave(&cm_lock, flags); |
| 179 | val = readl(CM_CTRL) & ~mask; |
| 180 | writel(val | set, CM_CTRL); |
| 181 | spin_unlock_irqrestore(&cm_lock, flags); |
| 182 | } |
| 183 | |
| 184 | EXPORT_SYMBOL(cm_control); |
| 185 | |
| 186 | /* |
| 187 | * Where is the timer (VA)? |
| 188 | */ |
| 189 | #define TIMER0_VA_BASE (IO_ADDRESS(INTEGRATOR_CT_BASE)+0x00000000) |
| 190 | #define TIMER1_VA_BASE (IO_ADDRESS(INTEGRATOR_CT_BASE)+0x00000100) |
| 191 | #define TIMER2_VA_BASE (IO_ADDRESS(INTEGRATOR_CT_BASE)+0x00000200) |
| 192 | #define VA_IC_BASE IO_ADDRESS(INTEGRATOR_IC_BASE) |
| 193 | |
| 194 | /* |
| 195 | * How long is the timer interval? |
| 196 | */ |
| 197 | #define TIMER_INTERVAL (TICKS_PER_uSEC * mSEC_10) |
| 198 | #if TIMER_INTERVAL >= 0x100000 |
| 199 | #define TICKS2USECS(x) (256 * (x) / TICKS_PER_uSEC) |
| 200 | #elif TIMER_INTERVAL >= 0x10000 |
| 201 | #define TICKS2USECS(x) (16 * (x) / TICKS_PER_uSEC) |
| 202 | #else |
| 203 | #define TICKS2USECS(x) ((x) / TICKS_PER_uSEC) |
| 204 | #endif |
| 205 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 206 | static unsigned long timer_reload; |
| 207 | |
| 208 | /* |
| 209 | * Returns number of ms since last clock interrupt. Note that interrupts |
| 210 | * will have been disabled by do_gettimeoffset() |
| 211 | */ |
| 212 | unsigned long integrator_gettimeoffset(void) |
| 213 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 214 | unsigned long ticks1, ticks2, status; |
| 215 | |
| 216 | /* |
| 217 | * Get the current number of ticks. Note that there is a race |
| 218 | * condition between us reading the timer and checking for |
| 219 | * an interrupt. We get around this by ensuring that the |
| 220 | * counter has not reloaded between our two reads. |
| 221 | */ |
Russell King | b720f73 | 2005-06-29 15:15:54 +0100 | [diff] [blame] | 222 | ticks2 = readl(TIMER1_VA_BASE + TIMER_VALUE) & 0xffff; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 223 | do { |
| 224 | ticks1 = ticks2; |
| 225 | status = __raw_readl(VA_IC_BASE + IRQ_RAW_STATUS); |
Russell King | b720f73 | 2005-06-29 15:15:54 +0100 | [diff] [blame] | 226 | ticks2 = readl(TIMER1_VA_BASE + TIMER_VALUE) & 0xffff; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 227 | } while (ticks2 > ticks1); |
| 228 | |
| 229 | /* |
| 230 | * Number of ticks since last interrupt. |
| 231 | */ |
| 232 | ticks1 = timer_reload - ticks2; |
| 233 | |
| 234 | /* |
| 235 | * Interrupt pending? If so, we've reloaded once already. |
| 236 | */ |
| 237 | if (status & (1 << IRQ_TIMERINT1)) |
| 238 | ticks1 += timer_reload; |
| 239 | |
| 240 | /* |
| 241 | * Convert the ticks to usecs |
| 242 | */ |
| 243 | return TICKS2USECS(ticks1); |
| 244 | } |
| 245 | |
| 246 | /* |
| 247 | * IRQ handler for the timer |
| 248 | */ |
| 249 | static irqreturn_t |
| 250 | integrator_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) |
| 251 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 252 | write_seqlock(&xtime_lock); |
| 253 | |
Russell King | 1f9c381 | 2005-05-03 12:22:19 +0100 | [diff] [blame] | 254 | /* |
| 255 | * clear the interrupt |
| 256 | */ |
Russell King | b720f73 | 2005-06-29 15:15:54 +0100 | [diff] [blame] | 257 | writel(1, TIMER1_VA_BASE + TIMER_INTCLR); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 258 | |
Russell King | 20cf33e | 2005-06-18 10:15:46 +0100 | [diff] [blame] | 259 | /* |
| 260 | * the clock tick routines are only processed on the |
| 261 | * primary CPU |
| 262 | */ |
| 263 | if (hard_smp_processor_id() == 0) { |
Russell King | 20cf33e | 2005-06-18 10:15:46 +0100 | [diff] [blame] | 264 | timer_tick(regs); |
| 265 | #ifdef CONFIG_SMP |
| 266 | smp_send_timer(); |
| 267 | #endif |
| 268 | } |
| 269 | |
| 270 | #ifdef CONFIG_SMP |
| 271 | /* |
| 272 | * this is the ARM equivalent of the APIC timer interrupt |
| 273 | */ |
| 274 | update_process_times(user_mode(regs)); |
| 275 | #endif /* CONFIG_SMP */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 276 | |
| 277 | write_sequnlock(&xtime_lock); |
| 278 | |
| 279 | return IRQ_HANDLED; |
| 280 | } |
| 281 | |
| 282 | static struct irqaction integrator_timer_irq = { |
| 283 | .name = "Integrator Timer Tick", |
Russell King | 09b8b5f | 2005-06-26 17:06:36 +0100 | [diff] [blame] | 284 | .flags = SA_INTERRUPT | SA_TIMER, |
| 285 | .handler = integrator_timer_interrupt, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 286 | }; |
| 287 | |
| 288 | /* |
| 289 | * Set up timer interrupt, and return the current time in seconds. |
| 290 | */ |
| 291 | void __init integrator_time_init(unsigned long reload, unsigned int ctrl) |
| 292 | { |
Russell King | b720f73 | 2005-06-29 15:15:54 +0100 | [diff] [blame] | 293 | unsigned int timer_ctrl = TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 294 | |
| 295 | timer_reload = reload; |
| 296 | timer_ctrl |= ctrl; |
| 297 | |
| 298 | if (timer_reload > 0x100000) { |
| 299 | timer_reload >>= 8; |
Russell King | b720f73 | 2005-06-29 15:15:54 +0100 | [diff] [blame] | 300 | timer_ctrl |= TIMER_CTRL_DIV256; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 301 | } else if (timer_reload > 0x010000) { |
| 302 | timer_reload >>= 4; |
Russell King | b720f73 | 2005-06-29 15:15:54 +0100 | [diff] [blame] | 303 | timer_ctrl |= TIMER_CTRL_DIV16; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 304 | } |
| 305 | |
| 306 | /* |
| 307 | * Initialise to a known state (all timers off) |
| 308 | */ |
Russell King | b720f73 | 2005-06-29 15:15:54 +0100 | [diff] [blame] | 309 | writel(0, TIMER0_VA_BASE + TIMER_CTRL); |
| 310 | writel(0, TIMER1_VA_BASE + TIMER_CTRL); |
| 311 | writel(0, TIMER2_VA_BASE + TIMER_CTRL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 312 | |
Russell King | b720f73 | 2005-06-29 15:15:54 +0100 | [diff] [blame] | 313 | writel(timer_reload, TIMER1_VA_BASE + TIMER_LOAD); |
| 314 | writel(timer_reload, TIMER1_VA_BASE + TIMER_VALUE); |
| 315 | writel(timer_ctrl, TIMER1_VA_BASE + TIMER_CTRL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 316 | |
Russell King | 1f9c381 | 2005-05-03 12:22:19 +0100 | [diff] [blame] | 317 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 318 | * Make irqs happen for the system timer |
| 319 | */ |
| 320 | setup_irq(IRQ_TIMERINT1, &integrator_timer_irq); |
| 321 | } |