Michal Simek | 89272a5 | 2009-03-27 14:25:22 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Early printk support for Microblaze. |
| 3 | * |
| 4 | * Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu> |
| 5 | * Copyright (C) 2007-2009 PetaLogix |
| 6 | * Copyright (C) 2003-2006 Yasushi SHOJI <yashi@atmark-techno.com> |
| 7 | * |
| 8 | * This file is subject to the terms and conditions of the GNU General Public |
| 9 | * License. See the file "COPYING" in the main directory of this archive |
| 10 | * for more details. |
| 11 | */ |
| 12 | |
| 13 | #include <linux/console.h> |
| 14 | #include <linux/kernel.h> |
| 15 | #include <linux/init.h> |
| 16 | #include <linux/string.h> |
| 17 | #include <linux/tty.h> |
| 18 | #include <linux/io.h> |
| 19 | #include <asm/processor.h> |
| 20 | #include <linux/fcntl.h> |
| 21 | #include <asm/setup.h> |
| 22 | #include <asm/prom.h> |
| 23 | |
Michal Simek | 89272a5 | 2009-03-27 14:25:22 +0100 | [diff] [blame] | 24 | static u32 base_addr; |
| 25 | |
Michal Simek | 51f5fa5 | 2010-09-28 16:40:00 +1000 | [diff] [blame] | 26 | #ifdef CONFIG_SERIAL_UARTLITE_CONSOLE |
Michal Simek | 2af9ebe | 2010-09-28 16:33:53 +1000 | [diff] [blame] | 27 | static void early_printk_uartlite_putc(char c) |
Michal Simek | 89272a5 | 2009-03-27 14:25:22 +0100 | [diff] [blame] | 28 | { |
| 29 | /* |
| 30 | * Limit how many times we'll spin waiting for TX FIFO status. |
| 31 | * This will prevent lockups if the base address is incorrectly |
| 32 | * set, or any other issue on the UARTLITE. |
| 33 | * This limit is pretty arbitrary, unless we are at about 10 baud |
| 34 | * we'll never timeout on a working UART. |
| 35 | */ |
| 36 | |
Michal Simek | ca12adc | 2011-04-06 13:06:45 +0200 | [diff] [blame] | 37 | unsigned retries = 1000000; |
Michal Simek | 89272a5 | 2009-03-27 14:25:22 +0100 | [diff] [blame] | 38 | /* read status bit - 0x8 offset */ |
Roel Kluin | 6e60c14 | 2009-04-16 22:49:17 +0200 | [diff] [blame] | 39 | while (--retries && (in_be32(base_addr + 8) & (1 << 3))) |
Michal Simek | 89272a5 | 2009-03-27 14:25:22 +0100 | [diff] [blame] | 40 | ; |
| 41 | |
| 42 | /* Only attempt the iowrite if we didn't timeout */ |
| 43 | /* write to TX_FIFO - 0x4 offset */ |
| 44 | if (retries) |
| 45 | out_be32(base_addr + 4, c & 0xff); |
| 46 | } |
| 47 | |
Michal Simek | 2af9ebe | 2010-09-28 16:33:53 +1000 | [diff] [blame] | 48 | static void early_printk_uartlite_write(struct console *unused, |
Michal Simek | 89272a5 | 2009-03-27 14:25:22 +0100 | [diff] [blame] | 49 | const char *s, unsigned n) |
| 50 | { |
| 51 | while (*s && n-- > 0) { |
Michal Simek | 89272a5 | 2009-03-27 14:25:22 +0100 | [diff] [blame] | 52 | if (*s == '\n') |
Michal Simek | 2af9ebe | 2010-09-28 16:33:53 +1000 | [diff] [blame] | 53 | early_printk_uartlite_putc('\r'); |
Michal Simek | a8c2e55 | 2011-11-10 13:40:08 +0100 | [diff] [blame] | 54 | early_printk_uartlite_putc(*s); |
Michal Simek | 89272a5 | 2009-03-27 14:25:22 +0100 | [diff] [blame] | 55 | s++; |
| 56 | } |
| 57 | } |
| 58 | |
Michal Simek | 2af9ebe | 2010-09-28 16:33:53 +1000 | [diff] [blame] | 59 | static struct console early_serial_uartlite_console = { |
Michal Simek | 89272a5 | 2009-03-27 14:25:22 +0100 | [diff] [blame] | 60 | .name = "earlyser", |
Michal Simek | 2af9ebe | 2010-09-28 16:33:53 +1000 | [diff] [blame] | 61 | .write = early_printk_uartlite_write, |
Michal Simek | e721a45 | 2011-04-04 15:45:06 +0200 | [diff] [blame] | 62 | .flags = CON_PRINTBUFFER | CON_BOOT, |
Michal Simek | 89272a5 | 2009-03-27 14:25:22 +0100 | [diff] [blame] | 63 | .index = -1, |
| 64 | }; |
Michal Simek | 51f5fa5 | 2010-09-28 16:40:00 +1000 | [diff] [blame] | 65 | #endif /* CONFIG_SERIAL_UARTLITE_CONSOLE */ |
Michal Simek | 89272a5 | 2009-03-27 14:25:22 +0100 | [diff] [blame] | 66 | |
Michal Simek | 67f4aaa | 2010-09-28 16:17:03 +1000 | [diff] [blame] | 67 | #ifdef CONFIG_SERIAL_8250_CONSOLE |
| 68 | static void early_printk_uart16550_putc(char c) |
| 69 | { |
| 70 | /* |
| 71 | * Limit how many times we'll spin waiting for TX FIFO status. |
| 72 | * This will prevent lockups if the base address is incorrectly |
| 73 | * set, or any other issue on the UARTLITE. |
| 74 | * This limit is pretty arbitrary, unless we are at about 10 baud |
| 75 | * we'll never timeout on a working UART. |
| 76 | */ |
| 77 | |
| 78 | #define UART_LSR_TEMT 0x40 /* Transmitter empty */ |
| 79 | #define UART_LSR_THRE 0x20 /* Transmit-hold-register empty */ |
| 80 | #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE) |
| 81 | |
| 82 | unsigned retries = 10000; |
| 83 | |
| 84 | while (--retries && |
| 85 | !((in_be32(base_addr + 0x14) & BOTH_EMPTY) == BOTH_EMPTY)) |
| 86 | ; |
| 87 | |
| 88 | if (retries) |
| 89 | out_be32(base_addr, c & 0xff); |
| 90 | } |
| 91 | |
| 92 | static void early_printk_uart16550_write(struct console *unused, |
| 93 | const char *s, unsigned n) |
| 94 | { |
| 95 | while (*s && n-- > 0) { |
Michal Simek | 67f4aaa | 2010-09-28 16:17:03 +1000 | [diff] [blame] | 96 | if (*s == '\n') |
| 97 | early_printk_uart16550_putc('\r'); |
Michal Simek | a8c2e55 | 2011-11-10 13:40:08 +0100 | [diff] [blame] | 98 | early_printk_uart16550_putc(*s); |
Michal Simek | 67f4aaa | 2010-09-28 16:17:03 +1000 | [diff] [blame] | 99 | s++; |
| 100 | } |
| 101 | } |
| 102 | |
| 103 | static struct console early_serial_uart16550_console = { |
| 104 | .name = "earlyser", |
| 105 | .write = early_printk_uart16550_write, |
Michal Simek | e721a45 | 2011-04-04 15:45:06 +0200 | [diff] [blame] | 106 | .flags = CON_PRINTBUFFER | CON_BOOT, |
Michal Simek | 67f4aaa | 2010-09-28 16:17:03 +1000 | [diff] [blame] | 107 | .index = -1, |
| 108 | }; |
| 109 | #endif /* CONFIG_SERIAL_8250_CONSOLE */ |
| 110 | |
Michal Simek | 89272a5 | 2009-03-27 14:25:22 +0100 | [diff] [blame] | 111 | int __init setup_early_printk(char *opt) |
| 112 | { |
Michal Simek | 2aa8e37 | 2011-04-14 11:48:43 +0200 | [diff] [blame] | 113 | int version = 0; |
| 114 | |
Thomas Gleixner | d0380e6 | 2013-04-29 16:17:18 -0700 | [diff] [blame] | 115 | if (early_console) |
Michal Simek | 89272a5 | 2009-03-27 14:25:22 +0100 | [diff] [blame] | 116 | return 1; |
| 117 | |
Michal Simek | 2aa8e37 | 2011-04-14 11:48:43 +0200 | [diff] [blame] | 118 | base_addr = of_early_console(&version); |
| 119 | if (base_addr) { |
| 120 | #ifdef CONFIG_MMU |
| 121 | early_console_reg_tlb_alloc(base_addr); |
| 122 | #endif |
| 123 | switch (version) { |
Michal Simek | 51f5fa5 | 2010-09-28 16:40:00 +1000 | [diff] [blame] | 124 | #ifdef CONFIG_SERIAL_UARTLITE_CONSOLE |
Michal Simek | 2aa8e37 | 2011-04-14 11:48:43 +0200 | [diff] [blame] | 125 | case UARTLITE: |
Michal Simek | 6bd55f0 | 2012-12-27 10:40:38 +0100 | [diff] [blame] | 126 | pr_info("Early console on uartlite at 0x%08x\n", |
| 127 | base_addr); |
Michal Simek | 2aa8e37 | 2011-04-14 11:48:43 +0200 | [diff] [blame] | 128 | early_console = &early_serial_uartlite_console; |
| 129 | break; |
Michal Simek | a43acfb | 2009-05-26 16:30:10 +0200 | [diff] [blame] | 130 | #endif |
Michal Simek | 67f4aaa | 2010-09-28 16:17:03 +1000 | [diff] [blame] | 131 | #ifdef CONFIG_SERIAL_8250_CONSOLE |
Michal Simek | 2aa8e37 | 2011-04-14 11:48:43 +0200 | [diff] [blame] | 132 | case UART16550: |
Michal Simek | 6bd55f0 | 2012-12-27 10:40:38 +0100 | [diff] [blame] | 133 | pr_info("Early console on uart16650 at 0x%08x\n", |
| 134 | base_addr); |
Michal Simek | 2aa8e37 | 2011-04-14 11:48:43 +0200 | [diff] [blame] | 135 | early_console = &early_serial_uart16550_console; |
| 136 | break; |
Michal Simek | 67f4aaa | 2010-09-28 16:17:03 +1000 | [diff] [blame] | 137 | #endif |
Michal Simek | 2aa8e37 | 2011-04-14 11:48:43 +0200 | [diff] [blame] | 138 | default: |
Michal Simek | 6bd55f0 | 2012-12-27 10:40:38 +0100 | [diff] [blame] | 139 | pr_info("Unsupported early console %d\n", |
Michal Simek | 2aa8e37 | 2011-04-14 11:48:43 +0200 | [diff] [blame] | 140 | version); |
| 141 | return 1; |
| 142 | } |
Michal Simek | 67f4aaa | 2010-09-28 16:17:03 +1000 | [diff] [blame] | 143 | |
Michal Simek | e721a45 | 2011-04-04 15:45:06 +0200 | [diff] [blame] | 144 | register_console(early_console); |
Michal Simek | 67f4aaa | 2010-09-28 16:17:03 +1000 | [diff] [blame] | 145 | return 0; |
| 146 | } |
Michal Simek | 51f5fa5 | 2010-09-28 16:40:00 +1000 | [diff] [blame] | 147 | return 1; |
Michal Simek | 89272a5 | 2009-03-27 14:25:22 +0100 | [diff] [blame] | 148 | } |
| 149 | |
Michal Simek | e721a45 | 2011-04-04 15:45:06 +0200 | [diff] [blame] | 150 | /* Remap early console to virtual address and do not allocate one TLB |
| 151 | * only for early console because of performance degression */ |
| 152 | void __init remap_early_printk(void) |
| 153 | { |
Thomas Gleixner | d0380e6 | 2013-04-29 16:17:18 -0700 | [diff] [blame] | 154 | if (!early_console) |
Michal Simek | e721a45 | 2011-04-04 15:45:06 +0200 | [diff] [blame] | 155 | return; |
Michal Simek | 6bd55f0 | 2012-12-27 10:40:38 +0100 | [diff] [blame] | 156 | pr_info("early_printk_console remapping from 0x%x to ", base_addr); |
Michal Simek | e721a45 | 2011-04-04 15:45:06 +0200 | [diff] [blame] | 157 | base_addr = (u32) ioremap(base_addr, PAGE_SIZE); |
Michal Simek | 6bd55f0 | 2012-12-27 10:40:38 +0100 | [diff] [blame] | 158 | pr_cont("0x%x\n", base_addr); |
Michal Simek | e02db0a | 2010-02-08 16:41:38 +0100 | [diff] [blame] | 159 | |
Michal Simek | 0fc7374 | 2012-04-02 12:50:54 +0200 | [diff] [blame] | 160 | #ifdef CONFIG_MMU |
Michal Simek | e02db0a | 2010-02-08 16:41:38 +0100 | [diff] [blame] | 161 | /* |
| 162 | * Early console is on the top of skipped TLB entries |
| 163 | * decrease tlb_skip size ensure that hardcoded TLB entry will be |
| 164 | * used by generic algorithm |
| 165 | * FIXME check if early console mapping is on the top by rereading |
| 166 | * TLB entry and compare baseaddr |
| 167 | * mts rtlbx, (tlb_skip - 1) |
| 168 | * nop |
| 169 | * mfs rX, rtlblo |
| 170 | * nop |
| 171 | * cmp rX, orig_base_addr |
| 172 | */ |
| 173 | tlb_skip -= 1; |
Michal Simek | 0fc7374 | 2012-04-02 12:50:54 +0200 | [diff] [blame] | 174 | #endif |
Michal Simek | e721a45 | 2011-04-04 15:45:06 +0200 | [diff] [blame] | 175 | } |
| 176 | |
Michal Simek | 89272a5 | 2009-03-27 14:25:22 +0100 | [diff] [blame] | 177 | void __init disable_early_printk(void) |
| 178 | { |
Thomas Gleixner | d0380e6 | 2013-04-29 16:17:18 -0700 | [diff] [blame] | 179 | if (!early_console) |
Michal Simek | 89272a5 | 2009-03-27 14:25:22 +0100 | [diff] [blame] | 180 | return; |
Michal Simek | 6bd55f0 | 2012-12-27 10:40:38 +0100 | [diff] [blame] | 181 | pr_warn("disabling early console\n"); |
Michal Simek | 89272a5 | 2009-03-27 14:25:22 +0100 | [diff] [blame] | 182 | unregister_console(early_console); |
Thomas Gleixner | d0380e6 | 2013-04-29 16:17:18 -0700 | [diff] [blame] | 183 | early_console = NULL; |
Michal Simek | 89272a5 | 2009-03-27 14:25:22 +0100 | [diff] [blame] | 184 | } |