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Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001/*
2 * linux/arch/arm/plat-omap/gpio.c
3 *
4 * Support functions for OMAP GPIO
5 *
Tony Lindgren92105bb2005-09-07 17:20:26 +01006 * Copyright (C) 2003-2005 Nokia Corporation
Jan Engelhardt96de0e22007-10-19 23:21:04 +02007 * Written by Juha Yrjölä <juha.yrjola@nokia.com>
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01008 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +010014#include <linux/init.h>
15#include <linux/module.h>
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +010016#include <linux/interrupt.h>
Tony Lindgren92105bb2005-09-07 17:20:26 +010017#include <linux/sysdev.h>
18#include <linux/err.h>
Russell Kingf8ce2542006-01-07 16:15:52 +000019#include <linux/clk.h>
Russell Kingfced80c2008-09-06 12:10:45 +010020#include <linux/io.h>
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +010021
Russell Kinga09e64f2008-08-05 16:14:15 +010022#include <mach/hardware.h>
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +010023#include <asm/irq.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010024#include <mach/irqs.h>
25#include <mach/gpio.h>
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +010026#include <asm/mach/irq.h>
27
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +010028/*
29 * OMAP1510 GPIO registers
30 */
Russell King7c7095a2008-09-05 15:49:14 +010031#define OMAP1510_GPIO_BASE IO_ADDRESS(0xfffce000)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +010032#define OMAP1510_GPIO_DATA_INPUT 0x00
33#define OMAP1510_GPIO_DATA_OUTPUT 0x04
34#define OMAP1510_GPIO_DIR_CONTROL 0x08
35#define OMAP1510_GPIO_INT_CONTROL 0x0c
36#define OMAP1510_GPIO_INT_MASK 0x10
37#define OMAP1510_GPIO_INT_STATUS 0x14
38#define OMAP1510_GPIO_PIN_CONTROL 0x18
39
40#define OMAP1510_IH_GPIO_BASE 64
41
42/*
43 * OMAP1610 specific GPIO registers
44 */
Russell King7c7095a2008-09-05 15:49:14 +010045#define OMAP1610_GPIO1_BASE IO_ADDRESS(0xfffbe400)
46#define OMAP1610_GPIO2_BASE IO_ADDRESS(0xfffbec00)
47#define OMAP1610_GPIO3_BASE IO_ADDRESS(0xfffbb400)
48#define OMAP1610_GPIO4_BASE IO_ADDRESS(0xfffbbc00)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +010049#define OMAP1610_GPIO_REVISION 0x0000
50#define OMAP1610_GPIO_SYSCONFIG 0x0010
51#define OMAP1610_GPIO_SYSSTATUS 0x0014
52#define OMAP1610_GPIO_IRQSTATUS1 0x0018
53#define OMAP1610_GPIO_IRQENABLE1 0x001c
Tony Lindgren92105bb2005-09-07 17:20:26 +010054#define OMAP1610_GPIO_WAKEUPENABLE 0x0028
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +010055#define OMAP1610_GPIO_DATAIN 0x002c
56#define OMAP1610_GPIO_DATAOUT 0x0030
57#define OMAP1610_GPIO_DIRECTION 0x0034
58#define OMAP1610_GPIO_EDGE_CTRL1 0x0038
59#define OMAP1610_GPIO_EDGE_CTRL2 0x003c
60#define OMAP1610_GPIO_CLEAR_IRQENABLE1 0x009c
Tony Lindgren92105bb2005-09-07 17:20:26 +010061#define OMAP1610_GPIO_CLEAR_WAKEUPENA 0x00a8
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +010062#define OMAP1610_GPIO_CLEAR_DATAOUT 0x00b0
63#define OMAP1610_GPIO_SET_IRQENABLE1 0x00dc
Tony Lindgren92105bb2005-09-07 17:20:26 +010064#define OMAP1610_GPIO_SET_WAKEUPENA 0x00e8
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +010065#define OMAP1610_GPIO_SET_DATAOUT 0x00f0
66
67/*
68 * OMAP730 specific GPIO registers
69 */
Russell King7c7095a2008-09-05 15:49:14 +010070#define OMAP730_GPIO1_BASE IO_ADDRESS(0xfffbc000)
71#define OMAP730_GPIO2_BASE IO_ADDRESS(0xfffbc800)
72#define OMAP730_GPIO3_BASE IO_ADDRESS(0xfffbd000)
73#define OMAP730_GPIO4_BASE IO_ADDRESS(0xfffbd800)
74#define OMAP730_GPIO5_BASE IO_ADDRESS(0xfffbe000)
75#define OMAP730_GPIO6_BASE IO_ADDRESS(0xfffbe800)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +010076#define OMAP730_GPIO_DATA_INPUT 0x00
77#define OMAP730_GPIO_DATA_OUTPUT 0x04
78#define OMAP730_GPIO_DIR_CONTROL 0x08
79#define OMAP730_GPIO_INT_CONTROL 0x0c
80#define OMAP730_GPIO_INT_MASK 0x10
81#define OMAP730_GPIO_INT_STATUS 0x14
82
Tony Lindgren92105bb2005-09-07 17:20:26 +010083/*
84 * omap24xx specific GPIO registers
85 */
Russell King7c7095a2008-09-05 15:49:14 +010086#define OMAP242X_GPIO1_BASE IO_ADDRESS(0x48018000)
87#define OMAP242X_GPIO2_BASE IO_ADDRESS(0x4801a000)
88#define OMAP242X_GPIO3_BASE IO_ADDRESS(0x4801c000)
89#define OMAP242X_GPIO4_BASE IO_ADDRESS(0x4801e000)
Syed Mohammed Khasim56a25642006-12-06 17:14:08 -080090
Russell King7c7095a2008-09-05 15:49:14 +010091#define OMAP243X_GPIO1_BASE IO_ADDRESS(0x4900C000)
92#define OMAP243X_GPIO2_BASE IO_ADDRESS(0x4900E000)
93#define OMAP243X_GPIO3_BASE IO_ADDRESS(0x49010000)
94#define OMAP243X_GPIO4_BASE IO_ADDRESS(0x49012000)
95#define OMAP243X_GPIO5_BASE IO_ADDRESS(0x480B6000)
Syed Mohammed Khasim56a25642006-12-06 17:14:08 -080096
Tony Lindgren92105bb2005-09-07 17:20:26 +010097#define OMAP24XX_GPIO_REVISION 0x0000
98#define OMAP24XX_GPIO_SYSCONFIG 0x0010
99#define OMAP24XX_GPIO_SYSSTATUS 0x0014
100#define OMAP24XX_GPIO_IRQSTATUS1 0x0018
Hiroshi DOYUbee79302006-09-25 12:41:46 +0300101#define OMAP24XX_GPIO_IRQSTATUS2 0x0028
102#define OMAP24XX_GPIO_IRQENABLE2 0x002c
Tony Lindgren92105bb2005-09-07 17:20:26 +0100103#define OMAP24XX_GPIO_IRQENABLE1 0x001c
Tero Kristo723fdb72008-11-26 14:35:16 -0800104#define OMAP24XX_GPIO_WAKE_EN 0x0020
Tony Lindgren92105bb2005-09-07 17:20:26 +0100105#define OMAP24XX_GPIO_CTRL 0x0030
106#define OMAP24XX_GPIO_OE 0x0034
107#define OMAP24XX_GPIO_DATAIN 0x0038
108#define OMAP24XX_GPIO_DATAOUT 0x003c
109#define OMAP24XX_GPIO_LEVELDETECT0 0x0040
110#define OMAP24XX_GPIO_LEVELDETECT1 0x0044
111#define OMAP24XX_GPIO_RISINGDETECT 0x0048
112#define OMAP24XX_GPIO_FALLINGDETECT 0x004c
Kevin Hilman5eb3bb92007-05-05 11:40:29 -0700113#define OMAP24XX_GPIO_DEBOUNCE_EN 0x0050
114#define OMAP24XX_GPIO_DEBOUNCE_VAL 0x0054
Tony Lindgren92105bb2005-09-07 17:20:26 +0100115#define OMAP24XX_GPIO_CLEARIRQENABLE1 0x0060
116#define OMAP24XX_GPIO_SETIRQENABLE1 0x0064
117#define OMAP24XX_GPIO_CLEARWKUENA 0x0080
118#define OMAP24XX_GPIO_SETWKUENA 0x0084
119#define OMAP24XX_GPIO_CLEARDATAOUT 0x0090
120#define OMAP24XX_GPIO_SETDATAOUT 0x0094
121
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -0800122/*
123 * omap34xx specific GPIO registers
124 */
125
Russell King7c7095a2008-09-05 15:49:14 +0100126#define OMAP34XX_GPIO1_BASE IO_ADDRESS(0x48310000)
127#define OMAP34XX_GPIO2_BASE IO_ADDRESS(0x49050000)
128#define OMAP34XX_GPIO3_BASE IO_ADDRESS(0x49052000)
129#define OMAP34XX_GPIO4_BASE IO_ADDRESS(0x49054000)
130#define OMAP34XX_GPIO5_BASE IO_ADDRESS(0x49056000)
131#define OMAP34XX_GPIO6_BASE IO_ADDRESS(0x49058000)
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -0800132
Russell King7c7095a2008-09-05 15:49:14 +0100133#define OMAP_MPUIO_VBASE IO_ADDRESS(OMAP_MPUIO_BASE)
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -0800134
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100135struct gpio_bank {
Tony Lindgren92105bb2005-09-07 17:20:26 +0100136 void __iomem *base;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100137 u16 irq;
138 u16 virtual_irq_start;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100139 int method;
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -0800140#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100141 u32 suspend_wakeup;
142 u32 saved_wakeup;
Juha Yrjola3ac4fa92006-12-06 17:13:52 -0800143#endif
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -0800144#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
Juha Yrjola3ac4fa92006-12-06 17:13:52 -0800145 u32 non_wakeup_gpios;
146 u32 enabled_non_wakeup_gpios;
147
148 u32 saved_datain;
149 u32 saved_fallingdetect;
150 u32 saved_risingdetect;
151#endif
Kevin Hilmanb144ff62008-01-16 21:56:15 -0800152 u32 level_mask;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100153 spinlock_t lock;
David Brownell52e31342008-03-03 12:43:23 -0800154 struct gpio_chip chip;
Jouni Hogander89db9482008-12-10 17:35:24 -0800155 struct clk *dbck;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100156};
157
158#define METHOD_MPUIO 0
159#define METHOD_GPIO_1510 1
160#define METHOD_GPIO_1610 2
161#define METHOD_GPIO_730 3
Tony Lindgren92105bb2005-09-07 17:20:26 +0100162#define METHOD_GPIO_24XX 4
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100163
Tony Lindgren92105bb2005-09-07 17:20:26 +0100164#ifdef CONFIG_ARCH_OMAP16XX
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100165static struct gpio_bank gpio_bank_1610[5] = {
Russell King7c7095a2008-09-05 15:49:14 +0100166 { OMAP_MPUIO_VBASE, INT_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO},
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100167 { OMAP1610_GPIO1_BASE, INT_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_1610 },
168 { OMAP1610_GPIO2_BASE, INT_1610_GPIO_BANK2, IH_GPIO_BASE + 16, METHOD_GPIO_1610 },
169 { OMAP1610_GPIO3_BASE, INT_1610_GPIO_BANK3, IH_GPIO_BASE + 32, METHOD_GPIO_1610 },
170 { OMAP1610_GPIO4_BASE, INT_1610_GPIO_BANK4, IH_GPIO_BASE + 48, METHOD_GPIO_1610 },
171};
172#endif
173
Tony Lindgren1a8bfa12005-11-10 14:26:50 +0000174#ifdef CONFIG_ARCH_OMAP15XX
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100175static struct gpio_bank gpio_bank_1510[2] = {
Russell King7c7095a2008-09-05 15:49:14 +0100176 { OMAP_MPUIO_VBASE, INT_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO },
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100177 { OMAP1510_GPIO_BASE, INT_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_1510 }
178};
179#endif
180
181#ifdef CONFIG_ARCH_OMAP730
182static struct gpio_bank gpio_bank_730[7] = {
Russell King7c7095a2008-09-05 15:49:14 +0100183 { OMAP_MPUIO_VBASE, INT_730_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO },
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100184 { OMAP730_GPIO1_BASE, INT_730_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_730 },
185 { OMAP730_GPIO2_BASE, INT_730_GPIO_BANK2, IH_GPIO_BASE + 32, METHOD_GPIO_730 },
186 { OMAP730_GPIO3_BASE, INT_730_GPIO_BANK3, IH_GPIO_BASE + 64, METHOD_GPIO_730 },
187 { OMAP730_GPIO4_BASE, INT_730_GPIO_BANK4, IH_GPIO_BASE + 96, METHOD_GPIO_730 },
188 { OMAP730_GPIO5_BASE, INT_730_GPIO_BANK5, IH_GPIO_BASE + 128, METHOD_GPIO_730 },
189 { OMAP730_GPIO6_BASE, INT_730_GPIO_BANK6, IH_GPIO_BASE + 160, METHOD_GPIO_730 },
190};
191#endif
192
Tony Lindgren92105bb2005-09-07 17:20:26 +0100193#ifdef CONFIG_ARCH_OMAP24XX
Syed Mohammed Khasim56a25642006-12-06 17:14:08 -0800194
195static struct gpio_bank gpio_bank_242x[4] = {
196 { OMAP242X_GPIO1_BASE, INT_24XX_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_24XX },
197 { OMAP242X_GPIO2_BASE, INT_24XX_GPIO_BANK2, IH_GPIO_BASE + 32, METHOD_GPIO_24XX },
198 { OMAP242X_GPIO3_BASE, INT_24XX_GPIO_BANK3, IH_GPIO_BASE + 64, METHOD_GPIO_24XX },
199 { OMAP242X_GPIO4_BASE, INT_24XX_GPIO_BANK4, IH_GPIO_BASE + 96, METHOD_GPIO_24XX },
Tony Lindgren92105bb2005-09-07 17:20:26 +0100200};
Syed Mohammed Khasim56a25642006-12-06 17:14:08 -0800201
202static struct gpio_bank gpio_bank_243x[5] = {
203 { OMAP243X_GPIO1_BASE, INT_24XX_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_24XX },
204 { OMAP243X_GPIO2_BASE, INT_24XX_GPIO_BANK2, IH_GPIO_BASE + 32, METHOD_GPIO_24XX },
205 { OMAP243X_GPIO3_BASE, INT_24XX_GPIO_BANK3, IH_GPIO_BASE + 64, METHOD_GPIO_24XX },
206 { OMAP243X_GPIO4_BASE, INT_24XX_GPIO_BANK4, IH_GPIO_BASE + 96, METHOD_GPIO_24XX },
207 { OMAP243X_GPIO5_BASE, INT_24XX_GPIO_BANK5, IH_GPIO_BASE + 128, METHOD_GPIO_24XX },
208};
209
Tony Lindgren92105bb2005-09-07 17:20:26 +0100210#endif
211
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -0800212#ifdef CONFIG_ARCH_OMAP34XX
213static struct gpio_bank gpio_bank_34xx[6] = {
214 { OMAP34XX_GPIO1_BASE, INT_34XX_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_24XX },
215 { OMAP34XX_GPIO2_BASE, INT_34XX_GPIO_BANK2, IH_GPIO_BASE + 32, METHOD_GPIO_24XX },
216 { OMAP34XX_GPIO3_BASE, INT_34XX_GPIO_BANK3, IH_GPIO_BASE + 64, METHOD_GPIO_24XX },
217 { OMAP34XX_GPIO4_BASE, INT_34XX_GPIO_BANK4, IH_GPIO_BASE + 96, METHOD_GPIO_24XX },
218 { OMAP34XX_GPIO5_BASE, INT_34XX_GPIO_BANK5, IH_GPIO_BASE + 128, METHOD_GPIO_24XX },
219 { OMAP34XX_GPIO6_BASE, INT_34XX_GPIO_BANK6, IH_GPIO_BASE + 160, METHOD_GPIO_24XX },
220};
221
222#endif
223
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100224static struct gpio_bank *gpio_bank;
225static int gpio_bank_count;
226
227static inline struct gpio_bank *get_gpio_bank(int gpio)
228{
Tony Lindgren6e60e792006-04-02 17:46:23 +0100229 if (cpu_is_omap15xx()) {
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100230 if (OMAP_GPIO_IS_MPUIO(gpio))
231 return &gpio_bank[0];
232 return &gpio_bank[1];
233 }
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100234 if (cpu_is_omap16xx()) {
235 if (OMAP_GPIO_IS_MPUIO(gpio))
236 return &gpio_bank[0];
237 return &gpio_bank[1 + (gpio >> 4)];
238 }
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100239 if (cpu_is_omap730()) {
240 if (OMAP_GPIO_IS_MPUIO(gpio))
241 return &gpio_bank[0];
242 return &gpio_bank[1 + (gpio >> 5)];
243 }
Tony Lindgren92105bb2005-09-07 17:20:26 +0100244 if (cpu_is_omap24xx())
245 return &gpio_bank[gpio >> 5];
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -0800246 if (cpu_is_omap34xx())
247 return &gpio_bank[gpio >> 5];
David Brownelle031ab22008-12-10 17:35:27 -0800248 BUG();
249 return NULL;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100250}
251
252static inline int get_gpio_index(int gpio)
253{
254 if (cpu_is_omap730())
255 return gpio & 0x1f;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100256 if (cpu_is_omap24xx())
257 return gpio & 0x1f;
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -0800258 if (cpu_is_omap34xx())
259 return gpio & 0x1f;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100260 return gpio & 0x0f;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100261}
262
263static inline int gpio_valid(int gpio)
264{
265 if (gpio < 0)
266 return -1;
Tony Lindgrend11ac972008-01-12 15:35:04 -0800267 if (cpu_class_is_omap1() && OMAP_GPIO_IS_MPUIO(gpio)) {
Jonathan McDowell193e68b2006-09-25 12:41:30 +0300268 if (gpio >= OMAP_MAX_GPIO_LINES + 16)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100269 return -1;
270 return 0;
271 }
Tony Lindgren6e60e792006-04-02 17:46:23 +0100272 if (cpu_is_omap15xx() && gpio < 16)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100273 return 0;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100274 if ((cpu_is_omap16xx()) && gpio < 64)
275 return 0;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100276 if (cpu_is_omap730() && gpio < 192)
277 return 0;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100278 if (cpu_is_omap24xx() && gpio < 128)
279 return 0;
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -0800280 if (cpu_is_omap34xx() && gpio < 160)
281 return 0;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100282 return -1;
283}
284
285static int check_gpio(int gpio)
286{
287 if (unlikely(gpio_valid(gpio)) < 0) {
288 printk(KERN_ERR "omap-gpio: invalid GPIO %d\n", gpio);
289 dump_stack();
290 return -1;
291 }
292 return 0;
293}
294
295static void _set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input)
296{
Tony Lindgren92105bb2005-09-07 17:20:26 +0100297 void __iomem *reg = bank->base;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100298 u32 l;
299
300 switch (bank->method) {
David Brownelle5c56ed2006-12-06 17:13:59 -0800301#ifdef CONFIG_ARCH_OMAP1
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100302 case METHOD_MPUIO:
303 reg += OMAP_MPUIO_IO_CNTL;
304 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800305#endif
306#ifdef CONFIG_ARCH_OMAP15XX
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100307 case METHOD_GPIO_1510:
308 reg += OMAP1510_GPIO_DIR_CONTROL;
309 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800310#endif
311#ifdef CONFIG_ARCH_OMAP16XX
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100312 case METHOD_GPIO_1610:
313 reg += OMAP1610_GPIO_DIRECTION;
314 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800315#endif
316#ifdef CONFIG_ARCH_OMAP730
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100317 case METHOD_GPIO_730:
318 reg += OMAP730_GPIO_DIR_CONTROL;
319 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800320#endif
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -0800321#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100322 case METHOD_GPIO_24XX:
323 reg += OMAP24XX_GPIO_OE;
324 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800325#endif
326 default:
327 WARN_ON(1);
328 return;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100329 }
330 l = __raw_readl(reg);
331 if (is_input)
332 l |= 1 << gpio;
333 else
334 l &= ~(1 << gpio);
335 __raw_writel(l, reg);
336}
337
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100338static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable)
339{
Tony Lindgren92105bb2005-09-07 17:20:26 +0100340 void __iomem *reg = bank->base;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100341 u32 l = 0;
342
343 switch (bank->method) {
David Brownelle5c56ed2006-12-06 17:13:59 -0800344#ifdef CONFIG_ARCH_OMAP1
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100345 case METHOD_MPUIO:
346 reg += OMAP_MPUIO_OUTPUT;
347 l = __raw_readl(reg);
348 if (enable)
349 l |= 1 << gpio;
350 else
351 l &= ~(1 << gpio);
352 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800353#endif
354#ifdef CONFIG_ARCH_OMAP15XX
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100355 case METHOD_GPIO_1510:
356 reg += OMAP1510_GPIO_DATA_OUTPUT;
357 l = __raw_readl(reg);
358 if (enable)
359 l |= 1 << gpio;
360 else
361 l &= ~(1 << gpio);
362 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800363#endif
364#ifdef CONFIG_ARCH_OMAP16XX
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100365 case METHOD_GPIO_1610:
366 if (enable)
367 reg += OMAP1610_GPIO_SET_DATAOUT;
368 else
369 reg += OMAP1610_GPIO_CLEAR_DATAOUT;
370 l = 1 << gpio;
371 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800372#endif
373#ifdef CONFIG_ARCH_OMAP730
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100374 case METHOD_GPIO_730:
375 reg += OMAP730_GPIO_DATA_OUTPUT;
376 l = __raw_readl(reg);
377 if (enable)
378 l |= 1 << gpio;
379 else
380 l &= ~(1 << gpio);
381 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800382#endif
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -0800383#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100384 case METHOD_GPIO_24XX:
385 if (enable)
386 reg += OMAP24XX_GPIO_SETDATAOUT;
387 else
388 reg += OMAP24XX_GPIO_CLEARDATAOUT;
389 l = 1 << gpio;
390 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800391#endif
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100392 default:
David Brownelle5c56ed2006-12-06 17:13:59 -0800393 WARN_ON(1);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100394 return;
395 }
396 __raw_writel(l, reg);
397}
398
David Brownell0b84b5c2008-12-10 17:35:25 -0800399static int __omap_get_gpio_datain(int gpio)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100400{
401 struct gpio_bank *bank;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100402 void __iomem *reg;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100403
404 if (check_gpio(gpio) < 0)
David Brownelle5c56ed2006-12-06 17:13:59 -0800405 return -EINVAL;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100406 bank = get_gpio_bank(gpio);
407 reg = bank->base;
408 switch (bank->method) {
David Brownelle5c56ed2006-12-06 17:13:59 -0800409#ifdef CONFIG_ARCH_OMAP1
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100410 case METHOD_MPUIO:
411 reg += OMAP_MPUIO_INPUT_LATCH;
412 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800413#endif
414#ifdef CONFIG_ARCH_OMAP15XX
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100415 case METHOD_GPIO_1510:
416 reg += OMAP1510_GPIO_DATA_INPUT;
417 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800418#endif
419#ifdef CONFIG_ARCH_OMAP16XX
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100420 case METHOD_GPIO_1610:
421 reg += OMAP1610_GPIO_DATAIN;
422 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800423#endif
424#ifdef CONFIG_ARCH_OMAP730
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100425 case METHOD_GPIO_730:
426 reg += OMAP730_GPIO_DATA_INPUT;
427 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800428#endif
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -0800429#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100430 case METHOD_GPIO_24XX:
431 reg += OMAP24XX_GPIO_DATAIN;
432 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800433#endif
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100434 default:
David Brownelle5c56ed2006-12-06 17:13:59 -0800435 return -EINVAL;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100436 }
Tony Lindgren92105bb2005-09-07 17:20:26 +0100437 return (__raw_readl(reg)
438 & (1 << get_gpio_index(gpio))) != 0;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100439}
440
Tony Lindgren92105bb2005-09-07 17:20:26 +0100441#define MOD_REG_BIT(reg, bit_mask, set) \
442do { \
443 int l = __raw_readl(base + reg); \
444 if (set) l |= bit_mask; \
445 else l &= ~bit_mask; \
446 __raw_writel(l, base + reg); \
447} while(0)
448
Kevin Hilman5eb3bb92007-05-05 11:40:29 -0700449void omap_set_gpio_debounce(int gpio, int enable)
450{
451 struct gpio_bank *bank;
452 void __iomem *reg;
David Brownelle031ab22008-12-10 17:35:27 -0800453 unsigned long flags;
Kevin Hilman5eb3bb92007-05-05 11:40:29 -0700454 u32 val, l = 1 << get_gpio_index(gpio);
455
456 if (cpu_class_is_omap1())
457 return;
458
459 bank = get_gpio_bank(gpio);
460 reg = bank->base;
Kevin Hilman5eb3bb92007-05-05 11:40:29 -0700461 reg += OMAP24XX_GPIO_DEBOUNCE_EN;
David Brownelle031ab22008-12-10 17:35:27 -0800462
463 spin_lock_irqsave(&bank->lock, flags);
Kevin Hilman5eb3bb92007-05-05 11:40:29 -0700464 val = __raw_readl(reg);
465
Jouni Hogander89db9482008-12-10 17:35:24 -0800466 if (enable && !(val & l))
Kevin Hilman5eb3bb92007-05-05 11:40:29 -0700467 val |= l;
David Brownelle031ab22008-12-10 17:35:27 -0800468 else if (!enable && (val & l))
Kevin Hilman5eb3bb92007-05-05 11:40:29 -0700469 val &= ~l;
Jouni Hogander89db9482008-12-10 17:35:24 -0800470 else
David Brownelle031ab22008-12-10 17:35:27 -0800471 goto done;
Jouni Hogander89db9482008-12-10 17:35:24 -0800472
David Brownelle031ab22008-12-10 17:35:27 -0800473 if (cpu_is_omap34xx()) {
474 if (enable)
475 clk_enable(bank->dbck);
476 else
477 clk_disable(bank->dbck);
478 }
Kevin Hilman5eb3bb92007-05-05 11:40:29 -0700479
480 __raw_writel(val, reg);
David Brownelle031ab22008-12-10 17:35:27 -0800481done:
482 spin_unlock_irqrestore(&bank->lock, flags);
Kevin Hilman5eb3bb92007-05-05 11:40:29 -0700483}
484EXPORT_SYMBOL(omap_set_gpio_debounce);
485
486void omap_set_gpio_debounce_time(int gpio, int enc_time)
487{
488 struct gpio_bank *bank;
489 void __iomem *reg;
490
491 if (cpu_class_is_omap1())
492 return;
493
494 bank = get_gpio_bank(gpio);
495 reg = bank->base;
496
497 enc_time &= 0xff;
498 reg += OMAP24XX_GPIO_DEBOUNCE_VAL;
499 __raw_writel(enc_time, reg);
500}
501EXPORT_SYMBOL(omap_set_gpio_debounce_time);
502
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -0800503#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
Kevin Hilman5eb3bb92007-05-05 11:40:29 -0700504static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio,
505 int trigger)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100506{
Juha Yrjola3ac4fa92006-12-06 17:13:52 -0800507 void __iomem *base = bank->base;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100508 u32 gpio_bit = 1 << gpio;
509
510 MOD_REG_BIT(OMAP24XX_GPIO_LEVELDETECT0, gpio_bit,
Dmitry Baryshkov6cab4862008-07-27 04:23:31 +0100511 trigger & IRQ_TYPE_LEVEL_LOW);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100512 MOD_REG_BIT(OMAP24XX_GPIO_LEVELDETECT1, gpio_bit,
Dmitry Baryshkov6cab4862008-07-27 04:23:31 +0100513 trigger & IRQ_TYPE_LEVEL_HIGH);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100514 MOD_REG_BIT(OMAP24XX_GPIO_RISINGDETECT, gpio_bit,
Dmitry Baryshkov6cab4862008-07-27 04:23:31 +0100515 trigger & IRQ_TYPE_EDGE_RISING);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100516 MOD_REG_BIT(OMAP24XX_GPIO_FALLINGDETECT, gpio_bit,
Dmitry Baryshkov6cab4862008-07-27 04:23:31 +0100517 trigger & IRQ_TYPE_EDGE_FALLING);
Kevin Hilman5eb3bb92007-05-05 11:40:29 -0700518
Juha Yrjola3ac4fa92006-12-06 17:13:52 -0800519 if (likely(!(bank->non_wakeup_gpios & gpio_bit))) {
520 if (trigger != 0)
Kevin Hilman5eb3bb92007-05-05 11:40:29 -0700521 __raw_writel(1 << gpio, bank->base
522 + OMAP24XX_GPIO_SETWKUENA);
Juha Yrjola3ac4fa92006-12-06 17:13:52 -0800523 else
Kevin Hilman5eb3bb92007-05-05 11:40:29 -0700524 __raw_writel(1 << gpio, bank->base
525 + OMAP24XX_GPIO_CLEARWKUENA);
Juha Yrjola3ac4fa92006-12-06 17:13:52 -0800526 } else {
527 if (trigger != 0)
528 bank->enabled_non_wakeup_gpios |= gpio_bit;
529 else
530 bank->enabled_non_wakeup_gpios &= ~gpio_bit;
531 }
Kevin Hilman5eb3bb92007-05-05 11:40:29 -0700532
Kevin Hilmanb144ff62008-01-16 21:56:15 -0800533 bank->level_mask =
534 __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0) |
535 __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100536}
Juha Yrjola3ac4fa92006-12-06 17:13:52 -0800537#endif
Tony Lindgren92105bb2005-09-07 17:20:26 +0100538
539static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
540{
541 void __iomem *reg = bank->base;
542 u32 l = 0;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100543
544 switch (bank->method) {
David Brownelle5c56ed2006-12-06 17:13:59 -0800545#ifdef CONFIG_ARCH_OMAP1
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100546 case METHOD_MPUIO:
547 reg += OMAP_MPUIO_GPIO_INT_EDGE;
548 l = __raw_readl(reg);
Dmitry Baryshkov6cab4862008-07-27 04:23:31 +0100549 if (trigger & IRQ_TYPE_EDGE_RISING)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100550 l |= 1 << gpio;
Dmitry Baryshkov6cab4862008-07-27 04:23:31 +0100551 else if (trigger & IRQ_TYPE_EDGE_FALLING)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100552 l &= ~(1 << gpio);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100553 else
554 goto bad;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100555 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800556#endif
557#ifdef CONFIG_ARCH_OMAP15XX
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100558 case METHOD_GPIO_1510:
559 reg += OMAP1510_GPIO_INT_CONTROL;
560 l = __raw_readl(reg);
Dmitry Baryshkov6cab4862008-07-27 04:23:31 +0100561 if (trigger & IRQ_TYPE_EDGE_RISING)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100562 l |= 1 << gpio;
Dmitry Baryshkov6cab4862008-07-27 04:23:31 +0100563 else if (trigger & IRQ_TYPE_EDGE_FALLING)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100564 l &= ~(1 << gpio);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100565 else
566 goto bad;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100567 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800568#endif
Juha Yrjola3ac4fa92006-12-06 17:13:52 -0800569#ifdef CONFIG_ARCH_OMAP16XX
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100570 case METHOD_GPIO_1610:
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100571 if (gpio & 0x08)
572 reg += OMAP1610_GPIO_EDGE_CTRL2;
573 else
574 reg += OMAP1610_GPIO_EDGE_CTRL1;
575 gpio &= 0x07;
576 l = __raw_readl(reg);
577 l &= ~(3 << (gpio << 1));
Dmitry Baryshkov6cab4862008-07-27 04:23:31 +0100578 if (trigger & IRQ_TYPE_EDGE_RISING)
Tony Lindgren6e60e792006-04-02 17:46:23 +0100579 l |= 2 << (gpio << 1);
Dmitry Baryshkov6cab4862008-07-27 04:23:31 +0100580 if (trigger & IRQ_TYPE_EDGE_FALLING)
Tony Lindgren6e60e792006-04-02 17:46:23 +0100581 l |= 1 << (gpio << 1);
Juha Yrjola3ac4fa92006-12-06 17:13:52 -0800582 if (trigger)
583 /* Enable wake-up during idle for dynamic tick */
584 __raw_writel(1 << gpio, bank->base + OMAP1610_GPIO_SET_WAKEUPENA);
585 else
586 __raw_writel(1 << gpio, bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100587 break;
Juha Yrjola3ac4fa92006-12-06 17:13:52 -0800588#endif
589#ifdef CONFIG_ARCH_OMAP730
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100590 case METHOD_GPIO_730:
591 reg += OMAP730_GPIO_INT_CONTROL;
592 l = __raw_readl(reg);
Dmitry Baryshkov6cab4862008-07-27 04:23:31 +0100593 if (trigger & IRQ_TYPE_EDGE_RISING)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100594 l |= 1 << gpio;
Dmitry Baryshkov6cab4862008-07-27 04:23:31 +0100595 else if (trigger & IRQ_TYPE_EDGE_FALLING)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100596 l &= ~(1 << gpio);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100597 else
598 goto bad;
599 break;
Juha Yrjola3ac4fa92006-12-06 17:13:52 -0800600#endif
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -0800601#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100602 case METHOD_GPIO_24XX:
Juha Yrjola3ac4fa92006-12-06 17:13:52 -0800603 set_24xx_gpio_triggering(bank, gpio, trigger);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100604 break;
Juha Yrjola3ac4fa92006-12-06 17:13:52 -0800605#endif
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100606 default:
Tony Lindgren92105bb2005-09-07 17:20:26 +0100607 goto bad;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100608 }
Tony Lindgren92105bb2005-09-07 17:20:26 +0100609 __raw_writel(l, reg);
610 return 0;
611bad:
612 return -EINVAL;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100613}
614
Tony Lindgren92105bb2005-09-07 17:20:26 +0100615static int gpio_irq_type(unsigned irq, unsigned type)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100616{
617 struct gpio_bank *bank;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100618 unsigned gpio;
619 int retval;
David Brownella6472532008-03-03 04:33:30 -0800620 unsigned long flags;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100621
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -0800622 if (!cpu_class_is_omap2() && irq > IH_MPUIO_BASE)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100623 gpio = OMAP_MPUIO(irq - IH_MPUIO_BASE);
624 else
625 gpio = irq - IH_GPIO_BASE;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100626
627 if (check_gpio(gpio) < 0)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100628 return -EINVAL;
629
David Brownelle5c56ed2006-12-06 17:13:59 -0800630 if (type & ~IRQ_TYPE_SENSE_MASK)
Tony Lindgren6e60e792006-04-02 17:46:23 +0100631 return -EINVAL;
David Brownelle5c56ed2006-12-06 17:13:59 -0800632
633 /* OMAP1 allows only only edge triggering */
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -0800634 if (!cpu_class_is_omap2()
David Brownelle5c56ed2006-12-06 17:13:59 -0800635 && (type & (IRQ_TYPE_LEVEL_LOW|IRQ_TYPE_LEVEL_HIGH)))
Tony Lindgren92105bb2005-09-07 17:20:26 +0100636 return -EINVAL;
637
David Brownell58781012006-12-06 17:14:10 -0800638 bank = get_irq_chip_data(irq);
David Brownella6472532008-03-03 04:33:30 -0800639 spin_lock_irqsave(&bank->lock, flags);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100640 retval = _set_gpio_triggering(bank, get_gpio_index(gpio), type);
David Brownellb9772a22006-12-06 17:13:53 -0800641 if (retval == 0) {
642 irq_desc[irq].status &= ~IRQ_TYPE_SENSE_MASK;
643 irq_desc[irq].status |= type;
644 }
David Brownella6472532008-03-03 04:33:30 -0800645 spin_unlock_irqrestore(&bank->lock, flags);
Kevin Hilman672e3022008-01-16 21:56:16 -0800646
647 if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
648 __set_irq_handler_unlocked(irq, handle_level_irq);
649 else if (type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING))
650 __set_irq_handler_unlocked(irq, handle_edge_irq);
651
Tony Lindgren92105bb2005-09-07 17:20:26 +0100652 return retval;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100653}
654
655static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)
656{
Tony Lindgren92105bb2005-09-07 17:20:26 +0100657 void __iomem *reg = bank->base;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100658
659 switch (bank->method) {
David Brownelle5c56ed2006-12-06 17:13:59 -0800660#ifdef CONFIG_ARCH_OMAP1
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100661 case METHOD_MPUIO:
662 /* MPUIO irqstatus is reset by reading the status register,
663 * so do nothing here */
664 return;
David Brownelle5c56ed2006-12-06 17:13:59 -0800665#endif
666#ifdef CONFIG_ARCH_OMAP15XX
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100667 case METHOD_GPIO_1510:
668 reg += OMAP1510_GPIO_INT_STATUS;
669 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800670#endif
671#ifdef CONFIG_ARCH_OMAP16XX
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100672 case METHOD_GPIO_1610:
673 reg += OMAP1610_GPIO_IRQSTATUS1;
674 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800675#endif
676#ifdef CONFIG_ARCH_OMAP730
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100677 case METHOD_GPIO_730:
678 reg += OMAP730_GPIO_INT_STATUS;
679 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800680#endif
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -0800681#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100682 case METHOD_GPIO_24XX:
683 reg += OMAP24XX_GPIO_IRQSTATUS1;
684 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800685#endif
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100686 default:
David Brownelle5c56ed2006-12-06 17:13:59 -0800687 WARN_ON(1);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100688 return;
689 }
690 __raw_writel(gpio_mask, reg);
Hiroshi DOYUbee79302006-09-25 12:41:46 +0300691
692 /* Workaround for clearing DSP GPIO interrupts to allow retention */
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -0800693#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
694 if (cpu_is_omap24xx() || cpu_is_omap34xx())
Hiroshi DOYUbee79302006-09-25 12:41:46 +0300695 __raw_writel(gpio_mask, bank->base + OMAP24XX_GPIO_IRQSTATUS2);
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -0800696#endif
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100697}
698
699static inline void _clear_gpio_irqstatus(struct gpio_bank *bank, int gpio)
700{
701 _clear_gpio_irqbank(bank, 1 << get_gpio_index(gpio));
702}
703
Imre Deakea6dedd2006-06-26 16:16:00 -0700704static u32 _get_gpio_irqbank_mask(struct gpio_bank *bank)
705{
706 void __iomem *reg = bank->base;
Imre Deak99c47702006-06-26 16:16:07 -0700707 int inv = 0;
708 u32 l;
709 u32 mask;
Imre Deakea6dedd2006-06-26 16:16:00 -0700710
711 switch (bank->method) {
David Brownelle5c56ed2006-12-06 17:13:59 -0800712#ifdef CONFIG_ARCH_OMAP1
Imre Deakea6dedd2006-06-26 16:16:00 -0700713 case METHOD_MPUIO:
714 reg += OMAP_MPUIO_GPIO_MASKIT;
Imre Deak99c47702006-06-26 16:16:07 -0700715 mask = 0xffff;
716 inv = 1;
Imre Deakea6dedd2006-06-26 16:16:00 -0700717 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800718#endif
719#ifdef CONFIG_ARCH_OMAP15XX
Imre Deakea6dedd2006-06-26 16:16:00 -0700720 case METHOD_GPIO_1510:
721 reg += OMAP1510_GPIO_INT_MASK;
Imre Deak99c47702006-06-26 16:16:07 -0700722 mask = 0xffff;
723 inv = 1;
Imre Deakea6dedd2006-06-26 16:16:00 -0700724 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800725#endif
726#ifdef CONFIG_ARCH_OMAP16XX
Imre Deakea6dedd2006-06-26 16:16:00 -0700727 case METHOD_GPIO_1610:
728 reg += OMAP1610_GPIO_IRQENABLE1;
Imre Deak99c47702006-06-26 16:16:07 -0700729 mask = 0xffff;
Imre Deakea6dedd2006-06-26 16:16:00 -0700730 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800731#endif
732#ifdef CONFIG_ARCH_OMAP730
Imre Deakea6dedd2006-06-26 16:16:00 -0700733 case METHOD_GPIO_730:
734 reg += OMAP730_GPIO_INT_MASK;
Imre Deak99c47702006-06-26 16:16:07 -0700735 mask = 0xffffffff;
736 inv = 1;
Imre Deakea6dedd2006-06-26 16:16:00 -0700737 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800738#endif
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -0800739#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
Imre Deakea6dedd2006-06-26 16:16:00 -0700740 case METHOD_GPIO_24XX:
741 reg += OMAP24XX_GPIO_IRQENABLE1;
Imre Deak99c47702006-06-26 16:16:07 -0700742 mask = 0xffffffff;
Imre Deakea6dedd2006-06-26 16:16:00 -0700743 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800744#endif
Imre Deakea6dedd2006-06-26 16:16:00 -0700745 default:
David Brownelle5c56ed2006-12-06 17:13:59 -0800746 WARN_ON(1);
Imre Deakea6dedd2006-06-26 16:16:00 -0700747 return 0;
748 }
749
Imre Deak99c47702006-06-26 16:16:07 -0700750 l = __raw_readl(reg);
751 if (inv)
752 l = ~l;
753 l &= mask;
754 return l;
Imre Deakea6dedd2006-06-26 16:16:00 -0700755}
756
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100757static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask, int enable)
758{
Tony Lindgren92105bb2005-09-07 17:20:26 +0100759 void __iomem *reg = bank->base;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100760 u32 l;
761
762 switch (bank->method) {
David Brownelle5c56ed2006-12-06 17:13:59 -0800763#ifdef CONFIG_ARCH_OMAP1
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100764 case METHOD_MPUIO:
765 reg += OMAP_MPUIO_GPIO_MASKIT;
766 l = __raw_readl(reg);
767 if (enable)
768 l &= ~(gpio_mask);
769 else
770 l |= gpio_mask;
771 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800772#endif
773#ifdef CONFIG_ARCH_OMAP15XX
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100774 case METHOD_GPIO_1510:
775 reg += OMAP1510_GPIO_INT_MASK;
776 l = __raw_readl(reg);
777 if (enable)
778 l &= ~(gpio_mask);
779 else
780 l |= gpio_mask;
781 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800782#endif
783#ifdef CONFIG_ARCH_OMAP16XX
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100784 case METHOD_GPIO_1610:
785 if (enable)
786 reg += OMAP1610_GPIO_SET_IRQENABLE1;
787 else
788 reg += OMAP1610_GPIO_CLEAR_IRQENABLE1;
789 l = gpio_mask;
790 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800791#endif
792#ifdef CONFIG_ARCH_OMAP730
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100793 case METHOD_GPIO_730:
794 reg += OMAP730_GPIO_INT_MASK;
795 l = __raw_readl(reg);
796 if (enable)
797 l &= ~(gpio_mask);
798 else
799 l |= gpio_mask;
800 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800801#endif
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -0800802#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100803 case METHOD_GPIO_24XX:
804 if (enable)
805 reg += OMAP24XX_GPIO_SETIRQENABLE1;
806 else
807 reg += OMAP24XX_GPIO_CLEARIRQENABLE1;
808 l = gpio_mask;
809 break;
David Brownelle5c56ed2006-12-06 17:13:59 -0800810#endif
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100811 default:
David Brownelle5c56ed2006-12-06 17:13:59 -0800812 WARN_ON(1);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100813 return;
814 }
815 __raw_writel(l, reg);
816}
817
818static inline void _set_gpio_irqenable(struct gpio_bank *bank, int gpio, int enable)
819{
820 _enable_gpio_irqbank(bank, 1 << get_gpio_index(gpio), enable);
821}
822
Tony Lindgren92105bb2005-09-07 17:20:26 +0100823/*
824 * Note that ENAWAKEUP needs to be enabled in GPIO_SYSCONFIG register.
825 * 1510 does not seem to have a wake-up register. If JTAG is connected
826 * to the target, system will wake up always on GPIO events. While
827 * system is running all registered GPIO interrupts need to have wake-up
828 * enabled. When system is suspended, only selected GPIO interrupts need
829 * to have wake-up enabled.
830 */
831static int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable)
832{
David Brownella6472532008-03-03 04:33:30 -0800833 unsigned long flags;
834
Tony Lindgren92105bb2005-09-07 17:20:26 +0100835 switch (bank->method) {
Juha Yrjola3ac4fa92006-12-06 17:13:52 -0800836#ifdef CONFIG_ARCH_OMAP16XX
David Brownell11a78b72006-12-06 17:14:11 -0800837 case METHOD_MPUIO:
Tony Lindgren92105bb2005-09-07 17:20:26 +0100838 case METHOD_GPIO_1610:
David Brownella6472532008-03-03 04:33:30 -0800839 spin_lock_irqsave(&bank->lock, flags);
David Brownell11a78b72006-12-06 17:14:11 -0800840 if (enable) {
Tony Lindgren92105bb2005-09-07 17:20:26 +0100841 bank->suspend_wakeup |= (1 << gpio);
David Brownell11a78b72006-12-06 17:14:11 -0800842 enable_irq_wake(bank->irq);
843 } else {
844 disable_irq_wake(bank->irq);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100845 bank->suspend_wakeup &= ~(1 << gpio);
David Brownell11a78b72006-12-06 17:14:11 -0800846 }
David Brownella6472532008-03-03 04:33:30 -0800847 spin_unlock_irqrestore(&bank->lock, flags);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100848 return 0;
Juha Yrjola3ac4fa92006-12-06 17:13:52 -0800849#endif
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -0800850#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
Juha Yrjola3ac4fa92006-12-06 17:13:52 -0800851 case METHOD_GPIO_24XX:
David Brownell11a78b72006-12-06 17:14:11 -0800852 if (bank->non_wakeup_gpios & (1 << gpio)) {
853 printk(KERN_ERR "Unable to modify wakeup on "
854 "non-wakeup GPIO%d\n",
855 (bank - gpio_bank) * 32 + gpio);
856 return -EINVAL;
857 }
David Brownella6472532008-03-03 04:33:30 -0800858 spin_lock_irqsave(&bank->lock, flags);
Juha Yrjola3ac4fa92006-12-06 17:13:52 -0800859 if (enable) {
Juha Yrjola3ac4fa92006-12-06 17:13:52 -0800860 bank->suspend_wakeup |= (1 << gpio);
David Brownell11a78b72006-12-06 17:14:11 -0800861 enable_irq_wake(bank->irq);
862 } else {
863 disable_irq_wake(bank->irq);
Juha Yrjola3ac4fa92006-12-06 17:13:52 -0800864 bank->suspend_wakeup &= ~(1 << gpio);
David Brownell11a78b72006-12-06 17:14:11 -0800865 }
David Brownella6472532008-03-03 04:33:30 -0800866 spin_unlock_irqrestore(&bank->lock, flags);
Juha Yrjola3ac4fa92006-12-06 17:13:52 -0800867 return 0;
868#endif
Tony Lindgren92105bb2005-09-07 17:20:26 +0100869 default:
870 printk(KERN_ERR "Can't enable GPIO wakeup for method %i\n",
871 bank->method);
872 return -EINVAL;
873 }
874}
875
Tony Lindgren4196dd62006-09-25 12:41:38 +0300876static void _reset_gpio(struct gpio_bank *bank, int gpio)
877{
878 _set_gpio_direction(bank, get_gpio_index(gpio), 1);
879 _set_gpio_irqenable(bank, gpio, 0);
880 _clear_gpio_irqstatus(bank, gpio);
Dmitry Baryshkov6cab4862008-07-27 04:23:31 +0100881 _set_gpio_triggering(bank, get_gpio_index(gpio), IRQ_TYPE_NONE);
Tony Lindgren4196dd62006-09-25 12:41:38 +0300882}
883
Tony Lindgren92105bb2005-09-07 17:20:26 +0100884/* Use disable_irq_wake() and enable_irq_wake() functions from drivers */
885static int gpio_wake_enable(unsigned int irq, unsigned int enable)
886{
887 unsigned int gpio = irq - IH_GPIO_BASE;
888 struct gpio_bank *bank;
889 int retval;
890
891 if (check_gpio(gpio) < 0)
892 return -ENODEV;
David Brownell58781012006-12-06 17:14:10 -0800893 bank = get_irq_chip_data(irq);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100894 retval = _set_gpio_wakeup(bank, get_gpio_index(gpio), enable);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100895
896 return retval;
897}
898
Jarkko Nikula3ff164e2008-12-10 17:35:27 -0800899static int omap_gpio_request(struct gpio_chip *chip, unsigned offset)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100900{
Jarkko Nikula3ff164e2008-12-10 17:35:27 -0800901 struct gpio_bank *bank = container_of(chip, struct gpio_bank, chip);
David Brownella6472532008-03-03 04:33:30 -0800902 unsigned long flags;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100903
David Brownella6472532008-03-03 04:33:30 -0800904 spin_lock_irqsave(&bank->lock, flags);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100905
Tony Lindgren4196dd62006-09-25 12:41:38 +0300906 /* Set trigger to none. You need to enable the desired trigger with
907 * request_irq() or set_irq_type().
908 */
Jarkko Nikula3ff164e2008-12-10 17:35:27 -0800909 _set_gpio_triggering(bank, offset, IRQ_TYPE_NONE);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100910
Tony Lindgren1a8bfa12005-11-10 14:26:50 +0000911#ifdef CONFIG_ARCH_OMAP15XX
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100912 if (bank->method == METHOD_GPIO_1510) {
Tony Lindgren92105bb2005-09-07 17:20:26 +0100913 void __iomem *reg;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100914
Tony Lindgren92105bb2005-09-07 17:20:26 +0100915 /* Claim the pin for MPU */
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100916 reg = bank->base + OMAP1510_GPIO_PIN_CONTROL;
Jarkko Nikula3ff164e2008-12-10 17:35:27 -0800917 __raw_writel(__raw_readl(reg) | (1 << offset), reg);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100918 }
919#endif
David Brownella6472532008-03-03 04:33:30 -0800920 spin_unlock_irqrestore(&bank->lock, flags);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100921
922 return 0;
923}
924
Jarkko Nikula3ff164e2008-12-10 17:35:27 -0800925static void omap_gpio_free(struct gpio_chip *chip, unsigned offset)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100926{
Jarkko Nikula3ff164e2008-12-10 17:35:27 -0800927 struct gpio_bank *bank = container_of(chip, struct gpio_bank, chip);
David Brownella6472532008-03-03 04:33:30 -0800928 unsigned long flags;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100929
David Brownella6472532008-03-03 04:33:30 -0800930 spin_lock_irqsave(&bank->lock, flags);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100931#ifdef CONFIG_ARCH_OMAP16XX
932 if (bank->method == METHOD_GPIO_1610) {
933 /* Disable wake-up during idle for dynamic tick */
934 void __iomem *reg = bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA;
Jarkko Nikula3ff164e2008-12-10 17:35:27 -0800935 __raw_writel(1 << offset, reg);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100936 }
937#endif
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -0800938#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100939 if (bank->method == METHOD_GPIO_24XX) {
940 /* Disable wake-up during idle for dynamic tick */
941 void __iomem *reg = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
Jarkko Nikula3ff164e2008-12-10 17:35:27 -0800942 __raw_writel(1 << offset, reg);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100943 }
944#endif
Jarkko Nikula3ff164e2008-12-10 17:35:27 -0800945 _reset_gpio(bank, bank->chip.base + offset);
David Brownella6472532008-03-03 04:33:30 -0800946 spin_unlock_irqrestore(&bank->lock, flags);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100947}
948
949/*
950 * We need to unmask the GPIO bank interrupt as soon as possible to
951 * avoid missing GPIO interrupts for other lines in the bank.
952 * Then we need to mask-read-clear-unmask the triggered GPIO lines
953 * in the bank to avoid missing nested interrupts for a GPIO line.
954 * If we wait to unmask individual GPIO lines in the bank after the
955 * line's interrupt handler has been run, we may miss some nested
956 * interrupts.
957 */
Russell King10dd5ce2006-11-23 11:41:32 +0000958static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100959{
Tony Lindgren92105bb2005-09-07 17:20:26 +0100960 void __iomem *isr_reg = NULL;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100961 u32 isr;
962 unsigned int gpio_irq;
963 struct gpio_bank *bank;
Imre Deakea6dedd2006-06-26 16:16:00 -0700964 u32 retrigger = 0;
965 int unmasked = 0;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100966
967 desc->chip->ack(irq);
968
Thomas Gleixner418ca1f2006-07-01 22:32:41 +0100969 bank = get_irq_data(irq);
David Brownelle5c56ed2006-12-06 17:13:59 -0800970#ifdef CONFIG_ARCH_OMAP1
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100971 if (bank->method == METHOD_MPUIO)
972 isr_reg = bank->base + OMAP_MPUIO_GPIO_INT;
David Brownelle5c56ed2006-12-06 17:13:59 -0800973#endif
Tony Lindgren1a8bfa12005-11-10 14:26:50 +0000974#ifdef CONFIG_ARCH_OMAP15XX
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100975 if (bank->method == METHOD_GPIO_1510)
976 isr_reg = bank->base + OMAP1510_GPIO_INT_STATUS;
977#endif
978#if defined(CONFIG_ARCH_OMAP16XX)
979 if (bank->method == METHOD_GPIO_1610)
980 isr_reg = bank->base + OMAP1610_GPIO_IRQSTATUS1;
981#endif
982#ifdef CONFIG_ARCH_OMAP730
983 if (bank->method == METHOD_GPIO_730)
984 isr_reg = bank->base + OMAP730_GPIO_INT_STATUS;
985#endif
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -0800986#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100987 if (bank->method == METHOD_GPIO_24XX)
988 isr_reg = bank->base + OMAP24XX_GPIO_IRQSTATUS1;
989#endif
Tony Lindgren92105bb2005-09-07 17:20:26 +0100990 while(1) {
Tony Lindgren6e60e792006-04-02 17:46:23 +0100991 u32 isr_saved, level_mask = 0;
Imre Deakea6dedd2006-06-26 16:16:00 -0700992 u32 enabled;
Tony Lindgren6e60e792006-04-02 17:46:23 +0100993
Imre Deakea6dedd2006-06-26 16:16:00 -0700994 enabled = _get_gpio_irqbank_mask(bank);
995 isr_saved = isr = __raw_readl(isr_reg) & enabled;
Tony Lindgren6e60e792006-04-02 17:46:23 +0100996
997 if (cpu_is_omap15xx() && (bank->method == METHOD_MPUIO))
998 isr &= 0x0000ffff;
999
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -08001000 if (cpu_class_is_omap2()) {
Kevin Hilmanb144ff62008-01-16 21:56:15 -08001001 level_mask = bank->level_mask & enabled;
Imre Deakea6dedd2006-06-26 16:16:00 -07001002 }
Tony Lindgren6e60e792006-04-02 17:46:23 +01001003
1004 /* clear edge sensitive interrupts before handler(s) are
1005 called so that we don't miss any interrupt occurred while
1006 executing them */
1007 _enable_gpio_irqbank(bank, isr_saved & ~level_mask, 0);
1008 _clear_gpio_irqbank(bank, isr_saved & ~level_mask);
1009 _enable_gpio_irqbank(bank, isr_saved & ~level_mask, 1);
1010
1011 /* if there is only edge sensitive GPIO pin interrupts
1012 configured, we could unmask GPIO bank interrupt immediately */
Imre Deakea6dedd2006-06-26 16:16:00 -07001013 if (!level_mask && !unmasked) {
1014 unmasked = 1;
Tony Lindgren6e60e792006-04-02 17:46:23 +01001015 desc->chip->unmask(irq);
Imre Deakea6dedd2006-06-26 16:16:00 -07001016 }
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001017
Imre Deakea6dedd2006-06-26 16:16:00 -07001018 isr |= retrigger;
1019 retrigger = 0;
Tony Lindgren92105bb2005-09-07 17:20:26 +01001020 if (!isr)
1021 break;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001022
Tony Lindgren92105bb2005-09-07 17:20:26 +01001023 gpio_irq = bank->virtual_irq_start;
1024 for (; isr != 0; isr >>= 1, gpio_irq++) {
Tony Lindgren92105bb2005-09-07 17:20:26 +01001025 if (!(isr & 1))
1026 continue;
Thomas Gleixner29454dd2006-07-03 02:22:22 +02001027
Dmitry Baryshkovd8aa0252008-10-09 13:36:24 +01001028 generic_handle_irq(gpio_irq);
Tony Lindgren92105bb2005-09-07 17:20:26 +01001029 }
Tony Lindgren1a8bfa12005-11-10 14:26:50 +00001030 }
Imre Deakea6dedd2006-06-26 16:16:00 -07001031 /* if bank has any level sensitive GPIO pin interrupt
1032 configured, we must unmask the bank interrupt only after
1033 handler(s) are executed in order to avoid spurious bank
1034 interrupt */
1035 if (!unmasked)
1036 desc->chip->unmask(irq);
1037
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001038}
1039
Tony Lindgren4196dd62006-09-25 12:41:38 +03001040static void gpio_irq_shutdown(unsigned int irq)
1041{
1042 unsigned int gpio = irq - IH_GPIO_BASE;
David Brownell58781012006-12-06 17:14:10 -08001043 struct gpio_bank *bank = get_irq_chip_data(irq);
Tony Lindgren4196dd62006-09-25 12:41:38 +03001044
1045 _reset_gpio(bank, gpio);
1046}
1047
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001048static void gpio_ack_irq(unsigned int irq)
1049{
1050 unsigned int gpio = irq - IH_GPIO_BASE;
David Brownell58781012006-12-06 17:14:10 -08001051 struct gpio_bank *bank = get_irq_chip_data(irq);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001052
1053 _clear_gpio_irqstatus(bank, gpio);
1054}
1055
1056static void gpio_mask_irq(unsigned int irq)
1057{
1058 unsigned int gpio = irq - IH_GPIO_BASE;
David Brownell58781012006-12-06 17:14:10 -08001059 struct gpio_bank *bank = get_irq_chip_data(irq);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001060
1061 _set_gpio_irqenable(bank, gpio, 0);
1062}
1063
1064static void gpio_unmask_irq(unsigned int irq)
1065{
1066 unsigned int gpio = irq - IH_GPIO_BASE;
David Brownell58781012006-12-06 17:14:10 -08001067 struct gpio_bank *bank = get_irq_chip_data(irq);
Kevin Hilmanb144ff62008-01-16 21:56:15 -08001068 unsigned int irq_mask = 1 << get_gpio_index(gpio);
1069
1070 /* For level-triggered GPIOs, the clearing must be done after
1071 * the HW source is cleared, thus after the handler has run */
1072 if (bank->level_mask & irq_mask) {
1073 _set_gpio_irqenable(bank, gpio, 0);
1074 _clear_gpio_irqstatus(bank, gpio);
1075 }
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001076
Kevin Hilman4de8c752008-01-16 21:56:14 -08001077 _set_gpio_irqenable(bank, gpio, 1);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001078}
1079
David Brownelle5c56ed2006-12-06 17:13:59 -08001080static struct irq_chip gpio_irq_chip = {
1081 .name = "GPIO",
1082 .shutdown = gpio_irq_shutdown,
1083 .ack = gpio_ack_irq,
1084 .mask = gpio_mask_irq,
1085 .unmask = gpio_unmask_irq,
1086 .set_type = gpio_irq_type,
1087 .set_wake = gpio_wake_enable,
1088};
1089
1090/*---------------------------------------------------------------------*/
1091
1092#ifdef CONFIG_ARCH_OMAP1
1093
1094/* MPUIO uses the always-on 32k clock */
1095
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001096static void mpuio_ack_irq(unsigned int irq)
1097{
1098 /* The ISR is reset automatically, so do nothing here. */
1099}
1100
1101static void mpuio_mask_irq(unsigned int irq)
1102{
1103 unsigned int gpio = OMAP_MPUIO(irq - IH_MPUIO_BASE);
David Brownell58781012006-12-06 17:14:10 -08001104 struct gpio_bank *bank = get_irq_chip_data(irq);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001105
1106 _set_gpio_irqenable(bank, gpio, 0);
1107}
1108
1109static void mpuio_unmask_irq(unsigned int irq)
1110{
1111 unsigned int gpio = OMAP_MPUIO(irq - IH_MPUIO_BASE);
David Brownell58781012006-12-06 17:14:10 -08001112 struct gpio_bank *bank = get_irq_chip_data(irq);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001113
1114 _set_gpio_irqenable(bank, gpio, 1);
1115}
1116
David Brownelle5c56ed2006-12-06 17:13:59 -08001117static struct irq_chip mpuio_irq_chip = {
1118 .name = "MPUIO",
1119 .ack = mpuio_ack_irq,
1120 .mask = mpuio_mask_irq,
1121 .unmask = mpuio_unmask_irq,
Tony Lindgren92105bb2005-09-07 17:20:26 +01001122 .set_type = gpio_irq_type,
David Brownell11a78b72006-12-06 17:14:11 -08001123#ifdef CONFIG_ARCH_OMAP16XX
1124 /* REVISIT: assuming only 16xx supports MPUIO wake events */
1125 .set_wake = gpio_wake_enable,
1126#endif
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001127};
1128
David Brownelle5c56ed2006-12-06 17:13:59 -08001129
1130#define bank_is_mpuio(bank) ((bank)->method == METHOD_MPUIO)
1131
David Brownell11a78b72006-12-06 17:14:11 -08001132
1133#ifdef CONFIG_ARCH_OMAP16XX
1134
1135#include <linux/platform_device.h>
1136
1137static int omap_mpuio_suspend_late(struct platform_device *pdev, pm_message_t mesg)
1138{
1139 struct gpio_bank *bank = platform_get_drvdata(pdev);
1140 void __iomem *mask_reg = bank->base + OMAP_MPUIO_GPIO_MASKIT;
David Brownella6472532008-03-03 04:33:30 -08001141 unsigned long flags;
David Brownell11a78b72006-12-06 17:14:11 -08001142
David Brownella6472532008-03-03 04:33:30 -08001143 spin_lock_irqsave(&bank->lock, flags);
David Brownell11a78b72006-12-06 17:14:11 -08001144 bank->saved_wakeup = __raw_readl(mask_reg);
1145 __raw_writel(0xffff & ~bank->suspend_wakeup, mask_reg);
David Brownella6472532008-03-03 04:33:30 -08001146 spin_unlock_irqrestore(&bank->lock, flags);
David Brownell11a78b72006-12-06 17:14:11 -08001147
1148 return 0;
1149}
1150
1151static int omap_mpuio_resume_early(struct platform_device *pdev)
1152{
1153 struct gpio_bank *bank = platform_get_drvdata(pdev);
1154 void __iomem *mask_reg = bank->base + OMAP_MPUIO_GPIO_MASKIT;
David Brownella6472532008-03-03 04:33:30 -08001155 unsigned long flags;
David Brownell11a78b72006-12-06 17:14:11 -08001156
David Brownella6472532008-03-03 04:33:30 -08001157 spin_lock_irqsave(&bank->lock, flags);
David Brownell11a78b72006-12-06 17:14:11 -08001158 __raw_writel(bank->saved_wakeup, mask_reg);
David Brownella6472532008-03-03 04:33:30 -08001159 spin_unlock_irqrestore(&bank->lock, flags);
David Brownell11a78b72006-12-06 17:14:11 -08001160
1161 return 0;
1162}
1163
1164/* use platform_driver for this, now that there's no longer any
1165 * point to sys_device (other than not disturbing old code).
1166 */
1167static struct platform_driver omap_mpuio_driver = {
1168 .suspend_late = omap_mpuio_suspend_late,
1169 .resume_early = omap_mpuio_resume_early,
1170 .driver = {
1171 .name = "mpuio",
1172 },
1173};
1174
1175static struct platform_device omap_mpuio_device = {
1176 .name = "mpuio",
1177 .id = -1,
1178 .dev = {
1179 .driver = &omap_mpuio_driver.driver,
1180 }
1181 /* could list the /proc/iomem resources */
1182};
1183
1184static inline void mpuio_init(void)
1185{
David Brownellfcf126d2007-04-02 12:46:47 -07001186 platform_set_drvdata(&omap_mpuio_device, &gpio_bank_1610[0]);
1187
David Brownell11a78b72006-12-06 17:14:11 -08001188 if (platform_driver_register(&omap_mpuio_driver) == 0)
1189 (void) platform_device_register(&omap_mpuio_device);
1190}
1191
1192#else
1193static inline void mpuio_init(void) {}
1194#endif /* 16xx */
1195
David Brownelle5c56ed2006-12-06 17:13:59 -08001196#else
1197
1198extern struct irq_chip mpuio_irq_chip;
1199
1200#define bank_is_mpuio(bank) 0
David Brownell11a78b72006-12-06 17:14:11 -08001201static inline void mpuio_init(void) {}
David Brownelle5c56ed2006-12-06 17:13:59 -08001202
1203#endif
1204
1205/*---------------------------------------------------------------------*/
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001206
David Brownell52e31342008-03-03 12:43:23 -08001207/* REVISIT these are stupid implementations! replace by ones that
1208 * don't switch on METHOD_* and which mostly avoid spinlocks
1209 */
1210
1211static int gpio_input(struct gpio_chip *chip, unsigned offset)
1212{
1213 struct gpio_bank *bank;
1214 unsigned long flags;
1215
1216 bank = container_of(chip, struct gpio_bank, chip);
1217 spin_lock_irqsave(&bank->lock, flags);
1218 _set_gpio_direction(bank, offset, 1);
1219 spin_unlock_irqrestore(&bank->lock, flags);
1220 return 0;
1221}
1222
1223static int gpio_get(struct gpio_chip *chip, unsigned offset)
1224{
David Brownell0b84b5c2008-12-10 17:35:25 -08001225 return __omap_get_gpio_datain(chip->base + offset);
David Brownell52e31342008-03-03 12:43:23 -08001226}
1227
1228static int gpio_output(struct gpio_chip *chip, unsigned offset, int value)
1229{
1230 struct gpio_bank *bank;
1231 unsigned long flags;
1232
1233 bank = container_of(chip, struct gpio_bank, chip);
1234 spin_lock_irqsave(&bank->lock, flags);
1235 _set_gpio_dataout(bank, offset, value);
1236 _set_gpio_direction(bank, offset, 0);
1237 spin_unlock_irqrestore(&bank->lock, flags);
1238 return 0;
1239}
1240
1241static void gpio_set(struct gpio_chip *chip, unsigned offset, int value)
1242{
1243 struct gpio_bank *bank;
1244 unsigned long flags;
1245
1246 bank = container_of(chip, struct gpio_bank, chip);
1247 spin_lock_irqsave(&bank->lock, flags);
1248 _set_gpio_dataout(bank, offset, value);
1249 spin_unlock_irqrestore(&bank->lock, flags);
1250}
1251
David Brownella007b702008-12-10 17:35:25 -08001252static int gpio_2irq(struct gpio_chip *chip, unsigned offset)
1253{
1254 struct gpio_bank *bank;
1255
1256 bank = container_of(chip, struct gpio_bank, chip);
1257 return bank->virtual_irq_start + offset;
1258}
1259
David Brownell52e31342008-03-03 12:43:23 -08001260/*---------------------------------------------------------------------*/
1261
Tony Lindgren1a8bfa12005-11-10 14:26:50 +00001262static int initialized;
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -08001263#if !defined(CONFIG_ARCH_OMAP3)
Tony Lindgren1a8bfa12005-11-10 14:26:50 +00001264static struct clk * gpio_ick;
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -08001265#endif
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001266
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -08001267#if defined(CONFIG_ARCH_OMAP2)
1268static struct clk * gpio_fck;
1269#endif
1270
1271#if defined(CONFIG_ARCH_OMAP2430)
Syed Mohammed Khasim56a25642006-12-06 17:14:08 -08001272static struct clk * gpio5_ick;
1273static struct clk * gpio5_fck;
1274#endif
1275
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -08001276#if defined(CONFIG_ARCH_OMAP3)
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -08001277static struct clk *gpio_iclks[OMAP34XX_NR_GPIOS];
1278#endif
1279
David Brownell8ba55c52008-02-26 11:10:50 -08001280/* This lock class tells lockdep that GPIO irqs are in a different
1281 * category than their parents, so it won't report false recursion.
1282 */
1283static struct lock_class_key gpio_lock_class;
1284
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001285static int __init _omap_gpio_init(void)
1286{
1287 int i;
David Brownell52e31342008-03-03 12:43:23 -08001288 int gpio = 0;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001289 struct gpio_bank *bank;
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -08001290 char clk_name[11];
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001291
1292 initialized = 1;
1293
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -08001294#if defined(CONFIG_ARCH_OMAP1)
Tony Lindgren6e60e792006-04-02 17:46:23 +01001295 if (cpu_is_omap15xx()) {
Tony Lindgren1a8bfa12005-11-10 14:26:50 +00001296 gpio_ick = clk_get(NULL, "arm_gpio_ck");
1297 if (IS_ERR(gpio_ick))
Tony Lindgren92105bb2005-09-07 17:20:26 +01001298 printk("Could not get arm_gpio_ck\n");
1299 else
Tony Lindgren30ff7202006-01-17 15:33:51 -08001300 clk_enable(gpio_ick);
Tony Lindgren1a8bfa12005-11-10 14:26:50 +00001301 }
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -08001302#endif
1303#if defined(CONFIG_ARCH_OMAP2)
1304 if (cpu_class_is_omap2()) {
Tony Lindgren1a8bfa12005-11-10 14:26:50 +00001305 gpio_ick = clk_get(NULL, "gpios_ick");
1306 if (IS_ERR(gpio_ick))
1307 printk("Could not get gpios_ick\n");
1308 else
Tony Lindgren30ff7202006-01-17 15:33:51 -08001309 clk_enable(gpio_ick);
Tony Lindgren1a8bfa12005-11-10 14:26:50 +00001310 gpio_fck = clk_get(NULL, "gpios_fck");
Komal Shah1630b522006-09-25 12:51:08 +03001311 if (IS_ERR(gpio_fck))
Tony Lindgren1a8bfa12005-11-10 14:26:50 +00001312 printk("Could not get gpios_fck\n");
1313 else
Tony Lindgren30ff7202006-01-17 15:33:51 -08001314 clk_enable(gpio_fck);
Syed Mohammed Khasim56a25642006-12-06 17:14:08 -08001315
1316 /*
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -08001317 * On 2430 & 3430 GPIO 5 uses CORE L4 ICLK
Syed Mohammed Khasim56a25642006-12-06 17:14:08 -08001318 */
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -08001319#if defined(CONFIG_ARCH_OMAP2430)
Syed Mohammed Khasim56a25642006-12-06 17:14:08 -08001320 if (cpu_is_omap2430()) {
1321 gpio5_ick = clk_get(NULL, "gpio5_ick");
1322 if (IS_ERR(gpio5_ick))
1323 printk("Could not get gpio5_ick\n");
1324 else
1325 clk_enable(gpio5_ick);
1326 gpio5_fck = clk_get(NULL, "gpio5_fck");
1327 if (IS_ERR(gpio5_fck))
1328 printk("Could not get gpio5_fck\n");
1329 else
1330 clk_enable(gpio5_fck);
1331 }
1332#endif
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -08001333 }
1334#endif
1335
1336#if defined(CONFIG_ARCH_OMAP3)
1337 if (cpu_is_omap34xx()) {
1338 for (i = 0; i < OMAP34XX_NR_GPIOS; i++) {
1339 sprintf(clk_name, "gpio%d_ick", i + 1);
1340 gpio_iclks[i] = clk_get(NULL, clk_name);
1341 if (IS_ERR(gpio_iclks[i]))
1342 printk(KERN_ERR "Could not get %s\n", clk_name);
1343 else
1344 clk_enable(gpio_iclks[i]);
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -08001345 }
1346 }
1347#endif
1348
Tony Lindgren92105bb2005-09-07 17:20:26 +01001349
Tony Lindgren1a8bfa12005-11-10 14:26:50 +00001350#ifdef CONFIG_ARCH_OMAP15XX
Tony Lindgren6e60e792006-04-02 17:46:23 +01001351 if (cpu_is_omap15xx()) {
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001352 printk(KERN_INFO "OMAP1510 GPIO hardware\n");
1353 gpio_bank_count = 2;
1354 gpio_bank = gpio_bank_1510;
1355 }
1356#endif
1357#if defined(CONFIG_ARCH_OMAP16XX)
1358 if (cpu_is_omap16xx()) {
Tony Lindgren92105bb2005-09-07 17:20:26 +01001359 u32 rev;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001360
1361 gpio_bank_count = 5;
1362 gpio_bank = gpio_bank_1610;
Russell King7c7095a2008-09-05 15:49:14 +01001363 rev = __raw_readw(gpio_bank[1].base + OMAP1610_GPIO_REVISION);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001364 printk(KERN_INFO "OMAP GPIO hardware version %d.%d\n",
1365 (rev >> 4) & 0x0f, rev & 0x0f);
1366 }
1367#endif
1368#ifdef CONFIG_ARCH_OMAP730
1369 if (cpu_is_omap730()) {
1370 printk(KERN_INFO "OMAP730 GPIO hardware\n");
1371 gpio_bank_count = 7;
1372 gpio_bank = gpio_bank_730;
1373 }
1374#endif
Syed Mohammed Khasim56a25642006-12-06 17:14:08 -08001375
Tony Lindgren92105bb2005-09-07 17:20:26 +01001376#ifdef CONFIG_ARCH_OMAP24XX
Syed Mohammed Khasim56a25642006-12-06 17:14:08 -08001377 if (cpu_is_omap242x()) {
Tony Lindgren92105bb2005-09-07 17:20:26 +01001378 int rev;
1379
1380 gpio_bank_count = 4;
Syed Mohammed Khasim56a25642006-12-06 17:14:08 -08001381 gpio_bank = gpio_bank_242x;
Russell King7c7095a2008-09-05 15:49:14 +01001382 rev = __raw_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION);
Syed Mohammed Khasim56a25642006-12-06 17:14:08 -08001383 printk(KERN_INFO "OMAP242x GPIO hardware version %d.%d\n",
1384 (rev >> 4) & 0x0f, rev & 0x0f);
1385 }
1386 if (cpu_is_omap243x()) {
1387 int rev;
1388
1389 gpio_bank_count = 5;
1390 gpio_bank = gpio_bank_243x;
Russell King7c7095a2008-09-05 15:49:14 +01001391 rev = __raw_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION);
Syed Mohammed Khasim56a25642006-12-06 17:14:08 -08001392 printk(KERN_INFO "OMAP243x GPIO hardware version %d.%d\n",
Tony Lindgren92105bb2005-09-07 17:20:26 +01001393 (rev >> 4) & 0x0f, rev & 0x0f);
1394 }
1395#endif
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -08001396#ifdef CONFIG_ARCH_OMAP34XX
1397 if (cpu_is_omap34xx()) {
1398 int rev;
1399
1400 gpio_bank_count = OMAP34XX_NR_GPIOS;
1401 gpio_bank = gpio_bank_34xx;
Russell King7c7095a2008-09-05 15:49:14 +01001402 rev = __raw_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION);
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -08001403 printk(KERN_INFO "OMAP34xx GPIO hardware version %d.%d\n",
1404 (rev >> 4) & 0x0f, rev & 0x0f);
1405 }
1406#endif
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001407 for (i = 0; i < gpio_bank_count; i++) {
1408 int j, gpio_count = 16;
1409
1410 bank = &gpio_bank[i];
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001411 spin_lock_init(&bank->lock);
David Brownelle5c56ed2006-12-06 17:13:59 -08001412 if (bank_is_mpuio(bank))
Russell King7c7095a2008-09-05 15:49:14 +01001413 __raw_writew(0xffff, bank->base + OMAP_MPUIO_GPIO_MASKIT);
Tony Lindgrend11ac972008-01-12 15:35:04 -08001414 if (cpu_is_omap15xx() && bank->method == METHOD_GPIO_1510) {
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001415 __raw_writew(0xffff, bank->base + OMAP1510_GPIO_INT_MASK);
1416 __raw_writew(0x0000, bank->base + OMAP1510_GPIO_INT_STATUS);
1417 }
Tony Lindgrend11ac972008-01-12 15:35:04 -08001418 if (cpu_is_omap16xx() && bank->method == METHOD_GPIO_1610) {
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001419 __raw_writew(0x0000, bank->base + OMAP1610_GPIO_IRQENABLE1);
1420 __raw_writew(0xffff, bank->base + OMAP1610_GPIO_IRQSTATUS1);
Tony Lindgren92105bb2005-09-07 17:20:26 +01001421 __raw_writew(0x0014, bank->base + OMAP1610_GPIO_SYSCONFIG);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001422 }
Tony Lindgrend11ac972008-01-12 15:35:04 -08001423 if (cpu_is_omap730() && bank->method == METHOD_GPIO_730) {
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001424 __raw_writel(0xffffffff, bank->base + OMAP730_GPIO_INT_MASK);
1425 __raw_writel(0x00000000, bank->base + OMAP730_GPIO_INT_STATUS);
1426
1427 gpio_count = 32; /* 730 has 32-bit GPIOs */
1428 }
Tony Lindgrend11ac972008-01-12 15:35:04 -08001429
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -08001430#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
Tony Lindgren92105bb2005-09-07 17:20:26 +01001431 if (bank->method == METHOD_GPIO_24XX) {
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001432 static const u32 non_wakeup_gpios[] = {
1433 0xe203ffc0, 0x08700040
1434 };
1435
Tony Lindgren92105bb2005-09-07 17:20:26 +01001436 __raw_writel(0x00000000, bank->base + OMAP24XX_GPIO_IRQENABLE1);
1437 __raw_writel(0xffffffff, bank->base + OMAP24XX_GPIO_IRQSTATUS1);
Juha Yrjola14f1c3b2006-12-06 17:13:48 -08001438 __raw_writew(0x0015, bank->base + OMAP24XX_GPIO_SYSCONFIG);
1439
1440 /* Initialize interface clock ungated, module enabled */
1441 __raw_writel(0, bank->base + OMAP24XX_GPIO_CTRL);
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001442 if (i < ARRAY_SIZE(non_wakeup_gpios))
1443 bank->non_wakeup_gpios = non_wakeup_gpios[i];
Tony Lindgren92105bb2005-09-07 17:20:26 +01001444 gpio_count = 32;
1445 }
1446#endif
David Brownell52e31342008-03-03 12:43:23 -08001447
1448 /* REVISIT eventually switch from OMAP-specific gpio structs
1449 * over to the generic ones
1450 */
Jarkko Nikula3ff164e2008-12-10 17:35:27 -08001451 bank->chip.request = omap_gpio_request;
1452 bank->chip.free = omap_gpio_free;
David Brownell52e31342008-03-03 12:43:23 -08001453 bank->chip.direction_input = gpio_input;
1454 bank->chip.get = gpio_get;
1455 bank->chip.direction_output = gpio_output;
1456 bank->chip.set = gpio_set;
David Brownella007b702008-12-10 17:35:25 -08001457 bank->chip.to_irq = gpio_2irq;
David Brownell52e31342008-03-03 12:43:23 -08001458 if (bank_is_mpuio(bank)) {
1459 bank->chip.label = "mpuio";
Russell King69114a42008-09-03 10:15:26 +01001460#ifdef CONFIG_ARCH_OMAP16XX
David Brownelld8f388d2008-07-25 01:46:07 -07001461 bank->chip.dev = &omap_mpuio_device.dev;
1462#endif
David Brownell52e31342008-03-03 12:43:23 -08001463 bank->chip.base = OMAP_MPUIO(0);
1464 } else {
1465 bank->chip.label = "gpio";
1466 bank->chip.base = gpio;
1467 gpio += gpio_count;
1468 }
1469 bank->chip.ngpio = gpio_count;
1470
1471 gpiochip_add(&bank->chip);
1472
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001473 for (j = bank->virtual_irq_start;
1474 j < bank->virtual_irq_start + gpio_count; j++) {
David Brownell8ba55c52008-02-26 11:10:50 -08001475 lockdep_set_class(&irq_desc[j].lock, &gpio_lock_class);
David Brownell58781012006-12-06 17:14:10 -08001476 set_irq_chip_data(j, bank);
David Brownelle5c56ed2006-12-06 17:13:59 -08001477 if (bank_is_mpuio(bank))
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001478 set_irq_chip(j, &mpuio_irq_chip);
1479 else
1480 set_irq_chip(j, &gpio_irq_chip);
Russell King10dd5ce2006-11-23 11:41:32 +00001481 set_irq_handler(j, handle_simple_irq);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001482 set_irq_flags(j, IRQF_VALID);
1483 }
1484 set_irq_chained_handler(bank->irq, gpio_irq_handler);
1485 set_irq_data(bank->irq, bank);
Jouni Hogander89db9482008-12-10 17:35:24 -08001486
1487 if (cpu_is_omap34xx()) {
1488 sprintf(clk_name, "gpio%d_dbck", i + 1);
1489 bank->dbck = clk_get(NULL, clk_name);
1490 if (IS_ERR(bank->dbck))
1491 printk(KERN_ERR "Could not get %s\n", clk_name);
1492 }
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001493 }
1494
1495 /* Enable system clock for GPIO module.
1496 * The CAM_CLK_CTRL *is* really the right place. */
Tony Lindgren92105bb2005-09-07 17:20:26 +01001497 if (cpu_is_omap16xx())
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001498 omap_writel(omap_readl(ULPD_CAM_CLK_CTRL) | 0x04, ULPD_CAM_CLK_CTRL);
1499
Juha Yrjola14f1c3b2006-12-06 17:13:48 -08001500 /* Enable autoidle for the OCP interface */
1501 if (cpu_is_omap24xx())
1502 omap_writel(1 << 0, 0x48019010);
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -08001503 if (cpu_is_omap34xx())
1504 omap_writel(1 << 0, 0x48306814);
Tony Lindgrend11ac972008-01-12 15:35:04 -08001505
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001506 return 0;
1507}
1508
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -08001509#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
Tony Lindgren92105bb2005-09-07 17:20:26 +01001510static int omap_gpio_suspend(struct sys_device *dev, pm_message_t mesg)
1511{
1512 int i;
1513
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -08001514 if (!cpu_class_is_omap2() && !cpu_is_omap16xx())
Tony Lindgren92105bb2005-09-07 17:20:26 +01001515 return 0;
1516
1517 for (i = 0; i < gpio_bank_count; i++) {
1518 struct gpio_bank *bank = &gpio_bank[i];
1519 void __iomem *wake_status;
1520 void __iomem *wake_clear;
1521 void __iomem *wake_set;
David Brownella6472532008-03-03 04:33:30 -08001522 unsigned long flags;
Tony Lindgren92105bb2005-09-07 17:20:26 +01001523
1524 switch (bank->method) {
David Brownelle5c56ed2006-12-06 17:13:59 -08001525#ifdef CONFIG_ARCH_OMAP16XX
Tony Lindgren92105bb2005-09-07 17:20:26 +01001526 case METHOD_GPIO_1610:
1527 wake_status = bank->base + OMAP1610_GPIO_WAKEUPENABLE;
1528 wake_clear = bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA;
1529 wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA;
1530 break;
David Brownelle5c56ed2006-12-06 17:13:59 -08001531#endif
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -08001532#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
Tony Lindgren92105bb2005-09-07 17:20:26 +01001533 case METHOD_GPIO_24XX:
Tero Kristo723fdb72008-11-26 14:35:16 -08001534 wake_status = bank->base + OMAP24XX_GPIO_WAKE_EN;
Tony Lindgren92105bb2005-09-07 17:20:26 +01001535 wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
1536 wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA;
1537 break;
David Brownelle5c56ed2006-12-06 17:13:59 -08001538#endif
Tony Lindgren92105bb2005-09-07 17:20:26 +01001539 default:
1540 continue;
1541 }
1542
David Brownella6472532008-03-03 04:33:30 -08001543 spin_lock_irqsave(&bank->lock, flags);
Tony Lindgren92105bb2005-09-07 17:20:26 +01001544 bank->saved_wakeup = __raw_readl(wake_status);
1545 __raw_writel(0xffffffff, wake_clear);
1546 __raw_writel(bank->suspend_wakeup, wake_set);
David Brownella6472532008-03-03 04:33:30 -08001547 spin_unlock_irqrestore(&bank->lock, flags);
Tony Lindgren92105bb2005-09-07 17:20:26 +01001548 }
1549
1550 return 0;
1551}
1552
1553static int omap_gpio_resume(struct sys_device *dev)
1554{
1555 int i;
1556
Tero Kristo723fdb72008-11-26 14:35:16 -08001557 if (!cpu_class_is_omap2() && !cpu_is_omap16xx())
Tony Lindgren92105bb2005-09-07 17:20:26 +01001558 return 0;
1559
1560 for (i = 0; i < gpio_bank_count; i++) {
1561 struct gpio_bank *bank = &gpio_bank[i];
1562 void __iomem *wake_clear;
1563 void __iomem *wake_set;
David Brownella6472532008-03-03 04:33:30 -08001564 unsigned long flags;
Tony Lindgren92105bb2005-09-07 17:20:26 +01001565
1566 switch (bank->method) {
David Brownelle5c56ed2006-12-06 17:13:59 -08001567#ifdef CONFIG_ARCH_OMAP16XX
Tony Lindgren92105bb2005-09-07 17:20:26 +01001568 case METHOD_GPIO_1610:
1569 wake_clear = bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA;
1570 wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA;
1571 break;
David Brownelle5c56ed2006-12-06 17:13:59 -08001572#endif
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -08001573#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
Tony Lindgren92105bb2005-09-07 17:20:26 +01001574 case METHOD_GPIO_24XX:
Tony Lindgren0d9356c2006-09-25 12:41:45 +03001575 wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
1576 wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA;
Tony Lindgren92105bb2005-09-07 17:20:26 +01001577 break;
David Brownelle5c56ed2006-12-06 17:13:59 -08001578#endif
Tony Lindgren92105bb2005-09-07 17:20:26 +01001579 default:
1580 continue;
1581 }
1582
David Brownella6472532008-03-03 04:33:30 -08001583 spin_lock_irqsave(&bank->lock, flags);
Tony Lindgren92105bb2005-09-07 17:20:26 +01001584 __raw_writel(0xffffffff, wake_clear);
1585 __raw_writel(bank->saved_wakeup, wake_set);
David Brownella6472532008-03-03 04:33:30 -08001586 spin_unlock_irqrestore(&bank->lock, flags);
Tony Lindgren92105bb2005-09-07 17:20:26 +01001587 }
1588
1589 return 0;
1590}
1591
1592static struct sysdev_class omap_gpio_sysclass = {
Kay Sieversaf5ca3f2007-12-20 02:09:39 +01001593 .name = "gpio",
Tony Lindgren92105bb2005-09-07 17:20:26 +01001594 .suspend = omap_gpio_suspend,
1595 .resume = omap_gpio_resume,
1596};
1597
1598static struct sys_device omap_gpio_device = {
1599 .id = 0,
1600 .cls = &omap_gpio_sysclass,
1601};
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001602
1603#endif
1604
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -08001605#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001606
1607static int workaround_enabled;
1608
1609void omap2_gpio_prepare_for_retention(void)
1610{
1611 int i, c = 0;
1612
1613 /* Remove triggering for all non-wakeup GPIOs. Otherwise spurious
1614 * IRQs will be generated. See OMAP2420 Errata item 1.101. */
1615 for (i = 0; i < gpio_bank_count; i++) {
1616 struct gpio_bank *bank = &gpio_bank[i];
1617 u32 l1, l2;
1618
1619 if (!(bank->enabled_non_wakeup_gpios))
1620 continue;
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -08001621#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001622 bank->saved_datain = __raw_readl(bank->base + OMAP24XX_GPIO_DATAIN);
1623 l1 = __raw_readl(bank->base + OMAP24XX_GPIO_FALLINGDETECT);
1624 l2 = __raw_readl(bank->base + OMAP24XX_GPIO_RISINGDETECT);
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -08001625#endif
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001626 bank->saved_fallingdetect = l1;
1627 bank->saved_risingdetect = l2;
1628 l1 &= ~bank->enabled_non_wakeup_gpios;
1629 l2 &= ~bank->enabled_non_wakeup_gpios;
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -08001630#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001631 __raw_writel(l1, bank->base + OMAP24XX_GPIO_FALLINGDETECT);
1632 __raw_writel(l2, bank->base + OMAP24XX_GPIO_RISINGDETECT);
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -08001633#endif
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001634 c++;
1635 }
1636 if (!c) {
1637 workaround_enabled = 0;
1638 return;
1639 }
1640 workaround_enabled = 1;
1641}
1642
1643void omap2_gpio_resume_after_retention(void)
1644{
1645 int i;
1646
1647 if (!workaround_enabled)
1648 return;
1649 for (i = 0; i < gpio_bank_count; i++) {
1650 struct gpio_bank *bank = &gpio_bank[i];
1651 u32 l;
1652
1653 if (!(bank->enabled_non_wakeup_gpios))
1654 continue;
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -08001655#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001656 __raw_writel(bank->saved_fallingdetect,
1657 bank->base + OMAP24XX_GPIO_FALLINGDETECT);
1658 __raw_writel(bank->saved_risingdetect,
1659 bank->base + OMAP24XX_GPIO_RISINGDETECT);
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -08001660#endif
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001661 /* Check if any of the non-wakeup interrupt GPIOs have changed
1662 * state. If so, generate an IRQ by software. This is
1663 * horribly racy, but it's the best we can do to work around
1664 * this silicon bug. */
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -08001665#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001666 l = __raw_readl(bank->base + OMAP24XX_GPIO_DATAIN);
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -08001667#endif
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001668 l ^= bank->saved_datain;
1669 l &= bank->non_wakeup_gpios;
1670 if (l) {
1671 u32 old0, old1;
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -08001672#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001673 old0 = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0);
1674 old1 = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1);
1675 __raw_writel(old0 | l, bank->base + OMAP24XX_GPIO_LEVELDETECT0);
1676 __raw_writel(old1 | l, bank->base + OMAP24XX_GPIO_LEVELDETECT1);
1677 __raw_writel(old0, bank->base + OMAP24XX_GPIO_LEVELDETECT0);
1678 __raw_writel(old1, bank->base + OMAP24XX_GPIO_LEVELDETECT1);
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -08001679#endif
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001680 }
1681 }
1682
1683}
1684
Tony Lindgren92105bb2005-09-07 17:20:26 +01001685#endif
1686
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001687/*
1688 * This may get called early from board specific init
Tony Lindgren1a8bfa12005-11-10 14:26:50 +00001689 * for boards that have interrupts routed via FPGA.
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001690 */
David Brownell277d58e2006-12-06 17:13:59 -08001691int __init omap_gpio_init(void)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001692{
1693 if (!initialized)
1694 return _omap_gpio_init();
1695 else
1696 return 0;
1697}
1698
Tony Lindgren92105bb2005-09-07 17:20:26 +01001699static int __init omap_gpio_sysinit(void)
1700{
1701 int ret = 0;
1702
1703 if (!initialized)
1704 ret = _omap_gpio_init();
1705
David Brownell11a78b72006-12-06 17:14:11 -08001706 mpuio_init();
1707
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -08001708#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
1709 if (cpu_is_omap16xx() || cpu_class_is_omap2()) {
Tony Lindgren92105bb2005-09-07 17:20:26 +01001710 if (ret == 0) {
1711 ret = sysdev_class_register(&omap_gpio_sysclass);
1712 if (ret == 0)
1713 ret = sysdev_register(&omap_gpio_device);
1714 }
1715 }
1716#endif
1717
1718 return ret;
1719}
1720
Tony Lindgren92105bb2005-09-07 17:20:26 +01001721arch_initcall(omap_gpio_sysinit);
David Brownellb9772a22006-12-06 17:13:53 -08001722
1723
1724#ifdef CONFIG_DEBUG_FS
1725
1726#include <linux/debugfs.h>
1727#include <linux/seq_file.h>
1728
1729static int gpio_is_input(struct gpio_bank *bank, int mask)
1730{
1731 void __iomem *reg = bank->base;
1732
1733 switch (bank->method) {
1734 case METHOD_MPUIO:
1735 reg += OMAP_MPUIO_IO_CNTL;
1736 break;
1737 case METHOD_GPIO_1510:
1738 reg += OMAP1510_GPIO_DIR_CONTROL;
1739 break;
1740 case METHOD_GPIO_1610:
1741 reg += OMAP1610_GPIO_DIRECTION;
1742 break;
1743 case METHOD_GPIO_730:
1744 reg += OMAP730_GPIO_DIR_CONTROL;
1745 break;
1746 case METHOD_GPIO_24XX:
1747 reg += OMAP24XX_GPIO_OE;
1748 break;
1749 }
1750 return __raw_readl(reg) & mask;
1751}
1752
1753
1754static int dbg_gpio_show(struct seq_file *s, void *unused)
1755{
1756 unsigned i, j, gpio;
1757
1758 for (i = 0, gpio = 0; i < gpio_bank_count; i++) {
1759 struct gpio_bank *bank = gpio_bank + i;
1760 unsigned bankwidth = 16;
1761 u32 mask = 1;
1762
David Brownelle5c56ed2006-12-06 17:13:59 -08001763 if (bank_is_mpuio(bank))
David Brownellb9772a22006-12-06 17:13:53 -08001764 gpio = OMAP_MPUIO(0);
Syed Mohammed, Khasim5492fb12007-11-29 16:15:11 -08001765 else if (cpu_class_is_omap2() || cpu_is_omap730())
David Brownellb9772a22006-12-06 17:13:53 -08001766 bankwidth = 32;
1767
1768 for (j = 0; j < bankwidth; j++, gpio++, mask <<= 1) {
1769 unsigned irq, value, is_in, irqstat;
David Brownell52e31342008-03-03 12:43:23 -08001770 const char *label;
David Brownellb9772a22006-12-06 17:13:53 -08001771
David Brownell52e31342008-03-03 12:43:23 -08001772 label = gpiochip_is_requested(&bank->chip, j);
1773 if (!label)
David Brownellb9772a22006-12-06 17:13:53 -08001774 continue;
1775
1776 irq = bank->virtual_irq_start + j;
David Brownell0b84b5c2008-12-10 17:35:25 -08001777 value = gpio_get_value(gpio);
David Brownellb9772a22006-12-06 17:13:53 -08001778 is_in = gpio_is_input(bank, mask);
1779
David Brownelle5c56ed2006-12-06 17:13:59 -08001780 if (bank_is_mpuio(bank))
David Brownell52e31342008-03-03 12:43:23 -08001781 seq_printf(s, "MPUIO %2d ", j);
David Brownellb9772a22006-12-06 17:13:53 -08001782 else
David Brownell52e31342008-03-03 12:43:23 -08001783 seq_printf(s, "GPIO %3d ", gpio);
Jarkko Nikula21c867f2008-12-10 17:35:24 -08001784 seq_printf(s, "(%-20.20s): %s %s",
David Brownell52e31342008-03-03 12:43:23 -08001785 label,
David Brownellb9772a22006-12-06 17:13:53 -08001786 is_in ? "in " : "out",
1787 value ? "hi" : "lo");
1788
David Brownell52e31342008-03-03 12:43:23 -08001789/* FIXME for at least omap2, show pullup/pulldown state */
1790
David Brownellb9772a22006-12-06 17:13:53 -08001791 irqstat = irq_desc[irq].status;
Tony Lindgren3a26e332009-01-15 13:09:53 +02001792#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP24XX) || \
1793 defined(CONFIG_ARCH_OMAP34XX)
David Brownellb9772a22006-12-06 17:13:53 -08001794 if (is_in && ((bank->suspend_wakeup & mask)
1795 || irqstat & IRQ_TYPE_SENSE_MASK)) {
1796 char *trigger = NULL;
1797
1798 switch (irqstat & IRQ_TYPE_SENSE_MASK) {
1799 case IRQ_TYPE_EDGE_FALLING:
1800 trigger = "falling";
1801 break;
1802 case IRQ_TYPE_EDGE_RISING:
1803 trigger = "rising";
1804 break;
1805 case IRQ_TYPE_EDGE_BOTH:
1806 trigger = "bothedge";
1807 break;
1808 case IRQ_TYPE_LEVEL_LOW:
1809 trigger = "low";
1810 break;
1811 case IRQ_TYPE_LEVEL_HIGH:
1812 trigger = "high";
1813 break;
1814 case IRQ_TYPE_NONE:
David Brownell52e31342008-03-03 12:43:23 -08001815 trigger = "(?)";
David Brownellb9772a22006-12-06 17:13:53 -08001816 break;
1817 }
David Brownell52e31342008-03-03 12:43:23 -08001818 seq_printf(s, ", irq-%d %-8s%s",
David Brownellb9772a22006-12-06 17:13:53 -08001819 irq, trigger,
1820 (bank->suspend_wakeup & mask)
1821 ? " wakeup" : "");
1822 }
Tony Lindgren3a26e332009-01-15 13:09:53 +02001823#endif
David Brownellb9772a22006-12-06 17:13:53 -08001824 seq_printf(s, "\n");
1825 }
1826
David Brownelle5c56ed2006-12-06 17:13:59 -08001827 if (bank_is_mpuio(bank)) {
David Brownellb9772a22006-12-06 17:13:53 -08001828 seq_printf(s, "\n");
1829 gpio = 0;
1830 }
1831 }
1832 return 0;
1833}
1834
1835static int dbg_gpio_open(struct inode *inode, struct file *file)
1836{
David Brownelle5c56ed2006-12-06 17:13:59 -08001837 return single_open(file, dbg_gpio_show, &inode->i_private);
David Brownellb9772a22006-12-06 17:13:53 -08001838}
1839
1840static const struct file_operations debug_fops = {
1841 .open = dbg_gpio_open,
1842 .read = seq_read,
1843 .llseek = seq_lseek,
1844 .release = single_release,
1845};
1846
1847static int __init omap_gpio_debuginit(void)
1848{
David Brownelle5c56ed2006-12-06 17:13:59 -08001849 (void) debugfs_create_file("omap_gpio", S_IRUGO,
1850 NULL, NULL, &debug_fops);
David Brownellb9772a22006-12-06 17:13:53 -08001851 return 0;
1852}
1853late_initcall(omap_gpio_debuginit);
1854#endif