Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 1 | /* |
| 2 | * Freescale Ethernet controllers |
| 3 | * |
| 4 | * Copyright (c) 2005 Intracom S.A. |
| 5 | * by Pantelis Antoniou <panto@intracom.gr> |
| 6 | * |
| 7 | * 2005 (c) MontaVista Software, Inc. |
| 8 | * Vitaly Bordug <vbordug@ru.mvista.com> |
| 9 | * |
| 10 | * This file is licensed under the terms of the GNU General Public License |
| 11 | * version 2. This program is licensed "as is" without any warranty of any |
| 12 | * kind, whether express or implied. |
| 13 | */ |
| 14 | |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 15 | #include <linux/module.h> |
| 16 | #include <linux/kernel.h> |
| 17 | #include <linux/types.h> |
| 18 | #include <linux/sched.h> |
| 19 | #include <linux/string.h> |
| 20 | #include <linux/ptrace.h> |
| 21 | #include <linux/errno.h> |
| 22 | #include <linux/ioport.h> |
| 23 | #include <linux/slab.h> |
| 24 | #include <linux/interrupt.h> |
| 25 | #include <linux/pci.h> |
| 26 | #include <linux/init.h> |
| 27 | #include <linux/delay.h> |
| 28 | #include <linux/netdevice.h> |
| 29 | #include <linux/etherdevice.h> |
| 30 | #include <linux/skbuff.h> |
| 31 | #include <linux/spinlock.h> |
| 32 | #include <linux/mii.h> |
| 33 | #include <linux/ethtool.h> |
| 34 | #include <linux/bitops.h> |
| 35 | #include <linux/fs.h> |
Marcelo Tosatti | f7b9996 | 2005-11-09 11:00:16 -0200 | [diff] [blame] | 36 | #include <linux/platform_device.h> |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 37 | |
| 38 | #include <asm/irq.h> |
| 39 | #include <asm/uaccess.h> |
| 40 | |
| 41 | #ifdef CONFIG_8xx |
| 42 | #include <asm/8xx_immap.h> |
| 43 | #include <asm/pgtable.h> |
| 44 | #include <asm/mpc8xx.h> |
| 45 | #include <asm/commproc.h> |
| 46 | #endif |
| 47 | |
| 48 | #include "fs_enet.h" |
Vitaly Bordug | 5b4b845 | 2006-08-14 23:00:30 -0700 | [diff] [blame] | 49 | #include "fec.h" |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 50 | |
| 51 | /*************************************************/ |
| 52 | |
| 53 | #if defined(CONFIG_CPM1) |
| 54 | /* for a CPM1 __raw_xxx's are sufficient */ |
| 55 | #define __fs_out32(addr, x) __raw_writel(x, addr) |
| 56 | #define __fs_out16(addr, x) __raw_writew(x, addr) |
| 57 | #define __fs_in32(addr) __raw_readl(addr) |
| 58 | #define __fs_in16(addr) __raw_readw(addr) |
| 59 | #else |
| 60 | /* for others play it safe */ |
| 61 | #define __fs_out32(addr, x) out_be32(addr, x) |
| 62 | #define __fs_out16(addr, x) out_be16(addr, x) |
| 63 | #define __fs_in32(addr) in_be32(addr) |
| 64 | #define __fs_in16(addr) in_be16(addr) |
| 65 | #endif |
| 66 | |
| 67 | /* write */ |
| 68 | #define FW(_fecp, _reg, _v) __fs_out32(&(_fecp)->fec_ ## _reg, (_v)) |
| 69 | |
| 70 | /* read */ |
| 71 | #define FR(_fecp, _reg) __fs_in32(&(_fecp)->fec_ ## _reg) |
| 72 | |
| 73 | /* set bits */ |
| 74 | #define FS(_fecp, _reg, _v) FW(_fecp, _reg, FR(_fecp, _reg) | (_v)) |
| 75 | |
| 76 | /* clear bits */ |
| 77 | #define FC(_fecp, _reg, _v) FW(_fecp, _reg, FR(_fecp, _reg) & ~(_v)) |
| 78 | |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 79 | /* |
Vitaly Bordug | 5b4b845 | 2006-08-14 23:00:30 -0700 | [diff] [blame] | 80 | * Delay to wait for FEC reset command to complete (in us) |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 81 | */ |
| 82 | #define FEC_RESET_DELAY 50 |
| 83 | |
| 84 | static int whack_reset(fec_t * fecp) |
| 85 | { |
| 86 | int i; |
| 87 | |
| 88 | FW(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_RESET); |
| 89 | for (i = 0; i < FEC_RESET_DELAY; i++) { |
| 90 | if ((FR(fecp, ecntrl) & FEC_ECNTRL_RESET) == 0) |
| 91 | return 0; /* OK */ |
| 92 | udelay(1); |
| 93 | } |
| 94 | |
| 95 | return -1; |
| 96 | } |
| 97 | |
| 98 | static int do_pd_setup(struct fs_enet_private *fep) |
| 99 | { |
| 100 | struct platform_device *pdev = to_platform_device(fep->dev); |
| 101 | struct resource *r; |
| 102 | |
| 103 | /* Fill out IRQ field */ |
| 104 | fep->interrupt = platform_get_irq_byname(pdev,"interrupt"); |
David Vrabel | 4894473 | 2006-01-19 17:56:29 +0000 | [diff] [blame] | 105 | if (fep->interrupt < 0) |
| 106 | return -EINVAL; |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 107 | |
| 108 | r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs"); |
| 109 | fep->fec.fecp =(void*)r->start; |
| 110 | |
| 111 | if(fep->fec.fecp == NULL) |
| 112 | return -EINVAL; |
| 113 | |
| 114 | return 0; |
| 115 | |
| 116 | } |
| 117 | |
| 118 | #define FEC_NAPI_RX_EVENT_MSK (FEC_ENET_RXF | FEC_ENET_RXB) |
| 119 | #define FEC_RX_EVENT (FEC_ENET_RXF) |
| 120 | #define FEC_TX_EVENT (FEC_ENET_TXF) |
| 121 | #define FEC_ERR_EVENT_MSK (FEC_ENET_HBERR | FEC_ENET_BABR | \ |
| 122 | FEC_ENET_BABT | FEC_ENET_EBERR) |
| 123 | |
| 124 | static int setup_data(struct net_device *dev) |
| 125 | { |
| 126 | struct fs_enet_private *fep = netdev_priv(dev); |
| 127 | |
| 128 | if (do_pd_setup(fep) != 0) |
| 129 | return -EINVAL; |
| 130 | |
| 131 | fep->fec.hthi = 0; |
| 132 | fep->fec.htlo = 0; |
| 133 | |
| 134 | fep->ev_napi_rx = FEC_NAPI_RX_EVENT_MSK; |
| 135 | fep->ev_rx = FEC_RX_EVENT; |
| 136 | fep->ev_tx = FEC_TX_EVENT; |
| 137 | fep->ev_err = FEC_ERR_EVENT_MSK; |
| 138 | |
| 139 | return 0; |
| 140 | } |
| 141 | |
| 142 | static int allocate_bd(struct net_device *dev) |
| 143 | { |
| 144 | struct fs_enet_private *fep = netdev_priv(dev); |
| 145 | const struct fs_platform_info *fpi = fep->fpi; |
| 146 | |
| 147 | fep->ring_base = dma_alloc_coherent(fep->dev, |
| 148 | (fpi->tx_ring + fpi->rx_ring) * |
| 149 | sizeof(cbd_t), &fep->ring_mem_addr, |
| 150 | GFP_KERNEL); |
| 151 | if (fep->ring_base == NULL) |
| 152 | return -ENOMEM; |
| 153 | |
| 154 | return 0; |
| 155 | } |
| 156 | |
| 157 | static void free_bd(struct net_device *dev) |
| 158 | { |
| 159 | struct fs_enet_private *fep = netdev_priv(dev); |
| 160 | const struct fs_platform_info *fpi = fep->fpi; |
| 161 | |
| 162 | if(fep->ring_base) |
| 163 | dma_free_coherent(fep->dev, (fpi->tx_ring + fpi->rx_ring) |
| 164 | * sizeof(cbd_t), |
| 165 | fep->ring_base, |
| 166 | fep->ring_mem_addr); |
| 167 | } |
| 168 | |
| 169 | static void cleanup_data(struct net_device *dev) |
| 170 | { |
| 171 | /* nothing */ |
| 172 | } |
| 173 | |
| 174 | static void set_promiscuous_mode(struct net_device *dev) |
| 175 | { |
| 176 | struct fs_enet_private *fep = netdev_priv(dev); |
| 177 | fec_t *fecp = fep->fec.fecp; |
| 178 | |
| 179 | FS(fecp, r_cntrl, FEC_RCNTRL_PROM); |
| 180 | } |
| 181 | |
| 182 | static void set_multicast_start(struct net_device *dev) |
| 183 | { |
| 184 | struct fs_enet_private *fep = netdev_priv(dev); |
| 185 | |
| 186 | fep->fec.hthi = 0; |
| 187 | fep->fec.htlo = 0; |
| 188 | } |
| 189 | |
| 190 | static void set_multicast_one(struct net_device *dev, const u8 *mac) |
| 191 | { |
| 192 | struct fs_enet_private *fep = netdev_priv(dev); |
| 193 | int temp, hash_index, i, j; |
| 194 | u32 crc, csrVal; |
| 195 | u8 byte, msb; |
| 196 | |
| 197 | crc = 0xffffffff; |
| 198 | for (i = 0; i < 6; i++) { |
| 199 | byte = mac[i]; |
| 200 | for (j = 0; j < 8; j++) { |
| 201 | msb = crc >> 31; |
| 202 | crc <<= 1; |
| 203 | if (msb ^ (byte & 0x1)) |
| 204 | crc ^= FEC_CRC_POLY; |
| 205 | byte >>= 1; |
| 206 | } |
| 207 | } |
| 208 | |
| 209 | temp = (crc & 0x3f) >> 1; |
| 210 | hash_index = ((temp & 0x01) << 4) | |
| 211 | ((temp & 0x02) << 2) | |
| 212 | ((temp & 0x04)) | |
| 213 | ((temp & 0x08) >> 2) | |
| 214 | ((temp & 0x10) >> 4); |
| 215 | csrVal = 1 << hash_index; |
| 216 | if (crc & 1) |
| 217 | fep->fec.hthi |= csrVal; |
| 218 | else |
| 219 | fep->fec.htlo |= csrVal; |
| 220 | } |
| 221 | |
| 222 | static void set_multicast_finish(struct net_device *dev) |
| 223 | { |
| 224 | struct fs_enet_private *fep = netdev_priv(dev); |
| 225 | fec_t *fecp = fep->fec.fecp; |
| 226 | |
| 227 | /* if all multi or too many multicasts; just enable all */ |
| 228 | if ((dev->flags & IFF_ALLMULTI) != 0 || |
| 229 | dev->mc_count > FEC_MAX_MULTICAST_ADDRS) { |
| 230 | fep->fec.hthi = 0xffffffffU; |
| 231 | fep->fec.htlo = 0xffffffffU; |
| 232 | } |
| 233 | |
| 234 | FC(fecp, r_cntrl, FEC_RCNTRL_PROM); |
| 235 | FW(fecp, hash_table_high, fep->fec.hthi); |
| 236 | FW(fecp, hash_table_low, fep->fec.htlo); |
| 237 | } |
| 238 | |
| 239 | static void set_multicast_list(struct net_device *dev) |
| 240 | { |
| 241 | struct dev_mc_list *pmc; |
| 242 | |
| 243 | if ((dev->flags & IFF_PROMISC) == 0) { |
| 244 | set_multicast_start(dev); |
| 245 | for (pmc = dev->mc_list; pmc != NULL; pmc = pmc->next) |
| 246 | set_multicast_one(dev, pmc->dmi_addr); |
| 247 | set_multicast_finish(dev); |
| 248 | } else |
| 249 | set_promiscuous_mode(dev); |
| 250 | } |
| 251 | |
| 252 | static void restart(struct net_device *dev) |
| 253 | { |
| 254 | #ifdef CONFIG_DUET |
| 255 | immap_t *immap = fs_enet_immap; |
| 256 | u32 cptr; |
| 257 | #endif |
| 258 | struct fs_enet_private *fep = netdev_priv(dev); |
| 259 | fec_t *fecp = fep->fec.fecp; |
| 260 | const struct fs_platform_info *fpi = fep->fpi; |
| 261 | dma_addr_t rx_bd_base_phys, tx_bd_base_phys; |
| 262 | int r; |
| 263 | u32 addrhi, addrlo; |
| 264 | |
Vitaly Bordug | 5b4b845 | 2006-08-14 23:00:30 -0700 | [diff] [blame] | 265 | struct mii_bus* mii = fep->phydev->bus; |
| 266 | struct fec_info* fec_inf = mii->priv; |
| 267 | |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 268 | r = whack_reset(fep->fec.fecp); |
| 269 | if (r != 0) |
| 270 | printk(KERN_ERR DRV_MODULE_NAME |
| 271 | ": %s FEC Reset FAILED!\n", dev->name); |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 272 | /* |
Vitaly Bordug | 5b4b845 | 2006-08-14 23:00:30 -0700 | [diff] [blame] | 273 | * Set station address. |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 274 | */ |
| 275 | addrhi = ((u32) dev->dev_addr[0] << 24) | |
| 276 | ((u32) dev->dev_addr[1] << 16) | |
| 277 | ((u32) dev->dev_addr[2] << 8) | |
| 278 | (u32) dev->dev_addr[3]; |
| 279 | addrlo = ((u32) dev->dev_addr[4] << 24) | |
| 280 | ((u32) dev->dev_addr[5] << 16); |
| 281 | FW(fecp, addr_low, addrhi); |
| 282 | FW(fecp, addr_high, addrlo); |
| 283 | |
| 284 | /* |
| 285 | * Reset all multicast. |
| 286 | */ |
| 287 | FW(fecp, hash_table_high, fep->fec.hthi); |
| 288 | FW(fecp, hash_table_low, fep->fec.htlo); |
| 289 | |
| 290 | /* |
| 291 | * Set maximum receive buffer size. |
| 292 | */ |
| 293 | FW(fecp, r_buff_size, PKT_MAXBLR_SIZE); |
| 294 | FW(fecp, r_hash, PKT_MAXBUF_SIZE); |
| 295 | |
| 296 | /* get physical address */ |
| 297 | rx_bd_base_phys = fep->ring_mem_addr; |
| 298 | tx_bd_base_phys = rx_bd_base_phys + sizeof(cbd_t) * fpi->rx_ring; |
| 299 | |
| 300 | /* |
| 301 | * Set receive and transmit descriptor base. |
| 302 | */ |
| 303 | FW(fecp, r_des_start, rx_bd_base_phys); |
| 304 | FW(fecp, x_des_start, tx_bd_base_phys); |
| 305 | |
| 306 | fs_init_bds(dev); |
| 307 | |
| 308 | /* |
| 309 | * Enable big endian and don't care about SDMA FC. |
| 310 | */ |
| 311 | FW(fecp, fun_code, 0x78000000); |
| 312 | |
| 313 | /* |
Vitaly Bordug | 5b4b845 | 2006-08-14 23:00:30 -0700 | [diff] [blame] | 314 | * Set MII speed. |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 315 | */ |
Vitaly Bordug | 5b4b845 | 2006-08-14 23:00:30 -0700 | [diff] [blame] | 316 | FW(fecp, mii_speed, fec_inf->mii_speed); |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 317 | |
| 318 | /* |
Vitaly Bordug | 5b4b845 | 2006-08-14 23:00:30 -0700 | [diff] [blame] | 319 | * Clear any outstanding interrupt. |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 320 | */ |
| 321 | FW(fecp, ievent, 0xffc0); |
| 322 | FW(fecp, ivec, (fep->interrupt / 2) << 29); |
| 323 | |
| 324 | |
| 325 | /* |
| 326 | * adjust to speed (only for DUET & RMII) |
| 327 | */ |
| 328 | #ifdef CONFIG_DUET |
| 329 | if (fpi->use_rmii) { |
| 330 | cptr = in_be32(&immap->im_cpm.cp_cptr); |
| 331 | switch (fs_get_fec_index(fpi->fs_no)) { |
| 332 | case 0: |
| 333 | cptr |= 0x100; |
| 334 | if (fep->speed == 10) |
| 335 | cptr |= 0x0000010; |
| 336 | else if (fep->speed == 100) |
| 337 | cptr &= ~0x0000010; |
| 338 | break; |
| 339 | case 1: |
| 340 | cptr |= 0x80; |
| 341 | if (fep->speed == 10) |
| 342 | cptr |= 0x0000008; |
| 343 | else if (fep->speed == 100) |
| 344 | cptr &= ~0x0000008; |
| 345 | break; |
| 346 | default: |
| 347 | BUG(); /* should never happen */ |
| 348 | break; |
| 349 | } |
| 350 | out_be32(&immap->im_cpm.cp_cptr, cptr); |
| 351 | } |
| 352 | #endif |
| 353 | |
Vitaly Bordug | 5b4b845 | 2006-08-14 23:00:30 -0700 | [diff] [blame] | 354 | |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 355 | FW(fecp, r_cntrl, FEC_RCNTRL_MII_MODE); /* MII enable */ |
| 356 | /* |
Vitaly Bordug | 5b4b845 | 2006-08-14 23:00:30 -0700 | [diff] [blame] | 357 | * adjust to duplex mode |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 358 | */ |
Vitaly Bordug | 5b4b845 | 2006-08-14 23:00:30 -0700 | [diff] [blame] | 359 | if (fep->phydev->duplex) { |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 360 | FC(fecp, r_cntrl, FEC_RCNTRL_DRT); |
| 361 | FS(fecp, x_cntrl, FEC_TCNTRL_FDEN); /* FD enable */ |
| 362 | } else { |
| 363 | FS(fecp, r_cntrl, FEC_RCNTRL_DRT); |
| 364 | FC(fecp, x_cntrl, FEC_TCNTRL_FDEN); /* FD disable */ |
| 365 | } |
| 366 | |
| 367 | /* |
| 368 | * Enable interrupts we wish to service. |
| 369 | */ |
| 370 | FW(fecp, imask, FEC_ENET_TXF | FEC_ENET_TXB | |
| 371 | FEC_ENET_RXF | FEC_ENET_RXB); |
| 372 | |
| 373 | /* |
| 374 | * And last, enable the transmit and receive processing. |
| 375 | */ |
| 376 | FW(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_ETHER_EN); |
| 377 | FW(fecp, r_des_active, 0x01000000); |
| 378 | } |
| 379 | |
| 380 | static void stop(struct net_device *dev) |
| 381 | { |
| 382 | struct fs_enet_private *fep = netdev_priv(dev); |
Vitaly Bordug | 5b4b845 | 2006-08-14 23:00:30 -0700 | [diff] [blame] | 383 | const struct fs_platform_info *fpi = fep->fpi; |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 384 | fec_t *fecp = fep->fec.fecp; |
Vitaly Bordug | 5b4b845 | 2006-08-14 23:00:30 -0700 | [diff] [blame] | 385 | |
| 386 | struct fec_info* feci= fep->phydev->bus->priv; |
| 387 | |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 388 | int i; |
| 389 | |
| 390 | if ((FR(fecp, ecntrl) & FEC_ECNTRL_ETHER_EN) == 0) |
| 391 | return; /* already down */ |
| 392 | |
| 393 | FW(fecp, x_cntrl, 0x01); /* Graceful transmit stop */ |
| 394 | for (i = 0; ((FR(fecp, ievent) & 0x10000000) == 0) && |
| 395 | i < FEC_RESET_DELAY; i++) |
| 396 | udelay(1); |
| 397 | |
| 398 | if (i == FEC_RESET_DELAY) |
| 399 | printk(KERN_WARNING DRV_MODULE_NAME |
| 400 | ": %s FEC timeout on graceful transmit stop\n", |
| 401 | dev->name); |
| 402 | /* |
| 403 | * Disable FEC. Let only MII interrupts. |
| 404 | */ |
| 405 | FW(fecp, imask, 0); |
| 406 | FC(fecp, ecntrl, FEC_ECNTRL_ETHER_EN); |
| 407 | |
| 408 | fs_cleanup_bds(dev); |
| 409 | |
| 410 | /* shut down FEC1? that's where the mii bus is */ |
Vitaly Bordug | 5b4b845 | 2006-08-14 23:00:30 -0700 | [diff] [blame] | 411 | if (fpi->has_phy) { |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 412 | FS(fecp, r_cntrl, FEC_RCNTRL_MII_MODE); /* MII enable */ |
| 413 | FS(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_ETHER_EN); |
| 414 | FW(fecp, ievent, FEC_ENET_MII); |
Vitaly Bordug | 5b4b845 | 2006-08-14 23:00:30 -0700 | [diff] [blame] | 415 | FW(fecp, mii_speed, feci->mii_speed); |
Pantelis Antoniou | 48257c4 | 2005-10-28 16:25:58 -0400 | [diff] [blame] | 416 | } |
| 417 | } |
| 418 | |
| 419 | static void pre_request_irq(struct net_device *dev, int irq) |
| 420 | { |
| 421 | immap_t *immap = fs_enet_immap; |
| 422 | u32 siel; |
| 423 | |
| 424 | /* SIU interrupt */ |
| 425 | if (irq >= SIU_IRQ0 && irq < SIU_LEVEL7) { |
| 426 | |
| 427 | siel = in_be32(&immap->im_siu_conf.sc_siel); |
| 428 | if ((irq & 1) == 0) |
| 429 | siel |= (0x80000000 >> irq); |
| 430 | else |
| 431 | siel &= ~(0x80000000 >> (irq & ~1)); |
| 432 | out_be32(&immap->im_siu_conf.sc_siel, siel); |
| 433 | } |
| 434 | } |
| 435 | |
| 436 | static void post_free_irq(struct net_device *dev, int irq) |
| 437 | { |
| 438 | /* nothing */ |
| 439 | } |
| 440 | |
| 441 | static void napi_clear_rx_event(struct net_device *dev) |
| 442 | { |
| 443 | struct fs_enet_private *fep = netdev_priv(dev); |
| 444 | fec_t *fecp = fep->fec.fecp; |
| 445 | |
| 446 | FW(fecp, ievent, FEC_NAPI_RX_EVENT_MSK); |
| 447 | } |
| 448 | |
| 449 | static void napi_enable_rx(struct net_device *dev) |
| 450 | { |
| 451 | struct fs_enet_private *fep = netdev_priv(dev); |
| 452 | fec_t *fecp = fep->fec.fecp; |
| 453 | |
| 454 | FS(fecp, imask, FEC_NAPI_RX_EVENT_MSK); |
| 455 | } |
| 456 | |
| 457 | static void napi_disable_rx(struct net_device *dev) |
| 458 | { |
| 459 | struct fs_enet_private *fep = netdev_priv(dev); |
| 460 | fec_t *fecp = fep->fec.fecp; |
| 461 | |
| 462 | FC(fecp, imask, FEC_NAPI_RX_EVENT_MSK); |
| 463 | } |
| 464 | |
| 465 | static void rx_bd_done(struct net_device *dev) |
| 466 | { |
| 467 | struct fs_enet_private *fep = netdev_priv(dev); |
| 468 | fec_t *fecp = fep->fec.fecp; |
| 469 | |
| 470 | FW(fecp, r_des_active, 0x01000000); |
| 471 | } |
| 472 | |
| 473 | static void tx_kickstart(struct net_device *dev) |
| 474 | { |
| 475 | struct fs_enet_private *fep = netdev_priv(dev); |
| 476 | fec_t *fecp = fep->fec.fecp; |
| 477 | |
| 478 | FW(fecp, x_des_active, 0x01000000); |
| 479 | } |
| 480 | |
| 481 | static u32 get_int_events(struct net_device *dev) |
| 482 | { |
| 483 | struct fs_enet_private *fep = netdev_priv(dev); |
| 484 | fec_t *fecp = fep->fec.fecp; |
| 485 | |
| 486 | return FR(fecp, ievent) & FR(fecp, imask); |
| 487 | } |
| 488 | |
| 489 | static void clear_int_events(struct net_device *dev, u32 int_events) |
| 490 | { |
| 491 | struct fs_enet_private *fep = netdev_priv(dev); |
| 492 | fec_t *fecp = fep->fec.fecp; |
| 493 | |
| 494 | FW(fecp, ievent, int_events); |
| 495 | } |
| 496 | |
| 497 | static void ev_error(struct net_device *dev, u32 int_events) |
| 498 | { |
| 499 | printk(KERN_WARNING DRV_MODULE_NAME |
| 500 | ": %s FEC ERROR(s) 0x%x\n", dev->name, int_events); |
| 501 | } |
| 502 | |
| 503 | int get_regs(struct net_device *dev, void *p, int *sizep) |
| 504 | { |
| 505 | struct fs_enet_private *fep = netdev_priv(dev); |
| 506 | |
| 507 | if (*sizep < sizeof(fec_t)) |
| 508 | return -EINVAL; |
| 509 | |
| 510 | memcpy_fromio(p, fep->fec.fecp, sizeof(fec_t)); |
| 511 | |
| 512 | return 0; |
| 513 | } |
| 514 | |
| 515 | int get_regs_len(struct net_device *dev) |
| 516 | { |
| 517 | return sizeof(fec_t); |
| 518 | } |
| 519 | |
| 520 | void tx_restart(struct net_device *dev) |
| 521 | { |
| 522 | /* nothing */ |
| 523 | } |
| 524 | |
| 525 | /*************************************************************************/ |
| 526 | |
| 527 | const struct fs_ops fs_fec_ops = { |
| 528 | .setup_data = setup_data, |
| 529 | .cleanup_data = cleanup_data, |
| 530 | .set_multicast_list = set_multicast_list, |
| 531 | .restart = restart, |
| 532 | .stop = stop, |
| 533 | .pre_request_irq = pre_request_irq, |
| 534 | .post_free_irq = post_free_irq, |
| 535 | .napi_clear_rx_event = napi_clear_rx_event, |
| 536 | .napi_enable_rx = napi_enable_rx, |
| 537 | .napi_disable_rx = napi_disable_rx, |
| 538 | .rx_bd_done = rx_bd_done, |
| 539 | .tx_kickstart = tx_kickstart, |
| 540 | .get_int_events = get_int_events, |
| 541 | .clear_int_events = clear_int_events, |
| 542 | .ev_error = ev_error, |
| 543 | .get_regs = get_regs, |
| 544 | .get_regs_len = get_regs_len, |
| 545 | .tx_restart = tx_restart, |
| 546 | .allocate_bd = allocate_bd, |
| 547 | .free_bd = free_bd, |
| 548 | }; |
| 549 | |