Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2005-2006 Atmel Corporation |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License version 2 as |
| 6 | * published by the Free Software Foundation. |
| 7 | */ |
| 8 | #include <linux/clk.h> |
Haavard Skinnemoen | d0a2b7a | 2007-03-21 18:08:49 +0100 | [diff] [blame] | 9 | #include <linux/fb.h> |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 10 | #include <linux/init.h> |
| 11 | #include <linux/platform_device.h> |
David Brownell | 6b84bbf | 2007-06-22 19:17:57 -0700 | [diff] [blame] | 12 | #include <linux/dma-mapping.h> |
Haavard Skinnemoen | 41d8ca4 | 2007-02-16 13:56:11 +0100 | [diff] [blame] | 13 | #include <linux/spi/spi.h> |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 14 | |
| 15 | #include <asm/io.h> |
| 16 | |
Haavard Skinnemoen | c3e2a79 | 2006-12-04 13:46:52 +0100 | [diff] [blame] | 17 | #include <asm/arch/at32ap7000.h> |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 18 | #include <asm/arch/board.h> |
| 19 | #include <asm/arch/portmux.h> |
| 20 | #include <asm/arch/sm.h> |
| 21 | |
Haavard Skinnemoen | d0a2b7a | 2007-03-21 18:08:49 +0100 | [diff] [blame] | 22 | #include <video/atmel_lcdc.h> |
| 23 | |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 24 | #include "clock.h" |
Haavard Skinnemoen | 9c8f8e7 | 2007-02-01 16:34:10 +0100 | [diff] [blame] | 25 | #include "hmatrix.h" |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 26 | #include "pio.h" |
| 27 | #include "sm.h" |
| 28 | |
| 29 | #define PBMEM(base) \ |
| 30 | { \ |
| 31 | .start = base, \ |
| 32 | .end = base + 0x3ff, \ |
| 33 | .flags = IORESOURCE_MEM, \ |
| 34 | } |
| 35 | #define IRQ(num) \ |
| 36 | { \ |
| 37 | .start = num, \ |
| 38 | .end = num, \ |
| 39 | .flags = IORESOURCE_IRQ, \ |
| 40 | } |
| 41 | #define NAMED_IRQ(num, _name) \ |
| 42 | { \ |
| 43 | .start = num, \ |
| 44 | .end = num, \ |
| 45 | .name = _name, \ |
| 46 | .flags = IORESOURCE_IRQ, \ |
| 47 | } |
| 48 | |
David Brownell | 6b84bbf | 2007-06-22 19:17:57 -0700 | [diff] [blame] | 49 | /* REVISIT these assume *every* device supports DMA, but several |
| 50 | * don't ... tc, smc, pio, rtc, watchdog, pwm, ps2, and more. |
| 51 | */ |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 52 | #define DEFINE_DEV(_name, _id) \ |
David Brownell | 6b84bbf | 2007-06-22 19:17:57 -0700 | [diff] [blame] | 53 | static u64 _name##_id##_dma_mask = DMA_32BIT_MASK; \ |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 54 | static struct platform_device _name##_id##_device = { \ |
| 55 | .name = #_name, \ |
| 56 | .id = _id, \ |
| 57 | .dev = { \ |
David Brownell | 6b84bbf | 2007-06-22 19:17:57 -0700 | [diff] [blame] | 58 | .dma_mask = &_name##_id##_dma_mask, \ |
| 59 | .coherent_dma_mask = DMA_32BIT_MASK, \ |
| 60 | }, \ |
| 61 | .resource = _name##_id##_resource, \ |
| 62 | .num_resources = ARRAY_SIZE(_name##_id##_resource), \ |
| 63 | } |
| 64 | #define DEFINE_DEV_DATA(_name, _id) \ |
| 65 | static u64 _name##_id##_dma_mask = DMA_32BIT_MASK; \ |
| 66 | static struct platform_device _name##_id##_device = { \ |
| 67 | .name = #_name, \ |
| 68 | .id = _id, \ |
| 69 | .dev = { \ |
| 70 | .dma_mask = &_name##_id##_dma_mask, \ |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 71 | .platform_data = &_name##_id##_data, \ |
David Brownell | 6b84bbf | 2007-06-22 19:17:57 -0700 | [diff] [blame] | 72 | .coherent_dma_mask = DMA_32BIT_MASK, \ |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 73 | }, \ |
| 74 | .resource = _name##_id##_resource, \ |
| 75 | .num_resources = ARRAY_SIZE(_name##_id##_resource), \ |
| 76 | } |
| 77 | |
Haavard Skinnemoen | c3e2a79 | 2006-12-04 13:46:52 +0100 | [diff] [blame] | 78 | #define select_peripheral(pin, periph, flags) \ |
| 79 | at32_select_periph(GPIO_PIN_##pin, GPIO_##periph, flags) |
| 80 | |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 81 | #define DEV_CLK(_name, devname, bus, _index) \ |
| 82 | static struct clk devname##_##_name = { \ |
| 83 | .name = #_name, \ |
| 84 | .dev = &devname##_device.dev, \ |
| 85 | .parent = &bus##_clk, \ |
| 86 | .mode = bus##_clk_mode, \ |
| 87 | .get_rate = bus##_clk_get_rate, \ |
| 88 | .index = _index, \ |
| 89 | } |
| 90 | |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 91 | unsigned long at32ap7000_osc_rates[3] = { |
| 92 | [0] = 32768, |
| 93 | /* FIXME: these are ATSTK1002-specific */ |
| 94 | [1] = 20000000, |
| 95 | [2] = 12000000, |
| 96 | }; |
| 97 | |
| 98 | static unsigned long osc_get_rate(struct clk *clk) |
| 99 | { |
| 100 | return at32ap7000_osc_rates[clk->index]; |
| 101 | } |
| 102 | |
| 103 | static unsigned long pll_get_rate(struct clk *clk, unsigned long control) |
| 104 | { |
| 105 | unsigned long div, mul, rate; |
| 106 | |
| 107 | if (!(control & SM_BIT(PLLEN))) |
| 108 | return 0; |
| 109 | |
| 110 | div = SM_BFEXT(PLLDIV, control) + 1; |
| 111 | mul = SM_BFEXT(PLLMUL, control) + 1; |
| 112 | |
| 113 | rate = clk->parent->get_rate(clk->parent); |
| 114 | rate = (rate + div / 2) / div; |
| 115 | rate *= mul; |
| 116 | |
| 117 | return rate; |
| 118 | } |
| 119 | |
| 120 | static unsigned long pll0_get_rate(struct clk *clk) |
| 121 | { |
| 122 | u32 control; |
| 123 | |
| 124 | control = sm_readl(&system_manager, PM_PLL0); |
| 125 | |
| 126 | return pll_get_rate(clk, control); |
| 127 | } |
| 128 | |
| 129 | static unsigned long pll1_get_rate(struct clk *clk) |
| 130 | { |
| 131 | u32 control; |
| 132 | |
| 133 | control = sm_readl(&system_manager, PM_PLL1); |
| 134 | |
| 135 | return pll_get_rate(clk, control); |
| 136 | } |
| 137 | |
| 138 | /* |
| 139 | * The AT32AP7000 has five primary clock sources: One 32kHz |
| 140 | * oscillator, two crystal oscillators and two PLLs. |
| 141 | */ |
| 142 | static struct clk osc32k = { |
| 143 | .name = "osc32k", |
| 144 | .get_rate = osc_get_rate, |
| 145 | .users = 1, |
| 146 | .index = 0, |
| 147 | }; |
| 148 | static struct clk osc0 = { |
| 149 | .name = "osc0", |
| 150 | .get_rate = osc_get_rate, |
| 151 | .users = 1, |
| 152 | .index = 1, |
| 153 | }; |
| 154 | static struct clk osc1 = { |
| 155 | .name = "osc1", |
| 156 | .get_rate = osc_get_rate, |
| 157 | .index = 2, |
| 158 | }; |
| 159 | static struct clk pll0 = { |
| 160 | .name = "pll0", |
| 161 | .get_rate = pll0_get_rate, |
| 162 | .parent = &osc0, |
| 163 | }; |
| 164 | static struct clk pll1 = { |
| 165 | .name = "pll1", |
| 166 | .get_rate = pll1_get_rate, |
| 167 | .parent = &osc0, |
| 168 | }; |
| 169 | |
| 170 | /* |
| 171 | * The main clock can be either osc0 or pll0. The boot loader may |
| 172 | * have chosen one for us, so we don't really know which one until we |
| 173 | * have a look at the SM. |
| 174 | */ |
| 175 | static struct clk *main_clock; |
| 176 | |
| 177 | /* |
| 178 | * Synchronous clocks are generated from the main clock. The clocks |
| 179 | * must satisfy the constraint |
| 180 | * fCPU >= fHSB >= fPB |
| 181 | * i.e. each clock must not be faster than its parent. |
| 182 | */ |
| 183 | static unsigned long bus_clk_get_rate(struct clk *clk, unsigned int shift) |
| 184 | { |
| 185 | return main_clock->get_rate(main_clock) >> shift; |
| 186 | }; |
| 187 | |
| 188 | static void cpu_clk_mode(struct clk *clk, int enabled) |
| 189 | { |
| 190 | struct at32_sm *sm = &system_manager; |
| 191 | unsigned long flags; |
| 192 | u32 mask; |
| 193 | |
| 194 | spin_lock_irqsave(&sm->lock, flags); |
| 195 | mask = sm_readl(sm, PM_CPU_MASK); |
| 196 | if (enabled) |
| 197 | mask |= 1 << clk->index; |
| 198 | else |
| 199 | mask &= ~(1 << clk->index); |
| 200 | sm_writel(sm, PM_CPU_MASK, mask); |
| 201 | spin_unlock_irqrestore(&sm->lock, flags); |
| 202 | } |
| 203 | |
| 204 | static unsigned long cpu_clk_get_rate(struct clk *clk) |
| 205 | { |
| 206 | unsigned long cksel, shift = 0; |
| 207 | |
| 208 | cksel = sm_readl(&system_manager, PM_CKSEL); |
| 209 | if (cksel & SM_BIT(CPUDIV)) |
| 210 | shift = SM_BFEXT(CPUSEL, cksel) + 1; |
| 211 | |
| 212 | return bus_clk_get_rate(clk, shift); |
| 213 | } |
| 214 | |
| 215 | static void hsb_clk_mode(struct clk *clk, int enabled) |
| 216 | { |
| 217 | struct at32_sm *sm = &system_manager; |
| 218 | unsigned long flags; |
| 219 | u32 mask; |
| 220 | |
| 221 | spin_lock_irqsave(&sm->lock, flags); |
| 222 | mask = sm_readl(sm, PM_HSB_MASK); |
| 223 | if (enabled) |
| 224 | mask |= 1 << clk->index; |
| 225 | else |
| 226 | mask &= ~(1 << clk->index); |
| 227 | sm_writel(sm, PM_HSB_MASK, mask); |
| 228 | spin_unlock_irqrestore(&sm->lock, flags); |
| 229 | } |
| 230 | |
| 231 | static unsigned long hsb_clk_get_rate(struct clk *clk) |
| 232 | { |
| 233 | unsigned long cksel, shift = 0; |
| 234 | |
| 235 | cksel = sm_readl(&system_manager, PM_CKSEL); |
| 236 | if (cksel & SM_BIT(HSBDIV)) |
| 237 | shift = SM_BFEXT(HSBSEL, cksel) + 1; |
| 238 | |
| 239 | return bus_clk_get_rate(clk, shift); |
| 240 | } |
| 241 | |
| 242 | static void pba_clk_mode(struct clk *clk, int enabled) |
| 243 | { |
| 244 | struct at32_sm *sm = &system_manager; |
| 245 | unsigned long flags; |
| 246 | u32 mask; |
| 247 | |
| 248 | spin_lock_irqsave(&sm->lock, flags); |
| 249 | mask = sm_readl(sm, PM_PBA_MASK); |
| 250 | if (enabled) |
| 251 | mask |= 1 << clk->index; |
| 252 | else |
| 253 | mask &= ~(1 << clk->index); |
| 254 | sm_writel(sm, PM_PBA_MASK, mask); |
| 255 | spin_unlock_irqrestore(&sm->lock, flags); |
| 256 | } |
| 257 | |
| 258 | static unsigned long pba_clk_get_rate(struct clk *clk) |
| 259 | { |
| 260 | unsigned long cksel, shift = 0; |
| 261 | |
| 262 | cksel = sm_readl(&system_manager, PM_CKSEL); |
| 263 | if (cksel & SM_BIT(PBADIV)) |
| 264 | shift = SM_BFEXT(PBASEL, cksel) + 1; |
| 265 | |
| 266 | return bus_clk_get_rate(clk, shift); |
| 267 | } |
| 268 | |
| 269 | static void pbb_clk_mode(struct clk *clk, int enabled) |
| 270 | { |
| 271 | struct at32_sm *sm = &system_manager; |
| 272 | unsigned long flags; |
| 273 | u32 mask; |
| 274 | |
| 275 | spin_lock_irqsave(&sm->lock, flags); |
| 276 | mask = sm_readl(sm, PM_PBB_MASK); |
| 277 | if (enabled) |
| 278 | mask |= 1 << clk->index; |
| 279 | else |
| 280 | mask &= ~(1 << clk->index); |
| 281 | sm_writel(sm, PM_PBB_MASK, mask); |
| 282 | spin_unlock_irqrestore(&sm->lock, flags); |
| 283 | } |
| 284 | |
| 285 | static unsigned long pbb_clk_get_rate(struct clk *clk) |
| 286 | { |
| 287 | unsigned long cksel, shift = 0; |
| 288 | |
| 289 | cksel = sm_readl(&system_manager, PM_CKSEL); |
| 290 | if (cksel & SM_BIT(PBBDIV)) |
| 291 | shift = SM_BFEXT(PBBSEL, cksel) + 1; |
| 292 | |
| 293 | return bus_clk_get_rate(clk, shift); |
| 294 | } |
| 295 | |
| 296 | static struct clk cpu_clk = { |
| 297 | .name = "cpu", |
| 298 | .get_rate = cpu_clk_get_rate, |
| 299 | .users = 1, |
| 300 | }; |
| 301 | static struct clk hsb_clk = { |
| 302 | .name = "hsb", |
| 303 | .parent = &cpu_clk, |
| 304 | .get_rate = hsb_clk_get_rate, |
| 305 | }; |
| 306 | static struct clk pba_clk = { |
| 307 | .name = "pba", |
| 308 | .parent = &hsb_clk, |
| 309 | .mode = hsb_clk_mode, |
| 310 | .get_rate = pba_clk_get_rate, |
| 311 | .index = 1, |
| 312 | }; |
| 313 | static struct clk pbb_clk = { |
| 314 | .name = "pbb", |
| 315 | .parent = &hsb_clk, |
| 316 | .mode = hsb_clk_mode, |
| 317 | .get_rate = pbb_clk_get_rate, |
| 318 | .users = 1, |
| 319 | .index = 2, |
| 320 | }; |
| 321 | |
| 322 | /* -------------------------------------------------------------------- |
| 323 | * Generic Clock operations |
| 324 | * -------------------------------------------------------------------- */ |
| 325 | |
| 326 | static void genclk_mode(struct clk *clk, int enabled) |
| 327 | { |
| 328 | u32 control; |
| 329 | |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 330 | control = sm_readl(&system_manager, PM_GCCTRL + 4 * clk->index); |
| 331 | if (enabled) |
| 332 | control |= SM_BIT(CEN); |
| 333 | else |
| 334 | control &= ~SM_BIT(CEN); |
| 335 | sm_writel(&system_manager, PM_GCCTRL + 4 * clk->index, control); |
| 336 | } |
| 337 | |
| 338 | static unsigned long genclk_get_rate(struct clk *clk) |
| 339 | { |
| 340 | u32 control; |
| 341 | unsigned long div = 1; |
| 342 | |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 343 | control = sm_readl(&system_manager, PM_GCCTRL + 4 * clk->index); |
| 344 | if (control & SM_BIT(DIVEN)) |
| 345 | div = 2 * (SM_BFEXT(DIV, control) + 1); |
| 346 | |
| 347 | return clk->parent->get_rate(clk->parent) / div; |
| 348 | } |
| 349 | |
| 350 | static long genclk_set_rate(struct clk *clk, unsigned long rate, int apply) |
| 351 | { |
| 352 | u32 control; |
| 353 | unsigned long parent_rate, actual_rate, div; |
| 354 | |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 355 | parent_rate = clk->parent->get_rate(clk->parent); |
| 356 | control = sm_readl(&system_manager, PM_GCCTRL + 4 * clk->index); |
| 357 | |
| 358 | if (rate > 3 * parent_rate / 4) { |
| 359 | actual_rate = parent_rate; |
| 360 | control &= ~SM_BIT(DIVEN); |
| 361 | } else { |
| 362 | div = (parent_rate + rate) / (2 * rate) - 1; |
| 363 | control = SM_BFINS(DIV, div, control) | SM_BIT(DIVEN); |
| 364 | actual_rate = parent_rate / (2 * (div + 1)); |
| 365 | } |
| 366 | |
| 367 | printk("clk %s: new rate %lu (actual rate %lu)\n", |
| 368 | clk->name, rate, actual_rate); |
| 369 | |
| 370 | if (apply) |
| 371 | sm_writel(&system_manager, PM_GCCTRL + 4 * clk->index, |
| 372 | control); |
| 373 | |
| 374 | return actual_rate; |
| 375 | } |
| 376 | |
| 377 | int genclk_set_parent(struct clk *clk, struct clk *parent) |
| 378 | { |
| 379 | u32 control; |
| 380 | |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 381 | printk("clk %s: new parent %s (was %s)\n", |
Haavard Skinnemoen | 7a5fe23 | 2007-02-16 13:14:33 +0100 | [diff] [blame] | 382 | clk->name, parent->name, clk->parent->name); |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 383 | |
| 384 | control = sm_readl(&system_manager, PM_GCCTRL + 4 * clk->index); |
| 385 | |
| 386 | if (parent == &osc1 || parent == &pll1) |
| 387 | control |= SM_BIT(OSCSEL); |
| 388 | else if (parent == &osc0 || parent == &pll0) |
| 389 | control &= ~SM_BIT(OSCSEL); |
| 390 | else |
| 391 | return -EINVAL; |
| 392 | |
| 393 | if (parent == &pll0 || parent == &pll1) |
| 394 | control |= SM_BIT(PLLSEL); |
| 395 | else |
| 396 | control &= ~SM_BIT(PLLSEL); |
| 397 | |
| 398 | sm_writel(&system_manager, PM_GCCTRL + 4 * clk->index, control); |
| 399 | clk->parent = parent; |
| 400 | |
| 401 | return 0; |
| 402 | } |
| 403 | |
Haavard Skinnemoen | 7a5fe23 | 2007-02-16 13:14:33 +0100 | [diff] [blame] | 404 | static void __init genclk_init_parent(struct clk *clk) |
| 405 | { |
| 406 | u32 control; |
| 407 | struct clk *parent; |
| 408 | |
| 409 | BUG_ON(clk->index > 7); |
| 410 | |
| 411 | control = sm_readl(&system_manager, PM_GCCTRL + 4 * clk->index); |
| 412 | if (control & SM_BIT(OSCSEL)) |
| 413 | parent = (control & SM_BIT(PLLSEL)) ? &pll1 : &osc1; |
| 414 | else |
| 415 | parent = (control & SM_BIT(PLLSEL)) ? &pll0 : &osc0; |
| 416 | |
| 417 | clk->parent = parent; |
| 418 | } |
| 419 | |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 420 | /* -------------------------------------------------------------------- |
| 421 | * System peripherals |
| 422 | * -------------------------------------------------------------------- */ |
| 423 | static struct resource sm_resource[] = { |
| 424 | PBMEM(0xfff00000), |
| 425 | NAMED_IRQ(19, "eim"), |
| 426 | NAMED_IRQ(20, "pm"), |
| 427 | NAMED_IRQ(21, "rtc"), |
| 428 | }; |
| 429 | struct platform_device at32_sm_device = { |
| 430 | .name = "sm", |
| 431 | .id = 0, |
| 432 | .resource = sm_resource, |
| 433 | .num_resources = ARRAY_SIZE(sm_resource), |
| 434 | }; |
Haavard Skinnemoen | 188ff65 | 2007-03-14 13:23:44 +0100 | [diff] [blame] | 435 | static struct clk at32_sm_pclk = { |
| 436 | .name = "pclk", |
| 437 | .dev = &at32_sm_device.dev, |
| 438 | .parent = &pbb_clk, |
| 439 | .mode = pbb_clk_mode, |
| 440 | .get_rate = pbb_clk_get_rate, |
| 441 | .users = 1, |
| 442 | .index = 0, |
| 443 | }; |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 444 | |
| 445 | static struct resource intc0_resource[] = { |
| 446 | PBMEM(0xfff00400), |
| 447 | }; |
| 448 | struct platform_device at32_intc0_device = { |
| 449 | .name = "intc", |
| 450 | .id = 0, |
| 451 | .resource = intc0_resource, |
| 452 | .num_resources = ARRAY_SIZE(intc0_resource), |
| 453 | }; |
| 454 | DEV_CLK(pclk, at32_intc0, pbb, 1); |
| 455 | |
| 456 | static struct clk ebi_clk = { |
| 457 | .name = "ebi", |
| 458 | .parent = &hsb_clk, |
| 459 | .mode = hsb_clk_mode, |
| 460 | .get_rate = hsb_clk_get_rate, |
| 461 | .users = 1, |
| 462 | }; |
| 463 | static struct clk hramc_clk = { |
| 464 | .name = "hramc", |
| 465 | .parent = &hsb_clk, |
| 466 | .mode = hsb_clk_mode, |
| 467 | .get_rate = hsb_clk_get_rate, |
| 468 | .users = 1, |
Haavard Skinnemoen | 188ff65 | 2007-03-14 13:23:44 +0100 | [diff] [blame] | 469 | .index = 3, |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 470 | }; |
| 471 | |
Haavard Skinnemoen | bc157b7 | 2006-09-25 23:32:16 -0700 | [diff] [blame] | 472 | static struct resource smc0_resource[] = { |
| 473 | PBMEM(0xfff03400), |
| 474 | }; |
| 475 | DEFINE_DEV(smc, 0); |
| 476 | DEV_CLK(pclk, smc0, pbb, 13); |
| 477 | DEV_CLK(mck, smc0, hsb, 0); |
| 478 | |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 479 | static struct platform_device pdc_device = { |
| 480 | .name = "pdc", |
| 481 | .id = 0, |
| 482 | }; |
| 483 | DEV_CLK(hclk, pdc, hsb, 4); |
| 484 | DEV_CLK(pclk, pdc, pba, 16); |
| 485 | |
| 486 | static struct clk pico_clk = { |
| 487 | .name = "pico", |
| 488 | .parent = &cpu_clk, |
| 489 | .mode = cpu_clk_mode, |
| 490 | .get_rate = cpu_clk_get_rate, |
| 491 | .users = 1, |
| 492 | }; |
| 493 | |
| 494 | /* -------------------------------------------------------------------- |
Haavard Skinnemoen | 9c8f8e7 | 2007-02-01 16:34:10 +0100 | [diff] [blame] | 495 | * HMATRIX |
| 496 | * -------------------------------------------------------------------- */ |
| 497 | |
| 498 | static struct clk hmatrix_clk = { |
| 499 | .name = "hmatrix_clk", |
| 500 | .parent = &pbb_clk, |
| 501 | .mode = pbb_clk_mode, |
| 502 | .get_rate = pbb_clk_get_rate, |
| 503 | .index = 2, |
| 504 | .users = 1, |
| 505 | }; |
| 506 | #define HMATRIX_BASE ((void __iomem *)0xfff00800) |
| 507 | |
| 508 | #define hmatrix_readl(reg) \ |
| 509 | __raw_readl((HMATRIX_BASE) + HMATRIX_##reg) |
| 510 | #define hmatrix_writel(reg,value) \ |
| 511 | __raw_writel((value), (HMATRIX_BASE) + HMATRIX_##reg) |
| 512 | |
| 513 | /* |
| 514 | * Set bits in the HMATRIX Special Function Register (SFR) used by the |
| 515 | * External Bus Interface (EBI). This can be used to enable special |
| 516 | * features like CompactFlash support, NAND Flash support, etc. on |
| 517 | * certain chipselects. |
| 518 | */ |
| 519 | static inline void set_ebi_sfr_bits(u32 mask) |
| 520 | { |
| 521 | u32 sfr; |
| 522 | |
| 523 | clk_enable(&hmatrix_clk); |
| 524 | sfr = hmatrix_readl(SFR4); |
| 525 | sfr |= mask; |
| 526 | hmatrix_writel(SFR4, sfr); |
| 527 | clk_disable(&hmatrix_clk); |
| 528 | } |
| 529 | |
| 530 | /* -------------------------------------------------------------------- |
Hans-Christian Egtvedt | 7760989 | 2007-03-12 18:15:16 +0100 | [diff] [blame] | 531 | * System Timer/Counter (TC) |
| 532 | * -------------------------------------------------------------------- */ |
| 533 | static struct resource at32_systc0_resource[] = { |
| 534 | PBMEM(0xfff00c00), |
| 535 | IRQ(22), |
| 536 | }; |
| 537 | struct platform_device at32_systc0_device = { |
| 538 | .name = "systc", |
| 539 | .id = 0, |
| 540 | .resource = at32_systc0_resource, |
| 541 | .num_resources = ARRAY_SIZE(at32_systc0_resource), |
| 542 | }; |
| 543 | DEV_CLK(pclk, at32_systc0, pbb, 3); |
| 544 | |
| 545 | /* -------------------------------------------------------------------- |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 546 | * PIO |
| 547 | * -------------------------------------------------------------------- */ |
| 548 | |
| 549 | static struct resource pio0_resource[] = { |
| 550 | PBMEM(0xffe02800), |
| 551 | IRQ(13), |
| 552 | }; |
| 553 | DEFINE_DEV(pio, 0); |
| 554 | DEV_CLK(mck, pio0, pba, 10); |
| 555 | |
| 556 | static struct resource pio1_resource[] = { |
| 557 | PBMEM(0xffe02c00), |
| 558 | IRQ(14), |
| 559 | }; |
| 560 | DEFINE_DEV(pio, 1); |
| 561 | DEV_CLK(mck, pio1, pba, 11); |
| 562 | |
| 563 | static struct resource pio2_resource[] = { |
| 564 | PBMEM(0xffe03000), |
| 565 | IRQ(15), |
| 566 | }; |
| 567 | DEFINE_DEV(pio, 2); |
| 568 | DEV_CLK(mck, pio2, pba, 12); |
| 569 | |
| 570 | static struct resource pio3_resource[] = { |
| 571 | PBMEM(0xffe03400), |
| 572 | IRQ(16), |
| 573 | }; |
| 574 | DEFINE_DEV(pio, 3); |
| 575 | DEV_CLK(mck, pio3, pba, 13); |
| 576 | |
Haavard Skinnemoen | 7f9f467 | 2007-01-30 11:16:16 +0100 | [diff] [blame] | 577 | static struct resource pio4_resource[] = { |
| 578 | PBMEM(0xffe03800), |
| 579 | IRQ(17), |
| 580 | }; |
| 581 | DEFINE_DEV(pio, 4); |
| 582 | DEV_CLK(mck, pio4, pba, 14); |
| 583 | |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 584 | void __init at32_add_system_devices(void) |
| 585 | { |
Haavard Skinnemoen | 6a4e522 | 2007-02-05 16:57:13 +0100 | [diff] [blame] | 586 | system_manager.eim_first_irq = EIM_IRQ_BASE; |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 587 | |
| 588 | platform_device_register(&at32_sm_device); |
| 589 | platform_device_register(&at32_intc0_device); |
Haavard Skinnemoen | bc157b7 | 2006-09-25 23:32:16 -0700 | [diff] [blame] | 590 | platform_device_register(&smc0_device); |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 591 | platform_device_register(&pdc_device); |
| 592 | |
Hans-Christian Egtvedt | 7760989 | 2007-03-12 18:15:16 +0100 | [diff] [blame] | 593 | platform_device_register(&at32_systc0_device); |
| 594 | |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 595 | platform_device_register(&pio0_device); |
| 596 | platform_device_register(&pio1_device); |
| 597 | platform_device_register(&pio2_device); |
| 598 | platform_device_register(&pio3_device); |
Haavard Skinnemoen | 7f9f467 | 2007-01-30 11:16:16 +0100 | [diff] [blame] | 599 | platform_device_register(&pio4_device); |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 600 | } |
| 601 | |
| 602 | /* -------------------------------------------------------------------- |
| 603 | * USART |
| 604 | * -------------------------------------------------------------------- */ |
| 605 | |
Haavard Skinnemoen | 75d3521 | 2006-10-04 16:02:08 +0200 | [diff] [blame] | 606 | static struct atmel_uart_data atmel_usart0_data = { |
| 607 | .use_dma_tx = 1, |
| 608 | .use_dma_rx = 1, |
| 609 | }; |
Haavard Skinnemoen | 1e8ea80 | 2006-10-04 16:02:03 +0200 | [diff] [blame] | 610 | static struct resource atmel_usart0_resource[] = { |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 611 | PBMEM(0xffe00c00), |
David Brownell | a3d912c | 2007-01-23 20:14:02 -0800 | [diff] [blame] | 612 | IRQ(6), |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 613 | }; |
Haavard Skinnemoen | 75d3521 | 2006-10-04 16:02:08 +0200 | [diff] [blame] | 614 | DEFINE_DEV_DATA(atmel_usart, 0); |
Haavard Skinnemoen | 1e8ea80 | 2006-10-04 16:02:03 +0200 | [diff] [blame] | 615 | DEV_CLK(usart, atmel_usart0, pba, 4); |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 616 | |
Haavard Skinnemoen | 75d3521 | 2006-10-04 16:02:08 +0200 | [diff] [blame] | 617 | static struct atmel_uart_data atmel_usart1_data = { |
| 618 | .use_dma_tx = 1, |
| 619 | .use_dma_rx = 1, |
| 620 | }; |
Haavard Skinnemoen | 1e8ea80 | 2006-10-04 16:02:03 +0200 | [diff] [blame] | 621 | static struct resource atmel_usart1_resource[] = { |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 622 | PBMEM(0xffe01000), |
| 623 | IRQ(7), |
| 624 | }; |
Haavard Skinnemoen | 75d3521 | 2006-10-04 16:02:08 +0200 | [diff] [blame] | 625 | DEFINE_DEV_DATA(atmel_usart, 1); |
Haavard Skinnemoen | 1e8ea80 | 2006-10-04 16:02:03 +0200 | [diff] [blame] | 626 | DEV_CLK(usart, atmel_usart1, pba, 4); |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 627 | |
Haavard Skinnemoen | 75d3521 | 2006-10-04 16:02:08 +0200 | [diff] [blame] | 628 | static struct atmel_uart_data atmel_usart2_data = { |
| 629 | .use_dma_tx = 1, |
| 630 | .use_dma_rx = 1, |
| 631 | }; |
Haavard Skinnemoen | 1e8ea80 | 2006-10-04 16:02:03 +0200 | [diff] [blame] | 632 | static struct resource atmel_usart2_resource[] = { |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 633 | PBMEM(0xffe01400), |
| 634 | IRQ(8), |
| 635 | }; |
Haavard Skinnemoen | 75d3521 | 2006-10-04 16:02:08 +0200 | [diff] [blame] | 636 | DEFINE_DEV_DATA(atmel_usart, 2); |
Haavard Skinnemoen | 1e8ea80 | 2006-10-04 16:02:03 +0200 | [diff] [blame] | 637 | DEV_CLK(usart, atmel_usart2, pba, 5); |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 638 | |
Haavard Skinnemoen | 75d3521 | 2006-10-04 16:02:08 +0200 | [diff] [blame] | 639 | static struct atmel_uart_data atmel_usart3_data = { |
| 640 | .use_dma_tx = 1, |
| 641 | .use_dma_rx = 1, |
| 642 | }; |
Haavard Skinnemoen | 1e8ea80 | 2006-10-04 16:02:03 +0200 | [diff] [blame] | 643 | static struct resource atmel_usart3_resource[] = { |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 644 | PBMEM(0xffe01800), |
| 645 | IRQ(9), |
| 646 | }; |
Haavard Skinnemoen | 75d3521 | 2006-10-04 16:02:08 +0200 | [diff] [blame] | 647 | DEFINE_DEV_DATA(atmel_usart, 3); |
Haavard Skinnemoen | 1e8ea80 | 2006-10-04 16:02:03 +0200 | [diff] [blame] | 648 | DEV_CLK(usart, atmel_usart3, pba, 6); |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 649 | |
| 650 | static inline void configure_usart0_pins(void) |
| 651 | { |
Haavard Skinnemoen | c3e2a79 | 2006-12-04 13:46:52 +0100 | [diff] [blame] | 652 | select_peripheral(PA(8), PERIPH_B, 0); /* RXD */ |
| 653 | select_peripheral(PA(9), PERIPH_B, 0); /* TXD */ |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 654 | } |
| 655 | |
| 656 | static inline void configure_usart1_pins(void) |
| 657 | { |
Haavard Skinnemoen | c3e2a79 | 2006-12-04 13:46:52 +0100 | [diff] [blame] | 658 | select_peripheral(PA(17), PERIPH_A, 0); /* RXD */ |
| 659 | select_peripheral(PA(18), PERIPH_A, 0); /* TXD */ |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 660 | } |
| 661 | |
| 662 | static inline void configure_usart2_pins(void) |
| 663 | { |
Haavard Skinnemoen | c3e2a79 | 2006-12-04 13:46:52 +0100 | [diff] [blame] | 664 | select_peripheral(PB(26), PERIPH_B, 0); /* RXD */ |
| 665 | select_peripheral(PB(27), PERIPH_B, 0); /* TXD */ |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 666 | } |
| 667 | |
| 668 | static inline void configure_usart3_pins(void) |
| 669 | { |
Haavard Skinnemoen | c3e2a79 | 2006-12-04 13:46:52 +0100 | [diff] [blame] | 670 | select_peripheral(PB(18), PERIPH_B, 0); /* RXD */ |
| 671 | select_peripheral(PB(17), PERIPH_B, 0); /* TXD */ |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 672 | } |
| 673 | |
David Brownell | a3d912c | 2007-01-23 20:14:02 -0800 | [diff] [blame] | 674 | static struct platform_device *__initdata at32_usarts[4]; |
Haavard Skinnemoen | c194588 | 2006-10-04 16:02:10 +0200 | [diff] [blame] | 675 | |
| 676 | void __init at32_map_usart(unsigned int hw_id, unsigned int line) |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 677 | { |
| 678 | struct platform_device *pdev; |
| 679 | |
Haavard Skinnemoen | c194588 | 2006-10-04 16:02:10 +0200 | [diff] [blame] | 680 | switch (hw_id) { |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 681 | case 0: |
Haavard Skinnemoen | 1e8ea80 | 2006-10-04 16:02:03 +0200 | [diff] [blame] | 682 | pdev = &atmel_usart0_device; |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 683 | configure_usart0_pins(); |
| 684 | break; |
| 685 | case 1: |
Haavard Skinnemoen | 1e8ea80 | 2006-10-04 16:02:03 +0200 | [diff] [blame] | 686 | pdev = &atmel_usart1_device; |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 687 | configure_usart1_pins(); |
| 688 | break; |
| 689 | case 2: |
Haavard Skinnemoen | 1e8ea80 | 2006-10-04 16:02:03 +0200 | [diff] [blame] | 690 | pdev = &atmel_usart2_device; |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 691 | configure_usart2_pins(); |
| 692 | break; |
| 693 | case 3: |
Haavard Skinnemoen | 1e8ea80 | 2006-10-04 16:02:03 +0200 | [diff] [blame] | 694 | pdev = &atmel_usart3_device; |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 695 | configure_usart3_pins(); |
| 696 | break; |
| 697 | default: |
Haavard Skinnemoen | c194588 | 2006-10-04 16:02:10 +0200 | [diff] [blame] | 698 | return; |
Haavard Skinnemoen | 75d3521 | 2006-10-04 16:02:08 +0200 | [diff] [blame] | 699 | } |
| 700 | |
| 701 | if (PXSEG(pdev->resource[0].start) == P4SEG) { |
| 702 | /* Addresses in the P4 segment are permanently mapped 1:1 */ |
| 703 | struct atmel_uart_data *data = pdev->dev.platform_data; |
| 704 | data->regs = (void __iomem *)pdev->resource[0].start; |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 705 | } |
| 706 | |
Haavard Skinnemoen | c194588 | 2006-10-04 16:02:10 +0200 | [diff] [blame] | 707 | pdev->id = line; |
| 708 | at32_usarts[line] = pdev; |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 709 | } |
| 710 | |
| 711 | struct platform_device *__init at32_add_device_usart(unsigned int id) |
| 712 | { |
Haavard Skinnemoen | c194588 | 2006-10-04 16:02:10 +0200 | [diff] [blame] | 713 | platform_device_register(at32_usarts[id]); |
| 714 | return at32_usarts[id]; |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 715 | } |
| 716 | |
Haavard Skinnemoen | 73e2798 | 2006-10-04 16:02:04 +0200 | [diff] [blame] | 717 | struct platform_device *atmel_default_console_device; |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 718 | |
| 719 | void __init at32_setup_serial_console(unsigned int usart_id) |
| 720 | { |
Haavard Skinnemoen | c194588 | 2006-10-04 16:02:10 +0200 | [diff] [blame] | 721 | atmel_default_console_device = at32_usarts[usart_id]; |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 722 | } |
| 723 | |
| 724 | /* -------------------------------------------------------------------- |
| 725 | * Ethernet |
| 726 | * -------------------------------------------------------------------- */ |
| 727 | |
| 728 | static struct eth_platform_data macb0_data; |
| 729 | static struct resource macb0_resource[] = { |
| 730 | PBMEM(0xfff01800), |
| 731 | IRQ(25), |
| 732 | }; |
| 733 | DEFINE_DEV_DATA(macb, 0); |
| 734 | DEV_CLK(hclk, macb0, hsb, 8); |
| 735 | DEV_CLK(pclk, macb0, pbb, 6); |
| 736 | |
Haavard Skinnemoen | cfcb3a8 | 2006-10-30 09:23:12 +0100 | [diff] [blame] | 737 | static struct eth_platform_data macb1_data; |
| 738 | static struct resource macb1_resource[] = { |
| 739 | PBMEM(0xfff01c00), |
| 740 | IRQ(26), |
| 741 | }; |
| 742 | DEFINE_DEV_DATA(macb, 1); |
| 743 | DEV_CLK(hclk, macb1, hsb, 9); |
| 744 | DEV_CLK(pclk, macb1, pbb, 7); |
| 745 | |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 746 | struct platform_device *__init |
| 747 | at32_add_device_eth(unsigned int id, struct eth_platform_data *data) |
| 748 | { |
| 749 | struct platform_device *pdev; |
| 750 | |
| 751 | switch (id) { |
| 752 | case 0: |
| 753 | pdev = &macb0_device; |
| 754 | |
Haavard Skinnemoen | c3e2a79 | 2006-12-04 13:46:52 +0100 | [diff] [blame] | 755 | select_peripheral(PC(3), PERIPH_A, 0); /* TXD0 */ |
| 756 | select_peripheral(PC(4), PERIPH_A, 0); /* TXD1 */ |
| 757 | select_peripheral(PC(7), PERIPH_A, 0); /* TXEN */ |
| 758 | select_peripheral(PC(8), PERIPH_A, 0); /* TXCK */ |
| 759 | select_peripheral(PC(9), PERIPH_A, 0); /* RXD0 */ |
| 760 | select_peripheral(PC(10), PERIPH_A, 0); /* RXD1 */ |
| 761 | select_peripheral(PC(13), PERIPH_A, 0); /* RXER */ |
| 762 | select_peripheral(PC(15), PERIPH_A, 0); /* RXDV */ |
| 763 | select_peripheral(PC(16), PERIPH_A, 0); /* MDC */ |
| 764 | select_peripheral(PC(17), PERIPH_A, 0); /* MDIO */ |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 765 | |
| 766 | if (!data->is_rmii) { |
Haavard Skinnemoen | c3e2a79 | 2006-12-04 13:46:52 +0100 | [diff] [blame] | 767 | select_peripheral(PC(0), PERIPH_A, 0); /* COL */ |
| 768 | select_peripheral(PC(1), PERIPH_A, 0); /* CRS */ |
| 769 | select_peripheral(PC(2), PERIPH_A, 0); /* TXER */ |
| 770 | select_peripheral(PC(5), PERIPH_A, 0); /* TXD2 */ |
| 771 | select_peripheral(PC(6), PERIPH_A, 0); /* TXD3 */ |
| 772 | select_peripheral(PC(11), PERIPH_A, 0); /* RXD2 */ |
| 773 | select_peripheral(PC(12), PERIPH_A, 0); /* RXD3 */ |
| 774 | select_peripheral(PC(14), PERIPH_A, 0); /* RXCK */ |
| 775 | select_peripheral(PC(18), PERIPH_A, 0); /* SPD */ |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 776 | } |
| 777 | break; |
| 778 | |
Haavard Skinnemoen | cfcb3a8 | 2006-10-30 09:23:12 +0100 | [diff] [blame] | 779 | case 1: |
| 780 | pdev = &macb1_device; |
| 781 | |
| 782 | select_peripheral(PD(13), PERIPH_B, 0); /* TXD0 */ |
| 783 | select_peripheral(PD(14), PERIPH_B, 0); /* TXD1 */ |
| 784 | select_peripheral(PD(11), PERIPH_B, 0); /* TXEN */ |
| 785 | select_peripheral(PD(12), PERIPH_B, 0); /* TXCK */ |
| 786 | select_peripheral(PD(10), PERIPH_B, 0); /* RXD0 */ |
| 787 | select_peripheral(PD(6), PERIPH_B, 0); /* RXD1 */ |
| 788 | select_peripheral(PD(5), PERIPH_B, 0); /* RXER */ |
| 789 | select_peripheral(PD(4), PERIPH_B, 0); /* RXDV */ |
| 790 | select_peripheral(PD(3), PERIPH_B, 0); /* MDC */ |
| 791 | select_peripheral(PD(2), PERIPH_B, 0); /* MDIO */ |
| 792 | |
| 793 | if (!data->is_rmii) { |
| 794 | select_peripheral(PC(19), PERIPH_B, 0); /* COL */ |
| 795 | select_peripheral(PC(23), PERIPH_B, 0); /* CRS */ |
| 796 | select_peripheral(PC(26), PERIPH_B, 0); /* TXER */ |
| 797 | select_peripheral(PC(27), PERIPH_B, 0); /* TXD2 */ |
| 798 | select_peripheral(PC(28), PERIPH_B, 0); /* TXD3 */ |
| 799 | select_peripheral(PC(29), PERIPH_B, 0); /* RXD2 */ |
| 800 | select_peripheral(PC(30), PERIPH_B, 0); /* RXD3 */ |
| 801 | select_peripheral(PC(24), PERIPH_B, 0); /* RXCK */ |
| 802 | select_peripheral(PD(15), PERIPH_B, 0); /* SPD */ |
| 803 | } |
| 804 | break; |
| 805 | |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 806 | default: |
| 807 | return NULL; |
| 808 | } |
| 809 | |
| 810 | memcpy(pdev->dev.platform_data, data, sizeof(struct eth_platform_data)); |
| 811 | platform_device_register(pdev); |
| 812 | |
| 813 | return pdev; |
| 814 | } |
| 815 | |
| 816 | /* -------------------------------------------------------------------- |
| 817 | * SPI |
| 818 | * -------------------------------------------------------------------- */ |
Haavard Skinnemoen | 3d60ee1 | 2007-01-10 20:20:02 +0100 | [diff] [blame] | 819 | static struct resource atmel_spi0_resource[] = { |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 820 | PBMEM(0xffe00000), |
| 821 | IRQ(3), |
| 822 | }; |
Haavard Skinnemoen | 3d60ee1 | 2007-01-10 20:20:02 +0100 | [diff] [blame] | 823 | DEFINE_DEV(atmel_spi, 0); |
| 824 | DEV_CLK(spi_clk, atmel_spi0, pba, 0); |
| 825 | |
| 826 | static struct resource atmel_spi1_resource[] = { |
| 827 | PBMEM(0xffe00400), |
| 828 | IRQ(4), |
| 829 | }; |
| 830 | DEFINE_DEV(atmel_spi, 1); |
| 831 | DEV_CLK(spi_clk, atmel_spi1, pba, 1); |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 832 | |
Haavard Skinnemoen | 9a596a6 | 2007-02-19 10:38:04 +0100 | [diff] [blame] | 833 | static void __init |
Haavard Skinnemoen | 41d8ca4 | 2007-02-16 13:56:11 +0100 | [diff] [blame] | 834 | at32_spi_setup_slaves(unsigned int bus_num, struct spi_board_info *b, |
| 835 | unsigned int n, const u8 *pins) |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 836 | { |
Haavard Skinnemoen | 41d8ca4 | 2007-02-16 13:56:11 +0100 | [diff] [blame] | 837 | unsigned int pin, mode; |
| 838 | |
| 839 | for (; n; n--, b++) { |
| 840 | b->bus_num = bus_num; |
| 841 | if (b->chip_select >= 4) |
| 842 | continue; |
| 843 | pin = (unsigned)b->controller_data; |
| 844 | if (!pin) { |
| 845 | pin = pins[b->chip_select]; |
| 846 | b->controller_data = (void *)pin; |
| 847 | } |
| 848 | mode = AT32_GPIOF_OUTPUT; |
| 849 | if (!(b->mode & SPI_CS_HIGH)) |
| 850 | mode |= AT32_GPIOF_HIGH; |
| 851 | at32_select_gpio(pin, mode); |
| 852 | } |
| 853 | } |
| 854 | |
| 855 | struct platform_device *__init |
| 856 | at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n) |
| 857 | { |
| 858 | /* |
| 859 | * Manage the chipselects as GPIOs, normally using the same pins |
| 860 | * the SPI controller expects; but boards can use other pins. |
| 861 | */ |
| 862 | static u8 __initdata spi0_pins[] = |
| 863 | { GPIO_PIN_PA(3), GPIO_PIN_PA(4), |
| 864 | GPIO_PIN_PA(5), GPIO_PIN_PA(20), }; |
| 865 | static u8 __initdata spi1_pins[] = |
| 866 | { GPIO_PIN_PB(2), GPIO_PIN_PB(3), |
| 867 | GPIO_PIN_PB(4), GPIO_PIN_PA(27), }; |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 868 | struct platform_device *pdev; |
| 869 | |
| 870 | switch (id) { |
| 871 | case 0: |
Haavard Skinnemoen | 3d60ee1 | 2007-01-10 20:20:02 +0100 | [diff] [blame] | 872 | pdev = &atmel_spi0_device; |
Haavard Skinnemoen | c3e2a79 | 2006-12-04 13:46:52 +0100 | [diff] [blame] | 873 | select_peripheral(PA(0), PERIPH_A, 0); /* MISO */ |
| 874 | select_peripheral(PA(1), PERIPH_A, 0); /* MOSI */ |
| 875 | select_peripheral(PA(2), PERIPH_A, 0); /* SCK */ |
Haavard Skinnemoen | 41d8ca4 | 2007-02-16 13:56:11 +0100 | [diff] [blame] | 876 | at32_spi_setup_slaves(0, b, n, spi0_pins); |
Haavard Skinnemoen | 3d60ee1 | 2007-01-10 20:20:02 +0100 | [diff] [blame] | 877 | break; |
| 878 | |
| 879 | case 1: |
| 880 | pdev = &atmel_spi1_device; |
| 881 | select_peripheral(PB(0), PERIPH_B, 0); /* MISO */ |
| 882 | select_peripheral(PB(1), PERIPH_B, 0); /* MOSI */ |
| 883 | select_peripheral(PB(5), PERIPH_B, 0); /* SCK */ |
Haavard Skinnemoen | 41d8ca4 | 2007-02-16 13:56:11 +0100 | [diff] [blame] | 884 | at32_spi_setup_slaves(1, b, n, spi1_pins); |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 885 | break; |
| 886 | |
| 887 | default: |
| 888 | return NULL; |
| 889 | } |
| 890 | |
Haavard Skinnemoen | 41d8ca4 | 2007-02-16 13:56:11 +0100 | [diff] [blame] | 891 | spi_register_board_info(b, n); |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 892 | platform_device_register(pdev); |
| 893 | return pdev; |
| 894 | } |
| 895 | |
| 896 | /* -------------------------------------------------------------------- |
| 897 | * LCDC |
| 898 | * -------------------------------------------------------------------- */ |
Haavard Skinnemoen | d0a2b7a | 2007-03-21 18:08:49 +0100 | [diff] [blame] | 899 | static struct atmel_lcdfb_info atmel_lcdfb0_data; |
| 900 | static struct resource atmel_lcdfb0_resource[] = { |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 901 | { |
| 902 | .start = 0xff000000, |
| 903 | .end = 0xff000fff, |
| 904 | .flags = IORESOURCE_MEM, |
| 905 | }, |
| 906 | IRQ(1), |
Haavard Skinnemoen | d0a2b7a | 2007-03-21 18:08:49 +0100 | [diff] [blame] | 907 | { |
| 908 | /* Placeholder for pre-allocated fb memory */ |
| 909 | .start = 0x00000000, |
| 910 | .end = 0x00000000, |
| 911 | .flags = 0, |
| 912 | }, |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 913 | }; |
Haavard Skinnemoen | d0a2b7a | 2007-03-21 18:08:49 +0100 | [diff] [blame] | 914 | DEFINE_DEV_DATA(atmel_lcdfb, 0); |
| 915 | DEV_CLK(hck1, atmel_lcdfb0, hsb, 7); |
| 916 | static struct clk atmel_lcdfb0_pixclk = { |
| 917 | .name = "lcdc_clk", |
| 918 | .dev = &atmel_lcdfb0_device.dev, |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 919 | .mode = genclk_mode, |
| 920 | .get_rate = genclk_get_rate, |
| 921 | .set_rate = genclk_set_rate, |
| 922 | .set_parent = genclk_set_parent, |
| 923 | .index = 7, |
| 924 | }; |
| 925 | |
| 926 | struct platform_device *__init |
Haavard Skinnemoen | d0a2b7a | 2007-03-21 18:08:49 +0100 | [diff] [blame] | 927 | at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data, |
| 928 | unsigned long fbmem_start, unsigned long fbmem_len) |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 929 | { |
| 930 | struct platform_device *pdev; |
Haavard Skinnemoen | d0a2b7a | 2007-03-21 18:08:49 +0100 | [diff] [blame] | 931 | struct atmel_lcdfb_info *info; |
| 932 | struct fb_monspecs *monspecs; |
| 933 | struct fb_videomode *modedb; |
| 934 | unsigned int modedb_size; |
| 935 | |
| 936 | /* |
| 937 | * Do a deep copy of the fb data, monspecs and modedb. Make |
| 938 | * sure all allocations are done before setting up the |
| 939 | * portmux. |
| 940 | */ |
| 941 | monspecs = kmemdup(data->default_monspecs, |
| 942 | sizeof(struct fb_monspecs), GFP_KERNEL); |
| 943 | if (!monspecs) |
| 944 | return NULL; |
| 945 | |
| 946 | modedb_size = sizeof(struct fb_videomode) * monspecs->modedb_len; |
| 947 | modedb = kmemdup(monspecs->modedb, modedb_size, GFP_KERNEL); |
| 948 | if (!modedb) |
| 949 | goto err_dup_modedb; |
| 950 | monspecs->modedb = modedb; |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 951 | |
| 952 | switch (id) { |
| 953 | case 0: |
Haavard Skinnemoen | d0a2b7a | 2007-03-21 18:08:49 +0100 | [diff] [blame] | 954 | pdev = &atmel_lcdfb0_device; |
Haavard Skinnemoen | c3e2a79 | 2006-12-04 13:46:52 +0100 | [diff] [blame] | 955 | select_peripheral(PC(19), PERIPH_A, 0); /* CC */ |
| 956 | select_peripheral(PC(20), PERIPH_A, 0); /* HSYNC */ |
| 957 | select_peripheral(PC(21), PERIPH_A, 0); /* PCLK */ |
| 958 | select_peripheral(PC(22), PERIPH_A, 0); /* VSYNC */ |
| 959 | select_peripheral(PC(23), PERIPH_A, 0); /* DVAL */ |
| 960 | select_peripheral(PC(24), PERIPH_A, 0); /* MODE */ |
| 961 | select_peripheral(PC(25), PERIPH_A, 0); /* PWR */ |
| 962 | select_peripheral(PC(26), PERIPH_A, 0); /* DATA0 */ |
| 963 | select_peripheral(PC(27), PERIPH_A, 0); /* DATA1 */ |
| 964 | select_peripheral(PC(28), PERIPH_A, 0); /* DATA2 */ |
| 965 | select_peripheral(PC(29), PERIPH_A, 0); /* DATA3 */ |
| 966 | select_peripheral(PC(30), PERIPH_A, 0); /* DATA4 */ |
| 967 | select_peripheral(PC(31), PERIPH_A, 0); /* DATA5 */ |
| 968 | select_peripheral(PD(0), PERIPH_A, 0); /* DATA6 */ |
| 969 | select_peripheral(PD(1), PERIPH_A, 0); /* DATA7 */ |
| 970 | select_peripheral(PD(2), PERIPH_A, 0); /* DATA8 */ |
| 971 | select_peripheral(PD(3), PERIPH_A, 0); /* DATA9 */ |
| 972 | select_peripheral(PD(4), PERIPH_A, 0); /* DATA10 */ |
| 973 | select_peripheral(PD(5), PERIPH_A, 0); /* DATA11 */ |
| 974 | select_peripheral(PD(6), PERIPH_A, 0); /* DATA12 */ |
| 975 | select_peripheral(PD(7), PERIPH_A, 0); /* DATA13 */ |
| 976 | select_peripheral(PD(8), PERIPH_A, 0); /* DATA14 */ |
| 977 | select_peripheral(PD(9), PERIPH_A, 0); /* DATA15 */ |
| 978 | select_peripheral(PD(10), PERIPH_A, 0); /* DATA16 */ |
| 979 | select_peripheral(PD(11), PERIPH_A, 0); /* DATA17 */ |
| 980 | select_peripheral(PD(12), PERIPH_A, 0); /* DATA18 */ |
| 981 | select_peripheral(PD(13), PERIPH_A, 0); /* DATA19 */ |
| 982 | select_peripheral(PD(14), PERIPH_A, 0); /* DATA20 */ |
| 983 | select_peripheral(PD(15), PERIPH_A, 0); /* DATA21 */ |
| 984 | select_peripheral(PD(16), PERIPH_A, 0); /* DATA22 */ |
| 985 | select_peripheral(PD(17), PERIPH_A, 0); /* DATA23 */ |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 986 | |
Haavard Skinnemoen | d0a2b7a | 2007-03-21 18:08:49 +0100 | [diff] [blame] | 987 | clk_set_parent(&atmel_lcdfb0_pixclk, &pll0); |
| 988 | clk_set_rate(&atmel_lcdfb0_pixclk, clk_get_rate(&pll0)); |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 989 | break; |
| 990 | |
| 991 | default: |
Haavard Skinnemoen | d0a2b7a | 2007-03-21 18:08:49 +0100 | [diff] [blame] | 992 | goto err_invalid_id; |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 993 | } |
| 994 | |
Haavard Skinnemoen | d0a2b7a | 2007-03-21 18:08:49 +0100 | [diff] [blame] | 995 | if (fbmem_len) { |
| 996 | pdev->resource[2].start = fbmem_start; |
| 997 | pdev->resource[2].end = fbmem_start + fbmem_len - 1; |
| 998 | pdev->resource[2].flags = IORESOURCE_MEM; |
| 999 | } |
| 1000 | |
| 1001 | info = pdev->dev.platform_data; |
| 1002 | memcpy(info, data, sizeof(struct atmel_lcdfb_info)); |
| 1003 | info->default_monspecs = monspecs; |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 1004 | |
| 1005 | platform_device_register(pdev); |
| 1006 | return pdev; |
Haavard Skinnemoen | d0a2b7a | 2007-03-21 18:08:49 +0100 | [diff] [blame] | 1007 | |
| 1008 | err_invalid_id: |
| 1009 | kfree(modedb); |
| 1010 | err_dup_modedb: |
| 1011 | kfree(monspecs); |
| 1012 | return NULL; |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 1013 | } |
| 1014 | |
Haavard Skinnemoen | 7a5fe23 | 2007-02-16 13:14:33 +0100 | [diff] [blame] | 1015 | /* -------------------------------------------------------------------- |
| 1016 | * GCLK |
| 1017 | * -------------------------------------------------------------------- */ |
| 1018 | static struct clk gclk0 = { |
| 1019 | .name = "gclk0", |
| 1020 | .mode = genclk_mode, |
| 1021 | .get_rate = genclk_get_rate, |
| 1022 | .set_rate = genclk_set_rate, |
| 1023 | .set_parent = genclk_set_parent, |
| 1024 | .index = 0, |
| 1025 | }; |
| 1026 | static struct clk gclk1 = { |
| 1027 | .name = "gclk1", |
| 1028 | .mode = genclk_mode, |
| 1029 | .get_rate = genclk_get_rate, |
| 1030 | .set_rate = genclk_set_rate, |
| 1031 | .set_parent = genclk_set_parent, |
| 1032 | .index = 1, |
| 1033 | }; |
| 1034 | static struct clk gclk2 = { |
| 1035 | .name = "gclk2", |
| 1036 | .mode = genclk_mode, |
| 1037 | .get_rate = genclk_get_rate, |
| 1038 | .set_rate = genclk_set_rate, |
| 1039 | .set_parent = genclk_set_parent, |
| 1040 | .index = 2, |
| 1041 | }; |
| 1042 | static struct clk gclk3 = { |
| 1043 | .name = "gclk3", |
| 1044 | .mode = genclk_mode, |
| 1045 | .get_rate = genclk_get_rate, |
| 1046 | .set_rate = genclk_set_rate, |
| 1047 | .set_parent = genclk_set_parent, |
| 1048 | .index = 3, |
| 1049 | }; |
| 1050 | static struct clk gclk4 = { |
| 1051 | .name = "gclk4", |
| 1052 | .mode = genclk_mode, |
| 1053 | .get_rate = genclk_get_rate, |
| 1054 | .set_rate = genclk_set_rate, |
| 1055 | .set_parent = genclk_set_parent, |
| 1056 | .index = 4, |
| 1057 | }; |
| 1058 | |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 1059 | struct clk *at32_clock_list[] = { |
| 1060 | &osc32k, |
| 1061 | &osc0, |
| 1062 | &osc1, |
| 1063 | &pll0, |
| 1064 | &pll1, |
| 1065 | &cpu_clk, |
| 1066 | &hsb_clk, |
| 1067 | &pba_clk, |
| 1068 | &pbb_clk, |
| 1069 | &at32_sm_pclk, |
| 1070 | &at32_intc0_pclk, |
Haavard Skinnemoen | 9c8f8e7 | 2007-02-01 16:34:10 +0100 | [diff] [blame] | 1071 | &hmatrix_clk, |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 1072 | &ebi_clk, |
| 1073 | &hramc_clk, |
Haavard Skinnemoen | bc157b7 | 2006-09-25 23:32:16 -0700 | [diff] [blame] | 1074 | &smc0_pclk, |
| 1075 | &smc0_mck, |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 1076 | &pdc_hclk, |
| 1077 | &pdc_pclk, |
| 1078 | &pico_clk, |
| 1079 | &pio0_mck, |
| 1080 | &pio1_mck, |
| 1081 | &pio2_mck, |
| 1082 | &pio3_mck, |
Haavard Skinnemoen | 7f9f467 | 2007-01-30 11:16:16 +0100 | [diff] [blame] | 1083 | &pio4_mck, |
Hans-Christian Egtvedt | 7760989 | 2007-03-12 18:15:16 +0100 | [diff] [blame] | 1084 | &at32_systc0_pclk, |
Haavard Skinnemoen | 1e8ea80 | 2006-10-04 16:02:03 +0200 | [diff] [blame] | 1085 | &atmel_usart0_usart, |
| 1086 | &atmel_usart1_usart, |
| 1087 | &atmel_usart2_usart, |
| 1088 | &atmel_usart3_usart, |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 1089 | &macb0_hclk, |
| 1090 | &macb0_pclk, |
Haavard Skinnemoen | cfcb3a8 | 2006-10-30 09:23:12 +0100 | [diff] [blame] | 1091 | &macb1_hclk, |
| 1092 | &macb1_pclk, |
Haavard Skinnemoen | 3d60ee1 | 2007-01-10 20:20:02 +0100 | [diff] [blame] | 1093 | &atmel_spi0_spi_clk, |
| 1094 | &atmel_spi1_spi_clk, |
Haavard Skinnemoen | d0a2b7a | 2007-03-21 18:08:49 +0100 | [diff] [blame] | 1095 | &atmel_lcdfb0_hck1, |
| 1096 | &atmel_lcdfb0_pixclk, |
Haavard Skinnemoen | 7a5fe23 | 2007-02-16 13:14:33 +0100 | [diff] [blame] | 1097 | &gclk0, |
| 1098 | &gclk1, |
| 1099 | &gclk2, |
| 1100 | &gclk3, |
| 1101 | &gclk4, |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 1102 | }; |
| 1103 | unsigned int at32_nr_clocks = ARRAY_SIZE(at32_clock_list); |
| 1104 | |
| 1105 | void __init at32_portmux_init(void) |
| 1106 | { |
| 1107 | at32_init_pio(&pio0_device); |
| 1108 | at32_init_pio(&pio1_device); |
| 1109 | at32_init_pio(&pio2_device); |
| 1110 | at32_init_pio(&pio3_device); |
Haavard Skinnemoen | 7f9f467 | 2007-01-30 11:16:16 +0100 | [diff] [blame] | 1111 | at32_init_pio(&pio4_device); |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 1112 | } |
| 1113 | |
| 1114 | void __init at32_clock_init(void) |
| 1115 | { |
| 1116 | struct at32_sm *sm = &system_manager; |
| 1117 | u32 cpu_mask = 0, hsb_mask = 0, pba_mask = 0, pbb_mask = 0; |
| 1118 | int i; |
| 1119 | |
| 1120 | if (sm_readl(sm, PM_MCCTRL) & SM_BIT(PLLSEL)) |
| 1121 | main_clock = &pll0; |
| 1122 | else |
| 1123 | main_clock = &osc0; |
| 1124 | |
| 1125 | if (sm_readl(sm, PM_PLL0) & SM_BIT(PLLOSC)) |
| 1126 | pll0.parent = &osc1; |
| 1127 | if (sm_readl(sm, PM_PLL1) & SM_BIT(PLLOSC)) |
| 1128 | pll1.parent = &osc1; |
| 1129 | |
Haavard Skinnemoen | 7a5fe23 | 2007-02-16 13:14:33 +0100 | [diff] [blame] | 1130 | genclk_init_parent(&gclk0); |
| 1131 | genclk_init_parent(&gclk1); |
| 1132 | genclk_init_parent(&gclk2); |
| 1133 | genclk_init_parent(&gclk3); |
| 1134 | genclk_init_parent(&gclk4); |
Haavard Skinnemoen | d0a2b7a | 2007-03-21 18:08:49 +0100 | [diff] [blame] | 1135 | genclk_init_parent(&atmel_lcdfb0_pixclk); |
Haavard Skinnemoen | 7a5fe23 | 2007-02-16 13:14:33 +0100 | [diff] [blame] | 1136 | |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 1137 | /* |
| 1138 | * Turn on all clocks that have at least one user already, and |
| 1139 | * turn off everything else. We only do this for module |
| 1140 | * clocks, and even though it isn't particularly pretty to |
| 1141 | * check the address of the mode function, it should do the |
| 1142 | * trick... |
| 1143 | */ |
| 1144 | for (i = 0; i < ARRAY_SIZE(at32_clock_list); i++) { |
| 1145 | struct clk *clk = at32_clock_list[i]; |
| 1146 | |
Haavard Skinnemoen | 188ff65 | 2007-03-14 13:23:44 +0100 | [diff] [blame] | 1147 | if (clk->users == 0) |
| 1148 | continue; |
| 1149 | |
Haavard Skinnemoen | 5f97f7f | 2006-09-25 23:32:13 -0700 | [diff] [blame] | 1150 | if (clk->mode == &cpu_clk_mode) |
| 1151 | cpu_mask |= 1 << clk->index; |
| 1152 | else if (clk->mode == &hsb_clk_mode) |
| 1153 | hsb_mask |= 1 << clk->index; |
| 1154 | else if (clk->mode == &pba_clk_mode) |
| 1155 | pba_mask |= 1 << clk->index; |
| 1156 | else if (clk->mode == &pbb_clk_mode) |
| 1157 | pbb_mask |= 1 << clk->index; |
| 1158 | } |
| 1159 | |
| 1160 | sm_writel(sm, PM_CPU_MASK, cpu_mask); |
| 1161 | sm_writel(sm, PM_HSB_MASK, hsb_mask); |
| 1162 | sm_writel(sm, PM_PBA_MASK, pba_mask); |
| 1163 | sm_writel(sm, PM_PBB_MASK, pbb_mask); |
| 1164 | } |