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Kukjin Kimdc98e412011-09-28 20:48:52 +09001/* linux/arch/arm/plat-samsung/include/plat/irq.h
Ben Dooks7fcc1132005-07-26 19:20:27 +01002 *
3 * Copyright (c) 2004-2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Header file for S3C24XX CPU IRQ support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
Ben Dooks7fcc1132005-07-26 19:20:27 +010011*/
12
Ben Dooks65fa22b2008-12-12 00:24:10 +000013#include <linux/io.h>
14
15#include <mach/hardware.h>
16#include <mach/regs-irq.h>
17#include <mach/regs-gpio.h>
18
Ben Dooks7fcc1132005-07-26 19:20:27 +010019#define irqdbf(x...)
20#define irqdbf2(x...)
21
22#define EXTINT_OFF (IRQ_EINT4 - 4)
23
Ben Dooks0baada22007-12-23 03:09:33 +010024/* these are exported for arch/arm/mach-* usage */
Russell King10dd5ce2006-11-23 11:41:32 +000025extern struct irq_chip s3c_irq_level_chip;
Ben Dooks0baada22007-12-23 03:09:33 +010026extern struct irq_chip s3c_irq_chip;
Ben Dooks7fcc1132005-07-26 19:20:27 +010027
Kukjin Kimdc98e412011-09-28 20:48:52 +090028static inline void s3c_irqsub_mask(unsigned int irqno,
29 unsigned int parentbit,
30 int subcheck)
Ben Dooks7fcc1132005-07-26 19:20:27 +010031{
32 unsigned long mask;
33 unsigned long submask;
34
35 submask = __raw_readl(S3C2410_INTSUBMSK);
36 mask = __raw_readl(S3C2410_INTMSK);
37
38 submask |= (1UL << (irqno - IRQ_S3CUART_RX0));
39
40 /* check to see if we need to mask the parent IRQ */
41
Kukjin Kimdc98e412011-09-28 20:48:52 +090042 if ((submask & subcheck) == subcheck)
Ben Dooks7fcc1132005-07-26 19:20:27 +010043 __raw_writel(mask | parentbit, S3C2410_INTMSK);
Ben Dooks7fcc1132005-07-26 19:20:27 +010044
45 /* write back masks */
46 __raw_writel(submask, S3C2410_INTSUBMSK);
47
48}
49
Kukjin Kimdc98e412011-09-28 20:48:52 +090050static inline void s3c_irqsub_unmask(unsigned int irqno,
51 unsigned int parentbit)
Ben Dooks7fcc1132005-07-26 19:20:27 +010052{
53 unsigned long mask;
54 unsigned long submask;
55
56 submask = __raw_readl(S3C2410_INTSUBMSK);
57 mask = __raw_readl(S3C2410_INTMSK);
58
59 submask &= ~(1UL << (irqno - IRQ_S3CUART_RX0));
60 mask &= ~parentbit;
61
62 /* write back masks */
63 __raw_writel(submask, S3C2410_INTSUBMSK);
64 __raw_writel(mask, S3C2410_INTMSK);
65}
66
67
Kukjin Kimdc98e412011-09-28 20:48:52 +090068static inline void s3c_irqsub_maskack(unsigned int irqno,
69 unsigned int parentmask,
70 unsigned int group)
Ben Dooks7fcc1132005-07-26 19:20:27 +010071{
72 unsigned int bit = 1UL << (irqno - IRQ_S3CUART_RX0);
73
74 s3c_irqsub_mask(irqno, parentmask, group);
75
76 __raw_writel(bit, S3C2410_SUBSRCPND);
77
78 /* only ack parent if we've got all the irqs (seems we must
79 * ack, all and hope that the irq system retriggers ok when
80 * the interrupt goes off again)
81 */
82
83 if (1) {
84 __raw_writel(parentmask, S3C2410_SRCPND);
85 __raw_writel(parentmask, S3C2410_INTPND);
86 }
87}
88
Kukjin Kimdc98e412011-09-28 20:48:52 +090089static inline void s3c_irqsub_ack(unsigned int irqno,
90 unsigned int parentmask,
91 unsigned int group)
Ben Dooks7fcc1132005-07-26 19:20:27 +010092{
93 unsigned int bit = 1UL << (irqno - IRQ_S3CUART_RX0);
94
95 __raw_writel(bit, S3C2410_SUBSRCPND);
96
97 /* only ack parent if we've got all the irqs (seems we must
98 * ack, all and hope that the irq system retriggers ok when
99 * the interrupt goes off again)
100 */
101
102 if (1) {
103 __raw_writel(parentmask, S3C2410_SRCPND);
104 __raw_writel(parentmask, S3C2410_INTPND);
105 }
106}
Ben Dooksc6e58eb2006-09-09 21:24:13 +0100107
108/* exported for use in arch/arm/mach-s3c2410 */
109
Ben Dooksa9c36852006-09-18 13:30:20 +0100110#ifdef CONFIG_PM
Lennert Buytenhek57436c2d2011-01-03 19:15:54 +0900111extern int s3c_irq_wake(struct irq_data *data, unsigned int state);
Ben Dooksa9c36852006-09-18 13:30:20 +0100112#else
113#define s3c_irq_wake NULL
114#endif
115
Lennert Buytenhek57436c2d2011-01-03 19:15:54 +0900116extern int s3c_irqext_type(struct irq_data *d, unsigned int type);