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googlers / maze / linux / b1a67b0f4c747ca10c96ebb24f04e2a74b3c298d / . / drivers / video / omap2 / dss / ti_hdmi.h
blob: 216aa704f9d72ef08b06a82865d5b8fda03cc876 [file] [log] [blame]
Mythri P K94c52982011-09-08 19:06:21 +0530[diff] [blame]1/*
2 * ti_hdmi.h
3 *
4 * HDMI driver definition for TI OMAP4, DM81xx, DM38xx Processor.
5 *
6 * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com/
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published by
10 * the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program. If not, see <http://www.gnu.org/licenses/>.
19 */
20
21#ifndef _TI_HDMI_H
22#define _TI_HDMI_H
23
Mythri P K60634a22011-09-08 19:06:26 +0530[diff] [blame]24struct hdmi_ip_data;
25
Mythri P K94c52982011-09-08 19:06:21 +0530[diff] [blame]26enum hdmi_pll_pwr {
27 HDMI_PLLPWRCMD_ALLOFF = 0,
28 HDMI_PLLPWRCMD_PLLONLY = 1,
29 HDMI_PLLPWRCMD_BOTHON_ALLCLKS = 2,
30 HDMI_PLLPWRCMD_BOTHON_NOPHYCLK = 3
31};
32
33enum hdmi_core_hdmi_dvi {
34 HDMI_DVI = 0,
35 HDMI_HDMI = 1
36};
37
38enum hdmi_clk_refsel {
39 HDMI_REFSEL_PCLK = 0,
40 HDMI_REFSEL_REF1 = 1,
41 HDMI_REFSEL_REF2 = 2,
42 HDMI_REFSEL_SYSCLK = 3
43};
44
Mythri P K94c52982011-09-08 19:06:21 +0530[diff] [blame]45struct hdmi_cm {
46 int code;
47 int mode;
48};
49
50struct hdmi_config {
Archit Tanejacc937e52012-06-24 13:08:10 +0530[diff] [blame]51 struct omap_video_timings timings;
Mythri P K94c52982011-09-08 19:06:21 +0530[diff] [blame]52 struct hdmi_cm cm;
53};
54
55/* HDMI PLL structure */
56struct hdmi_pll_info {
57 u16 regn;
58 u16 regm;
59 u32 regmf;
60 u16 regm2;
61 u16 regsd;
62 u16 dcofreq;
63 enum hdmi_clk_refsel refsel;
64};
65
Mythri P K60634a22011-09-08 19:06:26 +0530[diff] [blame]66struct ti_hdmi_ip_ops {
67
68 void (*video_configure)(struct hdmi_ip_data *ip_data);
69
70 int (*phy_enable)(struct hdmi_ip_data *ip_data);
71
72 void (*phy_disable)(struct hdmi_ip_data *ip_data);
73
Tomi Valkeinen937fce12011-08-31 11:12:40 +0300[diff] [blame]74 int (*read_edid)(struct hdmi_ip_data *ip_data, u8 *edid, int len);
Mythri P K60634a22011-09-08 19:06:26 +0530[diff] [blame]75
Tomi Valkeinen759593f2011-08-29 18:10:20 +0300[diff] [blame]76 bool (*detect)(struct hdmi_ip_data *ip_data);
77
Mythri P K60634a22011-09-08 19:06:26 +0530[diff] [blame]78 int (*pll_enable)(struct hdmi_ip_data *ip_data);
79
80 void (*pll_disable)(struct hdmi_ip_data *ip_data);
81
Ricardo Neric0456be2012-04-27 13:48:45 -0500[diff] [blame]82 int (*video_enable)(struct hdmi_ip_data *ip_data);
83
84 void (*video_disable)(struct hdmi_ip_data *ip_data);
Mythri P K162874d2011-09-22 13:37:45 +0530[diff] [blame]85
86 void (*dump_wrapper)(struct hdmi_ip_data *ip_data, struct seq_file *s);
87
88 void (*dump_core)(struct hdmi_ip_data *ip_data, struct seq_file *s);
89
90 void (*dump_pll)(struct hdmi_ip_data *ip_data, struct seq_file *s);
91
92 void (*dump_phy)(struct hdmi_ip_data *ip_data, struct seq_file *s);
93
Ricardo Neri7e151f72012-03-15 14:08:03 -0600[diff] [blame]94#if defined(CONFIG_OMAP4_DSS_HDMI_AUDIO)
Ricardo Neri027bdc82012-04-20 17:17:46 -0500[diff] [blame]95 int (*audio_enable)(struct hdmi_ip_data *ip_data);
96
97 void (*audio_disable)(struct hdmi_ip_data *ip_data);
Axel Castaneda Gonzalez3df9fb52012-05-03 09:00:21 -0500[diff] [blame]98
99 int (*audio_start)(struct hdmi_ip_data *ip_data);
100
101 void (*audio_stop)(struct hdmi_ip_data *ip_data);
Ricardo Neri6ec355d2012-03-21 12:38:15 -0600[diff] [blame]102
103 int (*audio_config)(struct hdmi_ip_data *ip_data,
104 struct omap_dss_audio *audio);
Ricardo Nerid7b6f442012-11-06 00:19:16 -0600[diff] [blame]105
106 int (*audio_get_dma_port)(u32 *offset, u32 *size);
Ricardo Neri80a48592011-11-27 16:09:58 -0600[diff] [blame]107#endif
108
Mythri P K60634a22011-09-08 19:06:26 +0530[diff] [blame]109};
110
Mythri P Kda8f14f2012-02-08 11:54:19 +0530[diff] [blame]111/*
112 * Refer to section 8.2 in HDMI 1.3 specification for
113 * details about infoframe databytes
114 */
115struct hdmi_core_infoframe_avi {
116 /* Y0, Y1 rgb,yCbCr */
117 u8 db1_format;
118 /* A0 Active information Present */
119 u8 db1_active_info;
120 /* B0, B1 Bar info data valid */
121 u8 db1_bar_info_dv;
122 /* S0, S1 scan information */
123 u8 db1_scan_info;
124 /* C0, C1 colorimetry */
125 u8 db2_colorimetry;
126 /* M0, M1 Aspect ratio (4:3, 16:9) */
127 u8 db2_aspect_ratio;
128 /* R0...R3 Active format aspect ratio */
129 u8 db2_active_fmt_ar;
130 /* ITC IT content. */
131 u8 db3_itc;
132 /* EC0, EC1, EC2 Extended colorimetry */
133 u8 db3_ec;
134 /* Q1, Q0 Quantization range */
135 u8 db3_q_range;
136 /* SC1, SC0 Non-uniform picture scaling */
137 u8 db3_nup_scaling;
138 /* VIC0..6 Video format identification */
139 u8 db4_videocode;
140 /* PR0..PR3 Pixel repetition factor */
141 u8 db5_pixel_repeat;
142 /* Line number end of top bar */
143 u16 db6_7_line_eoftop;
144 /* Line number start of bottom bar */
145 u16 db8_9_line_sofbottom;
146 /* Pixel number end of left bar */
147 u16 db10_11_pixel_eofleft;
148 /* Pixel number start of right bar */
149 u16 db12_13_pixel_sofright;
150};
151
Mythri P K94c52982011-09-08 19:06:21 +0530[diff] [blame]152struct hdmi_ip_data {
153 void __iomem *base_wp; /* HDMI wrapper */
154 unsigned long core_sys_offset;
155 unsigned long core_av_offset;
156 unsigned long pll_offset;
157 unsigned long phy_offset;
Mythri P K60634a22011-09-08 19:06:26 +0530[diff] [blame]158 const struct ti_hdmi_ip_ops *ops;
Mythri P K94c52982011-09-08 19:06:21 +0530[diff] [blame]159 struct hdmi_config cfg;
160 struct hdmi_pll_info pll_data;
Mythri P Kda8f14f2012-02-08 11:54:19 +0530[diff] [blame]161 struct hdmi_core_infoframe_avi avi_cfg;
Tomi Valkeinenc49d0052012-01-17 11:09:57 +0200[diff] [blame]162
163 /* ti_hdmi_4xxx_ip private data. These should be in a separate struct */
164 int hpd_gpio;
Jassi Brar3a5383a2012-06-27 19:34:56 +0530[diff] [blame]165 struct mutex lock;
Mythri P K94c52982011-09-08 19:06:21 +0530[diff] [blame]166};
Mythri P K176b5782011-09-08 19:06:25 +0530[diff] [blame]167int ti_hdmi_4xxx_phy_enable(struct hdmi_ip_data *ip_data);
168void ti_hdmi_4xxx_phy_disable(struct hdmi_ip_data *ip_data);
Tomi Valkeinen937fce12011-08-31 11:12:40 +0300[diff] [blame]169int ti_hdmi_4xxx_read_edid(struct hdmi_ip_data *ip_data, u8 *edid, int len);
Tomi Valkeinen759593f2011-08-29 18:10:20 +0300[diff] [blame]170bool ti_hdmi_4xxx_detect(struct hdmi_ip_data *ip_data);
Ricardo Neric0456be2012-04-27 13:48:45 -0500[diff] [blame]171int ti_hdmi_4xxx_wp_video_start(struct hdmi_ip_data *ip_data);
172void ti_hdmi_4xxx_wp_video_stop(struct hdmi_ip_data *ip_data);
Mythri P K176b5782011-09-08 19:06:25 +0530[diff] [blame]173int ti_hdmi_4xxx_pll_enable(struct hdmi_ip_data *ip_data);
174void ti_hdmi_4xxx_pll_disable(struct hdmi_ip_data *ip_data);
175void ti_hdmi_4xxx_basic_configure(struct hdmi_ip_data *ip_data);
Mythri P K162874d2011-09-22 13:37:45 +0530[diff] [blame]176void ti_hdmi_4xxx_wp_dump(struct hdmi_ip_data *ip_data, struct seq_file *s);
177void ti_hdmi_4xxx_pll_dump(struct hdmi_ip_data *ip_data, struct seq_file *s);
178void ti_hdmi_4xxx_core_dump(struct hdmi_ip_data *ip_data, struct seq_file *s);
179void ti_hdmi_4xxx_phy_dump(struct hdmi_ip_data *ip_data, struct seq_file *s);
Ricardo Neri7e151f72012-03-15 14:08:03 -0600[diff] [blame]180#if defined(CONFIG_OMAP4_DSS_HDMI_AUDIO)
Ricardo Neri35547622012-03-20 21:02:01 -0600[diff] [blame]181int hdmi_compute_acr(u32 sample_freq, u32 *n, u32 *cts);
Ricardo Neri027bdc82012-04-20 17:17:46 -0500[diff] [blame]182int ti_hdmi_4xxx_wp_audio_enable(struct hdmi_ip_data *ip_data);
183void ti_hdmi_4xxx_wp_audio_disable(struct hdmi_ip_data *ip_data);
Axel Castaneda Gonzalez3df9fb52012-05-03 09:00:21 -0500[diff] [blame]184int ti_hdmi_4xxx_audio_start(struct hdmi_ip_data *ip_data);
185void ti_hdmi_4xxx_audio_stop(struct hdmi_ip_data *ip_data);
Ricardo Neri6ec355d2012-03-21 12:38:15 -0600[diff] [blame]186int ti_hdmi_4xxx_audio_config(struct hdmi_ip_data *ip_data,
187 struct omap_dss_audio *audio);
Ricardo Nerid7b6f442012-11-06 00:19:16 -0600[diff] [blame]188int ti_hdmi_4xxx_audio_get_dma_port(u32 *offset, u32 *size);
Ricardo Neri80a48592011-11-27 16:09:58 -0600[diff] [blame]189#endif
Mythri P K94c52982011-09-08 19:06:21 +0530[diff] [blame]190#endif