Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Freescale MPC85xx, MPC83xx DMA Engine support |
| 3 | * |
Li Yang | e2c8e425 | 2010-11-11 20:16:29 +0800 | [diff] [blame] | 4 | * Copyright (C) 2007-2010 Freescale Semiconductor, Inc. All rights reserved. |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 5 | * |
| 6 | * Author: |
| 7 | * Zhang Wei <wei.zhang@freescale.com>, Jul 2007 |
| 8 | * Ebony Zhu <ebony.zhu@freescale.com>, May 2007 |
| 9 | * |
| 10 | * Description: |
| 11 | * DMA engine driver for Freescale MPC8540 DMA controller, which is |
| 12 | * also fit for MPC8560, MPC8555, MPC8548, MPC8641, and etc. |
Stefan Weil | c2e07b3 | 2010-08-03 19:44:52 +0200 | [diff] [blame] | 13 | * The support for MPC8349 DMA controller is also added. |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 14 | * |
Ira W. Snyder | a7aea37 | 2009-04-23 16:17:54 -0700 | [diff] [blame] | 15 | * This driver instructs the DMA controller to issue the PCI Read Multiple |
| 16 | * command for PCI read operations, instead of using the default PCI Read Line |
| 17 | * command. Please be aware that this setting may result in read pre-fetching |
| 18 | * on some platforms. |
| 19 | * |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 20 | * This is free software; you can redistribute it and/or modify |
| 21 | * it under the terms of the GNU General Public License as published by |
| 22 | * the Free Software Foundation; either version 2 of the License, or |
| 23 | * (at your option) any later version. |
| 24 | * |
| 25 | */ |
| 26 | |
| 27 | #include <linux/init.h> |
| 28 | #include <linux/module.h> |
| 29 | #include <linux/pci.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 30 | #include <linux/slab.h> |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 31 | #include <linux/interrupt.h> |
| 32 | #include <linux/dmaengine.h> |
| 33 | #include <linux/delay.h> |
| 34 | #include <linux/dma-mapping.h> |
| 35 | #include <linux/dmapool.h> |
| 36 | #include <linux/of_platform.h> |
| 37 | |
| 38 | #include "fsldma.h" |
| 39 | |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame^] | 40 | #define chan_dbg(chan, fmt, arg...) \ |
| 41 | dev_dbg(chan->dev, "%s: " fmt, chan->name, ##arg) |
| 42 | #define chan_err(chan, fmt, arg...) \ |
| 43 | dev_err(chan->dev, "%s: " fmt, chan->name, ##arg) |
| 44 | |
| 45 | static const char msg_ld_oom[] = "No free memory for link descriptor"; |
Ira Snyder | c1433041 | 2010-09-30 11:46:45 +0000 | [diff] [blame] | 46 | |
Ira Snyder | e8bd84d | 2011-03-03 07:54:54 +0000 | [diff] [blame] | 47 | /* |
| 48 | * Register Helpers |
| 49 | */ |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 50 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 51 | static void set_sr(struct fsldma_chan *chan, u32 val) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 52 | { |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 53 | DMA_OUT(chan, &chan->regs->sr, val, 32); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 54 | } |
| 55 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 56 | static u32 get_sr(struct fsldma_chan *chan) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 57 | { |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 58 | return DMA_IN(chan, &chan->regs->sr, 32); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 59 | } |
| 60 | |
Ira Snyder | e8bd84d | 2011-03-03 07:54:54 +0000 | [diff] [blame] | 61 | static void set_cdar(struct fsldma_chan *chan, dma_addr_t addr) |
| 62 | { |
| 63 | DMA_OUT(chan, &chan->regs->cdar, addr | FSL_DMA_SNEN, 64); |
| 64 | } |
| 65 | |
| 66 | static dma_addr_t get_cdar(struct fsldma_chan *chan) |
| 67 | { |
| 68 | return DMA_IN(chan, &chan->regs->cdar, 64) & ~FSL_DMA_SNEN; |
| 69 | } |
| 70 | |
| 71 | static dma_addr_t get_ndar(struct fsldma_chan *chan) |
| 72 | { |
| 73 | return DMA_IN(chan, &chan->regs->ndar, 64); |
| 74 | } |
| 75 | |
| 76 | static u32 get_bcr(struct fsldma_chan *chan) |
| 77 | { |
| 78 | return DMA_IN(chan, &chan->regs->bcr, 32); |
| 79 | } |
| 80 | |
| 81 | /* |
| 82 | * Descriptor Helpers |
| 83 | */ |
| 84 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 85 | static void set_desc_cnt(struct fsldma_chan *chan, |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 86 | struct fsl_dma_ld_hw *hw, u32 count) |
| 87 | { |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 88 | hw->count = CPU_TO_DMA(chan, count, 32); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 89 | } |
| 90 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 91 | static void set_desc_src(struct fsldma_chan *chan, |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 92 | struct fsl_dma_ld_hw *hw, dma_addr_t src) |
| 93 | { |
| 94 | u64 snoop_bits; |
| 95 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 96 | snoop_bits = ((chan->feature & FSL_DMA_IP_MASK) == FSL_DMA_IP_85XX) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 97 | ? ((u64)FSL_DMA_SATR_SREADTYPE_SNOOP_READ << 32) : 0; |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 98 | hw->src_addr = CPU_TO_DMA(chan, snoop_bits | src, 64); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 99 | } |
| 100 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 101 | static void set_desc_dst(struct fsldma_chan *chan, |
Ira Snyder | 738f5f7 | 2010-01-06 13:34:02 +0000 | [diff] [blame] | 102 | struct fsl_dma_ld_hw *hw, dma_addr_t dst) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 103 | { |
| 104 | u64 snoop_bits; |
| 105 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 106 | snoop_bits = ((chan->feature & FSL_DMA_IP_MASK) == FSL_DMA_IP_85XX) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 107 | ? ((u64)FSL_DMA_DATR_DWRITETYPE_SNOOP_WRITE << 32) : 0; |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 108 | hw->dst_addr = CPU_TO_DMA(chan, snoop_bits | dst, 64); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 109 | } |
| 110 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 111 | static void set_desc_next(struct fsldma_chan *chan, |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 112 | struct fsl_dma_ld_hw *hw, dma_addr_t next) |
| 113 | { |
| 114 | u64 snoop_bits; |
| 115 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 116 | snoop_bits = ((chan->feature & FSL_DMA_IP_MASK) == FSL_DMA_IP_83XX) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 117 | ? FSL_DMA_SNEN : 0; |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 118 | hw->next_ln_addr = CPU_TO_DMA(chan, snoop_bits | next, 64); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 119 | } |
| 120 | |
Ira Snyder | e8bd84d | 2011-03-03 07:54:54 +0000 | [diff] [blame] | 121 | static void set_ld_eol(struct fsldma_chan *chan, |
| 122 | struct fsl_desc_sw *desc) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 123 | { |
Ira Snyder | e8bd84d | 2011-03-03 07:54:54 +0000 | [diff] [blame] | 124 | u64 snoop_bits; |
| 125 | |
| 126 | snoop_bits = ((chan->feature & FSL_DMA_IP_MASK) == FSL_DMA_IP_83XX) |
| 127 | ? FSL_DMA_SNEN : 0; |
| 128 | |
| 129 | desc->hw.next_ln_addr = CPU_TO_DMA(chan, |
| 130 | DMA_TO_CPU(chan, desc->hw.next_ln_addr, 64) | FSL_DMA_EOL |
| 131 | | snoop_bits, 64); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 132 | } |
| 133 | |
Ira Snyder | e8bd84d | 2011-03-03 07:54:54 +0000 | [diff] [blame] | 134 | /* |
| 135 | * DMA Engine Hardware Control Helpers |
| 136 | */ |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 137 | |
Ira Snyder | e8bd84d | 2011-03-03 07:54:54 +0000 | [diff] [blame] | 138 | static void dma_init(struct fsldma_chan *chan) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 139 | { |
Ira Snyder | e8bd84d | 2011-03-03 07:54:54 +0000 | [diff] [blame] | 140 | /* Reset the channel */ |
| 141 | DMA_OUT(chan, &chan->regs->mr, 0, 32); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 142 | |
Ira Snyder | e8bd84d | 2011-03-03 07:54:54 +0000 | [diff] [blame] | 143 | switch (chan->feature & FSL_DMA_IP_MASK) { |
| 144 | case FSL_DMA_IP_85XX: |
| 145 | /* Set the channel to below modes: |
| 146 | * EIE - Error interrupt enable |
| 147 | * EOSIE - End of segments interrupt enable (basic mode) |
| 148 | * EOLNIE - End of links interrupt enable |
| 149 | * BWC - Bandwidth sharing among channels |
| 150 | */ |
| 151 | DMA_OUT(chan, &chan->regs->mr, FSL_DMA_MR_BWC |
| 152 | | FSL_DMA_MR_EIE | FSL_DMA_MR_EOLNIE |
| 153 | | FSL_DMA_MR_EOSIE, 32); |
| 154 | break; |
| 155 | case FSL_DMA_IP_83XX: |
| 156 | /* Set the channel to below modes: |
| 157 | * EOTIE - End-of-transfer interrupt enable |
| 158 | * PRC_RM - PCI read multiple |
| 159 | */ |
| 160 | DMA_OUT(chan, &chan->regs->mr, FSL_DMA_MR_EOTIE |
| 161 | | FSL_DMA_MR_PRC_RM, 32); |
| 162 | break; |
| 163 | } |
Zhang Wei | f79abb6 | 2008-03-18 18:45:00 -0700 | [diff] [blame] | 164 | } |
| 165 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 166 | static int dma_is_idle(struct fsldma_chan *chan) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 167 | { |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 168 | u32 sr = get_sr(chan); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 169 | return (!(sr & FSL_DMA_SR_CB)) || (sr & FSL_DMA_SR_CH); |
| 170 | } |
| 171 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 172 | static void dma_start(struct fsldma_chan *chan) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 173 | { |
Ira Snyder | 272ca65 | 2010-01-06 13:33:59 +0000 | [diff] [blame] | 174 | u32 mode; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 175 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 176 | mode = DMA_IN(chan, &chan->regs->mr, 32); |
Ira Snyder | 272ca65 | 2010-01-06 13:33:59 +0000 | [diff] [blame] | 177 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 178 | if ((chan->feature & FSL_DMA_IP_MASK) == FSL_DMA_IP_85XX) { |
| 179 | if (chan->feature & FSL_DMA_CHAN_PAUSE_EXT) { |
| 180 | DMA_OUT(chan, &chan->regs->bcr, 0, 32); |
Ira Snyder | 272ca65 | 2010-01-06 13:33:59 +0000 | [diff] [blame] | 181 | mode |= FSL_DMA_MR_EMP_EN; |
| 182 | } else { |
| 183 | mode &= ~FSL_DMA_MR_EMP_EN; |
| 184 | } |
Ira Snyder | 43a1a3e | 2009-05-28 09:26:40 +0000 | [diff] [blame] | 185 | } |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 186 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 187 | if (chan->feature & FSL_DMA_CHAN_START_EXT) |
Ira Snyder | 272ca65 | 2010-01-06 13:33:59 +0000 | [diff] [blame] | 188 | mode |= FSL_DMA_MR_EMS_EN; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 189 | else |
Ira Snyder | 272ca65 | 2010-01-06 13:33:59 +0000 | [diff] [blame] | 190 | mode |= FSL_DMA_MR_CS; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 191 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 192 | DMA_OUT(chan, &chan->regs->mr, mode, 32); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 193 | } |
| 194 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 195 | static void dma_halt(struct fsldma_chan *chan) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 196 | { |
Ira Snyder | 272ca65 | 2010-01-06 13:33:59 +0000 | [diff] [blame] | 197 | u32 mode; |
Dan Williams | 900325a | 2009-03-02 15:33:46 -0700 | [diff] [blame] | 198 | int i; |
| 199 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 200 | mode = DMA_IN(chan, &chan->regs->mr, 32); |
Ira Snyder | 272ca65 | 2010-01-06 13:33:59 +0000 | [diff] [blame] | 201 | mode |= FSL_DMA_MR_CA; |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 202 | DMA_OUT(chan, &chan->regs->mr, mode, 32); |
Ira Snyder | 272ca65 | 2010-01-06 13:33:59 +0000 | [diff] [blame] | 203 | |
| 204 | mode &= ~(FSL_DMA_MR_CS | FSL_DMA_MR_EMS_EN | FSL_DMA_MR_CA); |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 205 | DMA_OUT(chan, &chan->regs->mr, mode, 32); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 206 | |
Dan Williams | 900325a | 2009-03-02 15:33:46 -0700 | [diff] [blame] | 207 | for (i = 0; i < 100; i++) { |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 208 | if (dma_is_idle(chan)) |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 209 | return; |
| 210 | |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 211 | udelay(10); |
Dan Williams | 900325a | 2009-03-02 15:33:46 -0700 | [diff] [blame] | 212 | } |
Ira Snyder | 272ca65 | 2010-01-06 13:33:59 +0000 | [diff] [blame] | 213 | |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 214 | if (!dma_is_idle(chan)) |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame^] | 215 | chan_err(chan, "DMA halt timeout!\n"); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 216 | } |
| 217 | |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 218 | /** |
| 219 | * fsl_chan_set_src_loop_size - Set source address hold transfer size |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 220 | * @chan : Freescale DMA channel |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 221 | * @size : Address loop size, 0 for disable loop |
| 222 | * |
| 223 | * The set source address hold transfer size. The source |
| 224 | * address hold or loop transfer size is when the DMA transfer |
| 225 | * data from source address (SA), if the loop size is 4, the DMA will |
| 226 | * read data from SA, SA + 1, SA + 2, SA + 3, then loop back to SA, |
| 227 | * SA + 1 ... and so on. |
| 228 | */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 229 | static void fsl_chan_set_src_loop_size(struct fsldma_chan *chan, int size) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 230 | { |
Ira Snyder | 272ca65 | 2010-01-06 13:33:59 +0000 | [diff] [blame] | 231 | u32 mode; |
| 232 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 233 | mode = DMA_IN(chan, &chan->regs->mr, 32); |
Ira Snyder | 272ca65 | 2010-01-06 13:33:59 +0000 | [diff] [blame] | 234 | |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 235 | switch (size) { |
| 236 | case 0: |
Ira Snyder | 272ca65 | 2010-01-06 13:33:59 +0000 | [diff] [blame] | 237 | mode &= ~FSL_DMA_MR_SAHE; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 238 | break; |
| 239 | case 1: |
| 240 | case 2: |
| 241 | case 4: |
| 242 | case 8: |
Ira Snyder | 272ca65 | 2010-01-06 13:33:59 +0000 | [diff] [blame] | 243 | mode |= FSL_DMA_MR_SAHE | (__ilog2(size) << 14); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 244 | break; |
| 245 | } |
Ira Snyder | 272ca65 | 2010-01-06 13:33:59 +0000 | [diff] [blame] | 246 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 247 | DMA_OUT(chan, &chan->regs->mr, mode, 32); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 248 | } |
| 249 | |
| 250 | /** |
Ira Snyder | 738f5f7 | 2010-01-06 13:34:02 +0000 | [diff] [blame] | 251 | * fsl_chan_set_dst_loop_size - Set destination address hold transfer size |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 252 | * @chan : Freescale DMA channel |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 253 | * @size : Address loop size, 0 for disable loop |
| 254 | * |
| 255 | * The set destination address hold transfer size. The destination |
| 256 | * address hold or loop transfer size is when the DMA transfer |
| 257 | * data to destination address (TA), if the loop size is 4, the DMA will |
| 258 | * write data to TA, TA + 1, TA + 2, TA + 3, then loop back to TA, |
| 259 | * TA + 1 ... and so on. |
| 260 | */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 261 | static void fsl_chan_set_dst_loop_size(struct fsldma_chan *chan, int size) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 262 | { |
Ira Snyder | 272ca65 | 2010-01-06 13:33:59 +0000 | [diff] [blame] | 263 | u32 mode; |
| 264 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 265 | mode = DMA_IN(chan, &chan->regs->mr, 32); |
Ira Snyder | 272ca65 | 2010-01-06 13:33:59 +0000 | [diff] [blame] | 266 | |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 267 | switch (size) { |
| 268 | case 0: |
Ira Snyder | 272ca65 | 2010-01-06 13:33:59 +0000 | [diff] [blame] | 269 | mode &= ~FSL_DMA_MR_DAHE; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 270 | break; |
| 271 | case 1: |
| 272 | case 2: |
| 273 | case 4: |
| 274 | case 8: |
Ira Snyder | 272ca65 | 2010-01-06 13:33:59 +0000 | [diff] [blame] | 275 | mode |= FSL_DMA_MR_DAHE | (__ilog2(size) << 16); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 276 | break; |
| 277 | } |
Ira Snyder | 272ca65 | 2010-01-06 13:33:59 +0000 | [diff] [blame] | 278 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 279 | DMA_OUT(chan, &chan->regs->mr, mode, 32); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 280 | } |
| 281 | |
| 282 | /** |
Ira Snyder | e6c7ecb | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 283 | * fsl_chan_set_request_count - Set DMA Request Count for external control |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 284 | * @chan : Freescale DMA channel |
Ira Snyder | e6c7ecb | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 285 | * @size : Number of bytes to transfer in a single request |
| 286 | * |
| 287 | * The Freescale DMA channel can be controlled by the external signal DREQ#. |
| 288 | * The DMA request count is how many bytes are allowed to transfer before |
| 289 | * pausing the channel, after which a new assertion of DREQ# resumes channel |
| 290 | * operation. |
| 291 | * |
| 292 | * A size of 0 disables external pause control. The maximum size is 1024. |
| 293 | */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 294 | static void fsl_chan_set_request_count(struct fsldma_chan *chan, int size) |
Ira Snyder | e6c7ecb | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 295 | { |
Ira Snyder | 272ca65 | 2010-01-06 13:33:59 +0000 | [diff] [blame] | 296 | u32 mode; |
| 297 | |
Ira Snyder | e6c7ecb | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 298 | BUG_ON(size > 1024); |
Ira Snyder | 272ca65 | 2010-01-06 13:33:59 +0000 | [diff] [blame] | 299 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 300 | mode = DMA_IN(chan, &chan->regs->mr, 32); |
Ira Snyder | 272ca65 | 2010-01-06 13:33:59 +0000 | [diff] [blame] | 301 | mode |= (__ilog2(size) << 24) & 0x0f000000; |
| 302 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 303 | DMA_OUT(chan, &chan->regs->mr, mode, 32); |
Ira Snyder | e6c7ecb | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 304 | } |
| 305 | |
| 306 | /** |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 307 | * fsl_chan_toggle_ext_pause - Toggle channel external pause status |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 308 | * @chan : Freescale DMA channel |
Ira Snyder | e6c7ecb | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 309 | * @enable : 0 is disabled, 1 is enabled. |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 310 | * |
Ira Snyder | e6c7ecb | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 311 | * The Freescale DMA channel can be controlled by the external signal DREQ#. |
| 312 | * The DMA Request Count feature should be used in addition to this feature |
| 313 | * to set the number of bytes to transfer before pausing the channel. |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 314 | */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 315 | static void fsl_chan_toggle_ext_pause(struct fsldma_chan *chan, int enable) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 316 | { |
Ira Snyder | e6c7ecb | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 317 | if (enable) |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 318 | chan->feature |= FSL_DMA_CHAN_PAUSE_EXT; |
Ira Snyder | e6c7ecb | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 319 | else |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 320 | chan->feature &= ~FSL_DMA_CHAN_PAUSE_EXT; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 321 | } |
| 322 | |
| 323 | /** |
| 324 | * fsl_chan_toggle_ext_start - Toggle channel external start status |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 325 | * @chan : Freescale DMA channel |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 326 | * @enable : 0 is disabled, 1 is enabled. |
| 327 | * |
| 328 | * If enable the external start, the channel can be started by an |
| 329 | * external DMA start pin. So the dma_start() does not start the |
| 330 | * transfer immediately. The DMA channel will wait for the |
| 331 | * control pin asserted. |
| 332 | */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 333 | static void fsl_chan_toggle_ext_start(struct fsldma_chan *chan, int enable) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 334 | { |
| 335 | if (enable) |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 336 | chan->feature |= FSL_DMA_CHAN_START_EXT; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 337 | else |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 338 | chan->feature &= ~FSL_DMA_CHAN_START_EXT; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 339 | } |
| 340 | |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 341 | static void append_ld_queue(struct fsldma_chan *chan, |
| 342 | struct fsl_desc_sw *desc) |
| 343 | { |
| 344 | struct fsl_desc_sw *tail = to_fsl_desc(chan->ld_pending.prev); |
| 345 | |
| 346 | if (list_empty(&chan->ld_pending)) |
| 347 | goto out_splice; |
| 348 | |
| 349 | /* |
| 350 | * Add the hardware descriptor to the chain of hardware descriptors |
| 351 | * that already exists in memory. |
| 352 | * |
| 353 | * This will un-set the EOL bit of the existing transaction, and the |
| 354 | * last link in this transaction will become the EOL descriptor. |
| 355 | */ |
| 356 | set_desc_next(chan, &tail->hw, desc->async_tx.phys); |
| 357 | |
| 358 | /* |
| 359 | * Add the software descriptor and all children to the list |
| 360 | * of pending transactions |
| 361 | */ |
| 362 | out_splice: |
| 363 | list_splice_tail_init(&desc->tx_list, &chan->ld_pending); |
| 364 | } |
| 365 | |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 366 | static dma_cookie_t fsl_dma_tx_submit(struct dma_async_tx_descriptor *tx) |
| 367 | { |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 368 | struct fsldma_chan *chan = to_fsl_chan(tx->chan); |
Dan Williams | eda3423 | 2009-09-08 17:53:02 -0700 | [diff] [blame] | 369 | struct fsl_desc_sw *desc = tx_to_fsl_desc(tx); |
| 370 | struct fsl_desc_sw *child; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 371 | unsigned long flags; |
| 372 | dma_cookie_t cookie; |
| 373 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 374 | spin_lock_irqsave(&chan->desc_lock, flags); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 375 | |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 376 | /* |
| 377 | * assign cookies to all of the software descriptors |
| 378 | * that make up this transaction |
| 379 | */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 380 | cookie = chan->common.cookie; |
Dan Williams | eda3423 | 2009-09-08 17:53:02 -0700 | [diff] [blame] | 381 | list_for_each_entry(child, &desc->tx_list, node) { |
Ira Snyder | bcfb746 | 2009-05-15 14:27:16 -0700 | [diff] [blame] | 382 | cookie++; |
| 383 | if (cookie < 0) |
| 384 | cookie = 1; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 385 | |
Steven J. Magnani | 6ca3a7a | 2010-02-25 13:39:30 -0600 | [diff] [blame] | 386 | child->async_tx.cookie = cookie; |
Ira Snyder | bcfb746 | 2009-05-15 14:27:16 -0700 | [diff] [blame] | 387 | } |
| 388 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 389 | chan->common.cookie = cookie; |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 390 | |
| 391 | /* put this transaction onto the tail of the pending queue */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 392 | append_ld_queue(chan, desc); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 393 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 394 | spin_unlock_irqrestore(&chan->desc_lock, flags); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 395 | |
| 396 | return cookie; |
| 397 | } |
| 398 | |
| 399 | /** |
| 400 | * fsl_dma_alloc_descriptor - Allocate descriptor from channel's DMA pool. |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 401 | * @chan : Freescale DMA channel |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 402 | * |
| 403 | * Return - The descriptor allocated. NULL for failed. |
| 404 | */ |
| 405 | static struct fsl_desc_sw *fsl_dma_alloc_descriptor( |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 406 | struct fsldma_chan *chan) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 407 | { |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 408 | struct fsl_desc_sw *desc; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 409 | dma_addr_t pdesc; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 410 | |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 411 | desc = dma_pool_alloc(chan->desc_pool, GFP_ATOMIC, &pdesc); |
| 412 | if (!desc) { |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame^] | 413 | chan_dbg(chan, "out of memory for link descriptor\n"); |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 414 | return NULL; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 415 | } |
| 416 | |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 417 | memset(desc, 0, sizeof(*desc)); |
| 418 | INIT_LIST_HEAD(&desc->tx_list); |
| 419 | dma_async_tx_descriptor_init(&desc->async_tx, &chan->common); |
| 420 | desc->async_tx.tx_submit = fsl_dma_tx_submit; |
| 421 | desc->async_tx.phys = pdesc; |
| 422 | |
| 423 | return desc; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 424 | } |
| 425 | |
| 426 | |
| 427 | /** |
| 428 | * fsl_dma_alloc_chan_resources - Allocate resources for DMA channel. |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 429 | * @chan : Freescale DMA channel |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 430 | * |
| 431 | * This function will create a dma pool for descriptor allocation. |
| 432 | * |
| 433 | * Return - The number of descriptors allocated. |
| 434 | */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 435 | static int fsl_dma_alloc_chan_resources(struct dma_chan *dchan) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 436 | { |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 437 | struct fsldma_chan *chan = to_fsl_chan(dchan); |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 438 | |
| 439 | /* Has this channel already been allocated? */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 440 | if (chan->desc_pool) |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 441 | return 1; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 442 | |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 443 | /* |
| 444 | * We need the descriptor to be aligned to 32bytes |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 445 | * for meeting FSL DMA specification requirement. |
| 446 | */ |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame^] | 447 | chan->desc_pool = dma_pool_create(chan->name, chan->dev, |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 448 | sizeof(struct fsl_desc_sw), |
| 449 | __alignof__(struct fsl_desc_sw), 0); |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 450 | if (!chan->desc_pool) { |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame^] | 451 | chan_err(chan, "unable to allocate descriptor pool\n"); |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 452 | return -ENOMEM; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 453 | } |
| 454 | |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 455 | /* there is at least one descriptor free to be allocated */ |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 456 | return 1; |
| 457 | } |
| 458 | |
| 459 | /** |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 460 | * fsldma_free_desc_list - Free all descriptors in a queue |
| 461 | * @chan: Freescae DMA channel |
| 462 | * @list: the list to free |
| 463 | * |
| 464 | * LOCKING: must hold chan->desc_lock |
| 465 | */ |
| 466 | static void fsldma_free_desc_list(struct fsldma_chan *chan, |
| 467 | struct list_head *list) |
| 468 | { |
| 469 | struct fsl_desc_sw *desc, *_desc; |
| 470 | |
| 471 | list_for_each_entry_safe(desc, _desc, list, node) { |
| 472 | list_del(&desc->node); |
| 473 | dma_pool_free(chan->desc_pool, desc, desc->async_tx.phys); |
| 474 | } |
| 475 | } |
| 476 | |
| 477 | static void fsldma_free_desc_list_reverse(struct fsldma_chan *chan, |
| 478 | struct list_head *list) |
| 479 | { |
| 480 | struct fsl_desc_sw *desc, *_desc; |
| 481 | |
| 482 | list_for_each_entry_safe_reverse(desc, _desc, list, node) { |
| 483 | list_del(&desc->node); |
| 484 | dma_pool_free(chan->desc_pool, desc, desc->async_tx.phys); |
| 485 | } |
| 486 | } |
| 487 | |
| 488 | /** |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 489 | * fsl_dma_free_chan_resources - Free all resources of the channel. |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 490 | * @chan : Freescale DMA channel |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 491 | */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 492 | static void fsl_dma_free_chan_resources(struct dma_chan *dchan) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 493 | { |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 494 | struct fsldma_chan *chan = to_fsl_chan(dchan); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 495 | unsigned long flags; |
| 496 | |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame^] | 497 | chan_dbg(chan, "free all channel resources\n"); |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 498 | spin_lock_irqsave(&chan->desc_lock, flags); |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 499 | fsldma_free_desc_list(chan, &chan->ld_pending); |
| 500 | fsldma_free_desc_list(chan, &chan->ld_running); |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 501 | spin_unlock_irqrestore(&chan->desc_lock, flags); |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 502 | |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 503 | dma_pool_destroy(chan->desc_pool); |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 504 | chan->desc_pool = NULL; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 505 | } |
| 506 | |
Zhang Wei | 2187c26 | 2008-03-13 17:45:28 -0700 | [diff] [blame] | 507 | static struct dma_async_tx_descriptor * |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 508 | fsl_dma_prep_interrupt(struct dma_chan *dchan, unsigned long flags) |
Zhang Wei | 2187c26 | 2008-03-13 17:45:28 -0700 | [diff] [blame] | 509 | { |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 510 | struct fsldma_chan *chan; |
Zhang Wei | 2187c26 | 2008-03-13 17:45:28 -0700 | [diff] [blame] | 511 | struct fsl_desc_sw *new; |
| 512 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 513 | if (!dchan) |
Zhang Wei | 2187c26 | 2008-03-13 17:45:28 -0700 | [diff] [blame] | 514 | return NULL; |
| 515 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 516 | chan = to_fsl_chan(dchan); |
Zhang Wei | 2187c26 | 2008-03-13 17:45:28 -0700 | [diff] [blame] | 517 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 518 | new = fsl_dma_alloc_descriptor(chan); |
Zhang Wei | 2187c26 | 2008-03-13 17:45:28 -0700 | [diff] [blame] | 519 | if (!new) { |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame^] | 520 | chan_err(chan, "%s\n", msg_ld_oom); |
Zhang Wei | 2187c26 | 2008-03-13 17:45:28 -0700 | [diff] [blame] | 521 | return NULL; |
| 522 | } |
| 523 | |
| 524 | new->async_tx.cookie = -EBUSY; |
Dan Williams | 636bdea | 2008-04-17 20:17:26 -0700 | [diff] [blame] | 525 | new->async_tx.flags = flags; |
Zhang Wei | 2187c26 | 2008-03-13 17:45:28 -0700 | [diff] [blame] | 526 | |
Zhang Wei | f79abb6 | 2008-03-18 18:45:00 -0700 | [diff] [blame] | 527 | /* Insert the link descriptor to the LD ring */ |
Dan Williams | eda3423 | 2009-09-08 17:53:02 -0700 | [diff] [blame] | 528 | list_add_tail(&new->node, &new->tx_list); |
Zhang Wei | f79abb6 | 2008-03-18 18:45:00 -0700 | [diff] [blame] | 529 | |
Zhang Wei | 2187c26 | 2008-03-13 17:45:28 -0700 | [diff] [blame] | 530 | /* Set End-of-link to the last link descriptor of new list*/ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 531 | set_ld_eol(chan, new); |
Zhang Wei | 2187c26 | 2008-03-13 17:45:28 -0700 | [diff] [blame] | 532 | |
| 533 | return &new->async_tx; |
| 534 | } |
| 535 | |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 536 | static struct dma_async_tx_descriptor *fsl_dma_prep_memcpy( |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 537 | struct dma_chan *dchan, dma_addr_t dma_dst, dma_addr_t dma_src, |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 538 | size_t len, unsigned long flags) |
| 539 | { |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 540 | struct fsldma_chan *chan; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 541 | struct fsl_desc_sw *first = NULL, *prev = NULL, *new; |
| 542 | size_t copy; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 543 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 544 | if (!dchan) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 545 | return NULL; |
| 546 | |
| 547 | if (!len) |
| 548 | return NULL; |
| 549 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 550 | chan = to_fsl_chan(dchan); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 551 | |
| 552 | do { |
| 553 | |
| 554 | /* Allocate the link descriptor from DMA pool */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 555 | new = fsl_dma_alloc_descriptor(chan); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 556 | if (!new) { |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame^] | 557 | chan_err(chan, "%s\n", msg_ld_oom); |
Ira Snyder | 2e077f8 | 2009-05-15 09:59:46 -0700 | [diff] [blame] | 558 | goto fail; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 559 | } |
| 560 | #ifdef FSL_DMA_LD_DEBUG |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame^] | 561 | chan_dbg(chan, "new link desc alloc %p\n", new); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 562 | #endif |
| 563 | |
Zhang Wei | 5682284 | 2008-03-13 10:45:27 -0700 | [diff] [blame] | 564 | copy = min(len, (size_t)FSL_DMA_BCR_MAX_CNT); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 565 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 566 | set_desc_cnt(chan, &new->hw, copy); |
| 567 | set_desc_src(chan, &new->hw, dma_src); |
| 568 | set_desc_dst(chan, &new->hw, dma_dst); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 569 | |
| 570 | if (!first) |
| 571 | first = new; |
| 572 | else |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 573 | set_desc_next(chan, &prev->hw, new->async_tx.phys); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 574 | |
| 575 | new->async_tx.cookie = 0; |
Dan Williams | 636bdea | 2008-04-17 20:17:26 -0700 | [diff] [blame] | 576 | async_tx_ack(&new->async_tx); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 577 | |
| 578 | prev = new; |
| 579 | len -= copy; |
| 580 | dma_src += copy; |
Ira Snyder | 738f5f7 | 2010-01-06 13:34:02 +0000 | [diff] [blame] | 581 | dma_dst += copy; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 582 | |
| 583 | /* Insert the link descriptor to the LD ring */ |
Dan Williams | eda3423 | 2009-09-08 17:53:02 -0700 | [diff] [blame] | 584 | list_add_tail(&new->node, &first->tx_list); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 585 | } while (len); |
| 586 | |
Dan Williams | 636bdea | 2008-04-17 20:17:26 -0700 | [diff] [blame] | 587 | new->async_tx.flags = flags; /* client is in control of this ack */ |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 588 | new->async_tx.cookie = -EBUSY; |
| 589 | |
| 590 | /* Set End-of-link to the last link descriptor of new list*/ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 591 | set_ld_eol(chan, new); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 592 | |
Ira Snyder | 2e077f8 | 2009-05-15 09:59:46 -0700 | [diff] [blame] | 593 | return &first->async_tx; |
| 594 | |
| 595 | fail: |
| 596 | if (!first) |
| 597 | return NULL; |
| 598 | |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 599 | fsldma_free_desc_list_reverse(chan, &first->tx_list); |
Ira Snyder | 2e077f8 | 2009-05-15 09:59:46 -0700 | [diff] [blame] | 600 | return NULL; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 601 | } |
| 602 | |
Ira Snyder | c1433041 | 2010-09-30 11:46:45 +0000 | [diff] [blame] | 603 | static struct dma_async_tx_descriptor *fsl_dma_prep_sg(struct dma_chan *dchan, |
| 604 | struct scatterlist *dst_sg, unsigned int dst_nents, |
| 605 | struct scatterlist *src_sg, unsigned int src_nents, |
| 606 | unsigned long flags) |
| 607 | { |
| 608 | struct fsl_desc_sw *first = NULL, *prev = NULL, *new = NULL; |
| 609 | struct fsldma_chan *chan = to_fsl_chan(dchan); |
| 610 | size_t dst_avail, src_avail; |
| 611 | dma_addr_t dst, src; |
| 612 | size_t len; |
| 613 | |
| 614 | /* basic sanity checks */ |
| 615 | if (dst_nents == 0 || src_nents == 0) |
| 616 | return NULL; |
| 617 | |
| 618 | if (dst_sg == NULL || src_sg == NULL) |
| 619 | return NULL; |
| 620 | |
| 621 | /* |
| 622 | * TODO: should we check that both scatterlists have the same |
| 623 | * TODO: number of bytes in total? Is that really an error? |
| 624 | */ |
| 625 | |
| 626 | /* get prepared for the loop */ |
| 627 | dst_avail = sg_dma_len(dst_sg); |
| 628 | src_avail = sg_dma_len(src_sg); |
| 629 | |
| 630 | /* run until we are out of scatterlist entries */ |
| 631 | while (true) { |
| 632 | |
| 633 | /* create the largest transaction possible */ |
| 634 | len = min_t(size_t, src_avail, dst_avail); |
| 635 | len = min_t(size_t, len, FSL_DMA_BCR_MAX_CNT); |
| 636 | if (len == 0) |
| 637 | goto fetch; |
| 638 | |
| 639 | dst = sg_dma_address(dst_sg) + sg_dma_len(dst_sg) - dst_avail; |
| 640 | src = sg_dma_address(src_sg) + sg_dma_len(src_sg) - src_avail; |
| 641 | |
| 642 | /* allocate and populate the descriptor */ |
| 643 | new = fsl_dma_alloc_descriptor(chan); |
| 644 | if (!new) { |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame^] | 645 | chan_err(chan, "%s\n", msg_ld_oom); |
Ira Snyder | c1433041 | 2010-09-30 11:46:45 +0000 | [diff] [blame] | 646 | goto fail; |
| 647 | } |
| 648 | #ifdef FSL_DMA_LD_DEBUG |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame^] | 649 | chan_dbg(chan, "new link desc alloc %p\n", new); |
Ira Snyder | c1433041 | 2010-09-30 11:46:45 +0000 | [diff] [blame] | 650 | #endif |
| 651 | |
| 652 | set_desc_cnt(chan, &new->hw, len); |
| 653 | set_desc_src(chan, &new->hw, src); |
| 654 | set_desc_dst(chan, &new->hw, dst); |
| 655 | |
| 656 | if (!first) |
| 657 | first = new; |
| 658 | else |
| 659 | set_desc_next(chan, &prev->hw, new->async_tx.phys); |
| 660 | |
| 661 | new->async_tx.cookie = 0; |
| 662 | async_tx_ack(&new->async_tx); |
| 663 | prev = new; |
| 664 | |
| 665 | /* Insert the link descriptor to the LD ring */ |
| 666 | list_add_tail(&new->node, &first->tx_list); |
| 667 | |
| 668 | /* update metadata */ |
| 669 | dst_avail -= len; |
| 670 | src_avail -= len; |
| 671 | |
| 672 | fetch: |
| 673 | /* fetch the next dst scatterlist entry */ |
| 674 | if (dst_avail == 0) { |
| 675 | |
| 676 | /* no more entries: we're done */ |
| 677 | if (dst_nents == 0) |
| 678 | break; |
| 679 | |
| 680 | /* fetch the next entry: if there are no more: done */ |
| 681 | dst_sg = sg_next(dst_sg); |
| 682 | if (dst_sg == NULL) |
| 683 | break; |
| 684 | |
| 685 | dst_nents--; |
| 686 | dst_avail = sg_dma_len(dst_sg); |
| 687 | } |
| 688 | |
| 689 | /* fetch the next src scatterlist entry */ |
| 690 | if (src_avail == 0) { |
| 691 | |
| 692 | /* no more entries: we're done */ |
| 693 | if (src_nents == 0) |
| 694 | break; |
| 695 | |
| 696 | /* fetch the next entry: if there are no more: done */ |
| 697 | src_sg = sg_next(src_sg); |
| 698 | if (src_sg == NULL) |
| 699 | break; |
| 700 | |
| 701 | src_nents--; |
| 702 | src_avail = sg_dma_len(src_sg); |
| 703 | } |
| 704 | } |
| 705 | |
| 706 | new->async_tx.flags = flags; /* client is in control of this ack */ |
| 707 | new->async_tx.cookie = -EBUSY; |
| 708 | |
| 709 | /* Set End-of-link to the last link descriptor of new list */ |
| 710 | set_ld_eol(chan, new); |
| 711 | |
| 712 | return &first->async_tx; |
| 713 | |
| 714 | fail: |
| 715 | if (!first) |
| 716 | return NULL; |
| 717 | |
| 718 | fsldma_free_desc_list_reverse(chan, &first->tx_list); |
| 719 | return NULL; |
| 720 | } |
| 721 | |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 722 | /** |
Ira Snyder | bbea0b6 | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 723 | * fsl_dma_prep_slave_sg - prepare descriptors for a DMA_SLAVE transaction |
| 724 | * @chan: DMA channel |
| 725 | * @sgl: scatterlist to transfer to/from |
| 726 | * @sg_len: number of entries in @scatterlist |
| 727 | * @direction: DMA direction |
| 728 | * @flags: DMAEngine flags |
| 729 | * |
| 730 | * Prepare a set of descriptors for a DMA_SLAVE transaction. Following the |
| 731 | * DMA_SLAVE API, this gets the device-specific information from the |
| 732 | * chan->private variable. |
| 733 | */ |
| 734 | static struct dma_async_tx_descriptor *fsl_dma_prep_slave_sg( |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 735 | struct dma_chan *dchan, struct scatterlist *sgl, unsigned int sg_len, |
Ira Snyder | bbea0b6 | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 736 | enum dma_data_direction direction, unsigned long flags) |
| 737 | { |
Ira Snyder | bbea0b6 | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 738 | /* |
Ira Snyder | 968f19a | 2010-09-30 11:46:46 +0000 | [diff] [blame] | 739 | * This operation is not supported on the Freescale DMA controller |
Ira Snyder | bbea0b6 | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 740 | * |
Ira Snyder | 968f19a | 2010-09-30 11:46:46 +0000 | [diff] [blame] | 741 | * However, we need to provide the function pointer to allow the |
| 742 | * device_control() method to work. |
Ira Snyder | bbea0b6 | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 743 | */ |
Ira Snyder | bbea0b6 | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 744 | return NULL; |
| 745 | } |
| 746 | |
Linus Walleij | c3635c7 | 2010-03-26 16:44:01 -0700 | [diff] [blame] | 747 | static int fsl_dma_device_control(struct dma_chan *dchan, |
Linus Walleij | 0582763 | 2010-05-17 16:30:42 -0700 | [diff] [blame] | 748 | enum dma_ctrl_cmd cmd, unsigned long arg) |
Ira Snyder | bbea0b6 | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 749 | { |
Ira Snyder | 968f19a | 2010-09-30 11:46:46 +0000 | [diff] [blame] | 750 | struct dma_slave_config *config; |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 751 | struct fsldma_chan *chan; |
Ira Snyder | bbea0b6 | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 752 | unsigned long flags; |
Ira Snyder | 968f19a | 2010-09-30 11:46:46 +0000 | [diff] [blame] | 753 | int size; |
Linus Walleij | c3635c7 | 2010-03-26 16:44:01 -0700 | [diff] [blame] | 754 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 755 | if (!dchan) |
Linus Walleij | c3635c7 | 2010-03-26 16:44:01 -0700 | [diff] [blame] | 756 | return -EINVAL; |
Ira Snyder | bbea0b6 | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 757 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 758 | chan = to_fsl_chan(dchan); |
Ira Snyder | bbea0b6 | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 759 | |
Ira Snyder | 968f19a | 2010-09-30 11:46:46 +0000 | [diff] [blame] | 760 | switch (cmd) { |
| 761 | case DMA_TERMINATE_ALL: |
| 762 | /* Halt the DMA engine */ |
| 763 | dma_halt(chan); |
Ira Snyder | bbea0b6 | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 764 | |
Ira Snyder | 968f19a | 2010-09-30 11:46:46 +0000 | [diff] [blame] | 765 | spin_lock_irqsave(&chan->desc_lock, flags); |
Ira Snyder | bbea0b6 | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 766 | |
Ira Snyder | 968f19a | 2010-09-30 11:46:46 +0000 | [diff] [blame] | 767 | /* Remove and free all of the descriptors in the LD queue */ |
| 768 | fsldma_free_desc_list(chan, &chan->ld_pending); |
| 769 | fsldma_free_desc_list(chan, &chan->ld_running); |
Ira Snyder | bbea0b6 | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 770 | |
Ira Snyder | 968f19a | 2010-09-30 11:46:46 +0000 | [diff] [blame] | 771 | spin_unlock_irqrestore(&chan->desc_lock, flags); |
| 772 | return 0; |
| 773 | |
| 774 | case DMA_SLAVE_CONFIG: |
| 775 | config = (struct dma_slave_config *)arg; |
| 776 | |
| 777 | /* make sure the channel supports setting burst size */ |
| 778 | if (!chan->set_request_count) |
| 779 | return -ENXIO; |
| 780 | |
| 781 | /* we set the controller burst size depending on direction */ |
| 782 | if (config->direction == DMA_TO_DEVICE) |
| 783 | size = config->dst_addr_width * config->dst_maxburst; |
| 784 | else |
| 785 | size = config->src_addr_width * config->src_maxburst; |
| 786 | |
| 787 | chan->set_request_count(chan, size); |
| 788 | return 0; |
| 789 | |
| 790 | case FSLDMA_EXTERNAL_START: |
| 791 | |
| 792 | /* make sure the channel supports external start */ |
| 793 | if (!chan->toggle_ext_start) |
| 794 | return -ENXIO; |
| 795 | |
| 796 | chan->toggle_ext_start(chan, arg); |
| 797 | return 0; |
| 798 | |
| 799 | default: |
| 800 | return -ENXIO; |
| 801 | } |
Linus Walleij | c3635c7 | 2010-03-26 16:44:01 -0700 | [diff] [blame] | 802 | |
| 803 | return 0; |
Ira Snyder | bbea0b6 | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 804 | } |
| 805 | |
| 806 | /** |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 807 | * fsl_dma_update_completed_cookie - Update the completed cookie. |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 808 | * @chan : Freescale DMA channel |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 809 | * |
| 810 | * CONTEXT: hardirq |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 811 | */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 812 | static void fsl_dma_update_completed_cookie(struct fsldma_chan *chan) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 813 | { |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 814 | struct fsl_desc_sw *desc; |
| 815 | unsigned long flags; |
| 816 | dma_cookie_t cookie; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 817 | |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 818 | spin_lock_irqsave(&chan->desc_lock, flags); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 819 | |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 820 | if (list_empty(&chan->ld_running)) { |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame^] | 821 | chan_dbg(chan, "no running descriptors\n"); |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 822 | goto out_unlock; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 823 | } |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 824 | |
| 825 | /* Get the last descriptor, update the cookie to that */ |
| 826 | desc = to_fsl_desc(chan->ld_running.prev); |
| 827 | if (dma_is_idle(chan)) |
| 828 | cookie = desc->async_tx.cookie; |
Steven J. Magnani | 76bd061 | 2010-02-28 22:18:16 -0700 | [diff] [blame] | 829 | else { |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 830 | cookie = desc->async_tx.cookie - 1; |
Steven J. Magnani | 76bd061 | 2010-02-28 22:18:16 -0700 | [diff] [blame] | 831 | if (unlikely(cookie < DMA_MIN_COOKIE)) |
| 832 | cookie = DMA_MAX_COOKIE; |
| 833 | } |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 834 | |
| 835 | chan->completed_cookie = cookie; |
| 836 | |
| 837 | out_unlock: |
| 838 | spin_unlock_irqrestore(&chan->desc_lock, flags); |
| 839 | } |
| 840 | |
| 841 | /** |
| 842 | * fsldma_desc_status - Check the status of a descriptor |
| 843 | * @chan: Freescale DMA channel |
| 844 | * @desc: DMA SW descriptor |
| 845 | * |
| 846 | * This function will return the status of the given descriptor |
| 847 | */ |
| 848 | static enum dma_status fsldma_desc_status(struct fsldma_chan *chan, |
| 849 | struct fsl_desc_sw *desc) |
| 850 | { |
| 851 | return dma_async_is_complete(desc->async_tx.cookie, |
| 852 | chan->completed_cookie, |
| 853 | chan->common.cookie); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 854 | } |
| 855 | |
| 856 | /** |
| 857 | * fsl_chan_ld_cleanup - Clean up link descriptors |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 858 | * @chan : Freescale DMA channel |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 859 | * |
| 860 | * This function clean up the ld_queue of DMA channel. |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 861 | */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 862 | static void fsl_chan_ld_cleanup(struct fsldma_chan *chan) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 863 | { |
| 864 | struct fsl_desc_sw *desc, *_desc; |
| 865 | unsigned long flags; |
| 866 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 867 | spin_lock_irqsave(&chan->desc_lock, flags); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 868 | |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame^] | 869 | chan_dbg(chan, "chan completed_cookie = %d\n", chan->completed_cookie); |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 870 | list_for_each_entry_safe(desc, _desc, &chan->ld_running, node) { |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 871 | dma_async_tx_callback callback; |
| 872 | void *callback_param; |
| 873 | |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 874 | if (fsldma_desc_status(chan, desc) == DMA_IN_PROGRESS) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 875 | break; |
| 876 | |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 877 | /* Remove from the list of running transactions */ |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 878 | list_del(&desc->node); |
| 879 | |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 880 | /* Run the link descriptor callback function */ |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 881 | callback = desc->async_tx.callback; |
| 882 | callback_param = desc->async_tx.callback_param; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 883 | if (callback) { |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 884 | spin_unlock_irqrestore(&chan->desc_lock, flags); |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame^] | 885 | chan_dbg(chan, "LD %p callback\n", desc); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 886 | callback(callback_param); |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 887 | spin_lock_irqsave(&chan->desc_lock, flags); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 888 | } |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 889 | |
| 890 | /* Run any dependencies, then free the descriptor */ |
| 891 | dma_run_dependencies(&desc->async_tx); |
| 892 | dma_pool_free(chan->desc_pool, desc, desc->async_tx.phys); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 893 | } |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 894 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 895 | spin_unlock_irqrestore(&chan->desc_lock, flags); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 896 | } |
| 897 | |
| 898 | /** |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 899 | * fsl_chan_xfer_ld_queue - transfer any pending transactions |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 900 | * @chan : Freescale DMA channel |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 901 | * |
| 902 | * This will make sure that any pending transactions will be run. |
| 903 | * If the DMA controller is idle, it will be started. Otherwise, |
| 904 | * the DMA controller's interrupt handler will start any pending |
| 905 | * transactions when it becomes idle. |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 906 | */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 907 | static void fsl_chan_xfer_ld_queue(struct fsldma_chan *chan) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 908 | { |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 909 | struct fsl_desc_sw *desc; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 910 | unsigned long flags; |
| 911 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 912 | spin_lock_irqsave(&chan->desc_lock, flags); |
Ira Snyder | 138ef01 | 2009-05-19 15:42:13 -0700 | [diff] [blame] | 913 | |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 914 | /* |
| 915 | * If the list of pending descriptors is empty, then we |
| 916 | * don't need to do any work at all |
| 917 | */ |
| 918 | if (list_empty(&chan->ld_pending)) { |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame^] | 919 | chan_dbg(chan, "no pending LDs\n"); |
Ira Snyder | 138ef01 | 2009-05-19 15:42:13 -0700 | [diff] [blame] | 920 | goto out_unlock; |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 921 | } |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 922 | |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 923 | /* |
| 924 | * The DMA controller is not idle, which means the interrupt |
| 925 | * handler will start any queued transactions when it runs |
| 926 | * at the end of the current transaction |
| 927 | */ |
| 928 | if (!dma_is_idle(chan)) { |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame^] | 929 | chan_dbg(chan, "DMA controller still busy\n"); |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 930 | goto out_unlock; |
| 931 | } |
| 932 | |
| 933 | /* |
| 934 | * TODO: |
| 935 | * make sure the dma_halt() function really un-wedges the |
| 936 | * controller as much as possible |
| 937 | */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 938 | dma_halt(chan); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 939 | |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 940 | /* |
| 941 | * If there are some link descriptors which have not been |
| 942 | * transferred, we need to start the controller |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 943 | */ |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 944 | |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 945 | /* |
| 946 | * Move all elements from the queue of pending transactions |
| 947 | * onto the list of running transactions |
| 948 | */ |
| 949 | desc = list_first_entry(&chan->ld_pending, struct fsl_desc_sw, node); |
| 950 | list_splice_tail_init(&chan->ld_pending, &chan->ld_running); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 951 | |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 952 | /* |
| 953 | * Program the descriptor's address into the DMA controller, |
| 954 | * then start the DMA transaction |
| 955 | */ |
| 956 | set_cdar(chan, desc->async_tx.phys); |
| 957 | dma_start(chan); |
Ira Snyder | 138ef01 | 2009-05-19 15:42:13 -0700 | [diff] [blame] | 958 | |
| 959 | out_unlock: |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 960 | spin_unlock_irqrestore(&chan->desc_lock, flags); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 961 | } |
| 962 | |
| 963 | /** |
| 964 | * fsl_dma_memcpy_issue_pending - Issue the DMA start command |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 965 | * @chan : Freescale DMA channel |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 966 | */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 967 | static void fsl_dma_memcpy_issue_pending(struct dma_chan *dchan) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 968 | { |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 969 | struct fsldma_chan *chan = to_fsl_chan(dchan); |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 970 | fsl_chan_xfer_ld_queue(chan); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 971 | } |
| 972 | |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 973 | /** |
Linus Walleij | 0793448 | 2010-03-26 16:50:49 -0700 | [diff] [blame] | 974 | * fsl_tx_status - Determine the DMA status |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 975 | * @chan : Freescale DMA channel |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 976 | */ |
Linus Walleij | 0793448 | 2010-03-26 16:50:49 -0700 | [diff] [blame] | 977 | static enum dma_status fsl_tx_status(struct dma_chan *dchan, |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 978 | dma_cookie_t cookie, |
Linus Walleij | 0793448 | 2010-03-26 16:50:49 -0700 | [diff] [blame] | 979 | struct dma_tx_state *txstate) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 980 | { |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 981 | struct fsldma_chan *chan = to_fsl_chan(dchan); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 982 | dma_cookie_t last_used; |
| 983 | dma_cookie_t last_complete; |
| 984 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 985 | fsl_chan_ld_cleanup(chan); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 986 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 987 | last_used = dchan->cookie; |
| 988 | last_complete = chan->completed_cookie; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 989 | |
Dan Williams | bca3469 | 2010-03-26 16:52:10 -0700 | [diff] [blame] | 990 | dma_set_tx_state(txstate, last_complete, last_used, 0); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 991 | |
| 992 | return dma_async_is_complete(cookie, last_complete, last_used); |
| 993 | } |
| 994 | |
Ira Snyder | d3f620b | 2010-01-06 13:34:04 +0000 | [diff] [blame] | 995 | /*----------------------------------------------------------------------------*/ |
| 996 | /* Interrupt Handling */ |
| 997 | /*----------------------------------------------------------------------------*/ |
| 998 | |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 999 | static irqreturn_t fsldma_chan_irq(int irq, void *data) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1000 | { |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1001 | struct fsldma_chan *chan = data; |
Zhang Wei | 1c62979 | 2008-04-17 20:17:25 -0700 | [diff] [blame] | 1002 | int update_cookie = 0; |
| 1003 | int xfer_ld_q = 0; |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1004 | u32 stat; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1005 | |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 1006 | /* save and clear the status register */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1007 | stat = get_sr(chan); |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 1008 | set_sr(chan, stat); |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame^] | 1009 | chan_dbg(chan, "irq: stat = 0x%x\n", stat); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1010 | |
| 1011 | stat &= ~(FSL_DMA_SR_CB | FSL_DMA_SR_CH); |
| 1012 | if (!stat) |
| 1013 | return IRQ_NONE; |
| 1014 | |
| 1015 | if (stat & FSL_DMA_SR_TE) |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame^] | 1016 | chan_err(chan, "Transfer Error!\n"); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1017 | |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 1018 | /* |
| 1019 | * Programming Error |
Zhang Wei | f79abb6 | 2008-03-18 18:45:00 -0700 | [diff] [blame] | 1020 | * The DMA_INTERRUPT async_tx is a NULL transfer, which will |
| 1021 | * triger a PE interrupt. |
| 1022 | */ |
| 1023 | if (stat & FSL_DMA_SR_PE) { |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame^] | 1024 | chan_dbg(chan, "irq: Programming Error INT\n"); |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1025 | if (get_bcr(chan) == 0) { |
Zhang Wei | f79abb6 | 2008-03-18 18:45:00 -0700 | [diff] [blame] | 1026 | /* BCR register is 0, this is a DMA_INTERRUPT async_tx. |
| 1027 | * Now, update the completed cookie, and continue the |
| 1028 | * next uncompleted transfer. |
| 1029 | */ |
Zhang Wei | 1c62979 | 2008-04-17 20:17:25 -0700 | [diff] [blame] | 1030 | update_cookie = 1; |
| 1031 | xfer_ld_q = 1; |
Zhang Wei | f79abb6 | 2008-03-18 18:45:00 -0700 | [diff] [blame] | 1032 | } |
| 1033 | stat &= ~FSL_DMA_SR_PE; |
| 1034 | } |
| 1035 | |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 1036 | /* |
| 1037 | * If the link descriptor segment transfer finishes, |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1038 | * we will recycle the used descriptor. |
| 1039 | */ |
| 1040 | if (stat & FSL_DMA_SR_EOSI) { |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame^] | 1041 | chan_dbg(chan, "irq: End-of-segments INT\n"); |
| 1042 | chan_dbg(chan, "irq: clndar 0x%llx, nlndar 0x%llx\n", |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1043 | (unsigned long long)get_cdar(chan), |
| 1044 | (unsigned long long)get_ndar(chan)); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1045 | stat &= ~FSL_DMA_SR_EOSI; |
Zhang Wei | 1c62979 | 2008-04-17 20:17:25 -0700 | [diff] [blame] | 1046 | update_cookie = 1; |
| 1047 | } |
| 1048 | |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 1049 | /* |
| 1050 | * For MPC8349, EOCDI event need to update cookie |
Zhang Wei | 1c62979 | 2008-04-17 20:17:25 -0700 | [diff] [blame] | 1051 | * and start the next transfer if it exist. |
| 1052 | */ |
| 1053 | if (stat & FSL_DMA_SR_EOCDI) { |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame^] | 1054 | chan_dbg(chan, "irq: End-of-Chain link INT\n"); |
Zhang Wei | 1c62979 | 2008-04-17 20:17:25 -0700 | [diff] [blame] | 1055 | stat &= ~FSL_DMA_SR_EOCDI; |
| 1056 | update_cookie = 1; |
| 1057 | xfer_ld_q = 1; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1058 | } |
| 1059 | |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 1060 | /* |
| 1061 | * If it current transfer is the end-of-transfer, |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1062 | * we should clear the Channel Start bit for |
| 1063 | * prepare next transfer. |
| 1064 | */ |
Zhang Wei | 1c62979 | 2008-04-17 20:17:25 -0700 | [diff] [blame] | 1065 | if (stat & FSL_DMA_SR_EOLNI) { |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame^] | 1066 | chan_dbg(chan, "irq: End-of-link INT\n"); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1067 | stat &= ~FSL_DMA_SR_EOLNI; |
Zhang Wei | 1c62979 | 2008-04-17 20:17:25 -0700 | [diff] [blame] | 1068 | xfer_ld_q = 1; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1069 | } |
| 1070 | |
Zhang Wei | 1c62979 | 2008-04-17 20:17:25 -0700 | [diff] [blame] | 1071 | if (update_cookie) |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1072 | fsl_dma_update_completed_cookie(chan); |
Zhang Wei | 1c62979 | 2008-04-17 20:17:25 -0700 | [diff] [blame] | 1073 | if (xfer_ld_q) |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1074 | fsl_chan_xfer_ld_queue(chan); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1075 | if (stat) |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame^] | 1076 | chan_dbg(chan, "irq: unhandled sr 0x%08x\n", stat); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1077 | |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame^] | 1078 | chan_dbg(chan, "irq: Exit\n"); |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1079 | tasklet_schedule(&chan->tasklet); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1080 | return IRQ_HANDLED; |
| 1081 | } |
| 1082 | |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1083 | static void dma_do_tasklet(unsigned long data) |
| 1084 | { |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1085 | struct fsldma_chan *chan = (struct fsldma_chan *)data; |
| 1086 | fsl_chan_ld_cleanup(chan); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1087 | } |
| 1088 | |
Ira Snyder | d3f620b | 2010-01-06 13:34:04 +0000 | [diff] [blame] | 1089 | static irqreturn_t fsldma_ctrl_irq(int irq, void *data) |
| 1090 | { |
| 1091 | struct fsldma_device *fdev = data; |
| 1092 | struct fsldma_chan *chan; |
| 1093 | unsigned int handled = 0; |
| 1094 | u32 gsr, mask; |
| 1095 | int i; |
| 1096 | |
| 1097 | gsr = (fdev->feature & FSL_DMA_BIG_ENDIAN) ? in_be32(fdev->regs) |
| 1098 | : in_le32(fdev->regs); |
| 1099 | mask = 0xff000000; |
| 1100 | dev_dbg(fdev->dev, "IRQ: gsr 0x%.8x\n", gsr); |
| 1101 | |
| 1102 | for (i = 0; i < FSL_DMA_MAX_CHANS_PER_DEVICE; i++) { |
| 1103 | chan = fdev->chan[i]; |
| 1104 | if (!chan) |
| 1105 | continue; |
| 1106 | |
| 1107 | if (gsr & mask) { |
| 1108 | dev_dbg(fdev->dev, "IRQ: chan %d\n", chan->id); |
| 1109 | fsldma_chan_irq(irq, chan); |
| 1110 | handled++; |
| 1111 | } |
| 1112 | |
| 1113 | gsr &= ~mask; |
| 1114 | mask >>= 8; |
| 1115 | } |
| 1116 | |
| 1117 | return IRQ_RETVAL(handled); |
| 1118 | } |
| 1119 | |
| 1120 | static void fsldma_free_irqs(struct fsldma_device *fdev) |
| 1121 | { |
| 1122 | struct fsldma_chan *chan; |
| 1123 | int i; |
| 1124 | |
| 1125 | if (fdev->irq != NO_IRQ) { |
| 1126 | dev_dbg(fdev->dev, "free per-controller IRQ\n"); |
| 1127 | free_irq(fdev->irq, fdev); |
| 1128 | return; |
| 1129 | } |
| 1130 | |
| 1131 | for (i = 0; i < FSL_DMA_MAX_CHANS_PER_DEVICE; i++) { |
| 1132 | chan = fdev->chan[i]; |
| 1133 | if (chan && chan->irq != NO_IRQ) { |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame^] | 1134 | chan_dbg(chan, "free per-channel IRQ\n"); |
Ira Snyder | d3f620b | 2010-01-06 13:34:04 +0000 | [diff] [blame] | 1135 | free_irq(chan->irq, chan); |
| 1136 | } |
| 1137 | } |
| 1138 | } |
| 1139 | |
| 1140 | static int fsldma_request_irqs(struct fsldma_device *fdev) |
| 1141 | { |
| 1142 | struct fsldma_chan *chan; |
| 1143 | int ret; |
| 1144 | int i; |
| 1145 | |
| 1146 | /* if we have a per-controller IRQ, use that */ |
| 1147 | if (fdev->irq != NO_IRQ) { |
| 1148 | dev_dbg(fdev->dev, "request per-controller IRQ\n"); |
| 1149 | ret = request_irq(fdev->irq, fsldma_ctrl_irq, IRQF_SHARED, |
| 1150 | "fsldma-controller", fdev); |
| 1151 | return ret; |
| 1152 | } |
| 1153 | |
| 1154 | /* no per-controller IRQ, use the per-channel IRQs */ |
| 1155 | for (i = 0; i < FSL_DMA_MAX_CHANS_PER_DEVICE; i++) { |
| 1156 | chan = fdev->chan[i]; |
| 1157 | if (!chan) |
| 1158 | continue; |
| 1159 | |
| 1160 | if (chan->irq == NO_IRQ) { |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame^] | 1161 | chan_err(chan, "interrupts property missing in device tree\n"); |
Ira Snyder | d3f620b | 2010-01-06 13:34:04 +0000 | [diff] [blame] | 1162 | ret = -ENODEV; |
| 1163 | goto out_unwind; |
| 1164 | } |
| 1165 | |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame^] | 1166 | chan_dbg(chan, "request per-channel IRQ\n"); |
Ira Snyder | d3f620b | 2010-01-06 13:34:04 +0000 | [diff] [blame] | 1167 | ret = request_irq(chan->irq, fsldma_chan_irq, IRQF_SHARED, |
| 1168 | "fsldma-chan", chan); |
| 1169 | if (ret) { |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame^] | 1170 | chan_err(chan, "unable to request per-channel IRQ\n"); |
Ira Snyder | d3f620b | 2010-01-06 13:34:04 +0000 | [diff] [blame] | 1171 | goto out_unwind; |
| 1172 | } |
| 1173 | } |
| 1174 | |
| 1175 | return 0; |
| 1176 | |
| 1177 | out_unwind: |
| 1178 | for (/* none */; i >= 0; i--) { |
| 1179 | chan = fdev->chan[i]; |
| 1180 | if (!chan) |
| 1181 | continue; |
| 1182 | |
| 1183 | if (chan->irq == NO_IRQ) |
| 1184 | continue; |
| 1185 | |
| 1186 | free_irq(chan->irq, chan); |
| 1187 | } |
| 1188 | |
| 1189 | return ret; |
| 1190 | } |
| 1191 | |
Ira Snyder | a4f56d4 | 2010-01-06 13:34:01 +0000 | [diff] [blame] | 1192 | /*----------------------------------------------------------------------------*/ |
| 1193 | /* OpenFirmware Subsystem */ |
| 1194 | /*----------------------------------------------------------------------------*/ |
| 1195 | |
| 1196 | static int __devinit fsl_dma_chan_probe(struct fsldma_device *fdev, |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 1197 | struct device_node *node, u32 feature, const char *compatible) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1198 | { |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1199 | struct fsldma_chan *chan; |
Ira Snyder | 4ce0e95 | 2010-01-06 13:34:00 +0000 | [diff] [blame] | 1200 | struct resource res; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1201 | int err; |
| 1202 | |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1203 | /* alloc channel */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1204 | chan = kzalloc(sizeof(*chan), GFP_KERNEL); |
| 1205 | if (!chan) { |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1206 | dev_err(fdev->dev, "no free memory for DMA channels!\n"); |
| 1207 | err = -ENOMEM; |
| 1208 | goto out_return; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1209 | } |
| 1210 | |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1211 | /* ioremap registers for use */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1212 | chan->regs = of_iomap(node, 0); |
| 1213 | if (!chan->regs) { |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1214 | dev_err(fdev->dev, "unable to ioremap registers\n"); |
| 1215 | err = -ENOMEM; |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1216 | goto out_free_chan; |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1217 | } |
| 1218 | |
Ira Snyder | 4ce0e95 | 2010-01-06 13:34:00 +0000 | [diff] [blame] | 1219 | err = of_address_to_resource(node, 0, &res); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1220 | if (err) { |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1221 | dev_err(fdev->dev, "unable to find 'reg' property\n"); |
| 1222 | goto out_iounmap_regs; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1223 | } |
| 1224 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1225 | chan->feature = feature; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1226 | if (!fdev->feature) |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1227 | fdev->feature = chan->feature; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1228 | |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1229 | /* |
| 1230 | * If the DMA device's feature is different than the feature |
| 1231 | * of its channels, report the bug |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1232 | */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1233 | WARN_ON(fdev->feature != chan->feature); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1234 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1235 | chan->dev = fdev->dev; |
| 1236 | chan->id = ((res.start - 0x100) & 0xfff) >> 7; |
| 1237 | if (chan->id >= FSL_DMA_MAX_CHANS_PER_DEVICE) { |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1238 | dev_err(fdev->dev, "too many channels for device\n"); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1239 | err = -EINVAL; |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1240 | goto out_iounmap_regs; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1241 | } |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1242 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1243 | fdev->chan[chan->id] = chan; |
| 1244 | tasklet_init(&chan->tasklet, dma_do_tasklet, (unsigned long)chan); |
Ira Snyder | b158471 | 2011-03-03 07:54:55 +0000 | [diff] [blame^] | 1245 | snprintf(chan->name, sizeof(chan->name), "chan%d", chan->id); |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1246 | |
| 1247 | /* Initialize the channel */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1248 | dma_init(chan); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1249 | |
| 1250 | /* Clear cdar registers */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1251 | set_cdar(chan, 0); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1252 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1253 | switch (chan->feature & FSL_DMA_IP_MASK) { |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1254 | case FSL_DMA_IP_85XX: |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1255 | chan->toggle_ext_pause = fsl_chan_toggle_ext_pause; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1256 | case FSL_DMA_IP_83XX: |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1257 | chan->toggle_ext_start = fsl_chan_toggle_ext_start; |
| 1258 | chan->set_src_loop_size = fsl_chan_set_src_loop_size; |
| 1259 | chan->set_dst_loop_size = fsl_chan_set_dst_loop_size; |
| 1260 | chan->set_request_count = fsl_chan_set_request_count; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1261 | } |
| 1262 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1263 | spin_lock_init(&chan->desc_lock); |
Ira Snyder | 9c3a50b | 2010-01-06 13:34:06 +0000 | [diff] [blame] | 1264 | INIT_LIST_HEAD(&chan->ld_pending); |
| 1265 | INIT_LIST_HEAD(&chan->ld_running); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1266 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1267 | chan->common.device = &fdev->common; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1268 | |
Ira Snyder | d3f620b | 2010-01-06 13:34:04 +0000 | [diff] [blame] | 1269 | /* find the IRQ line, if it exists in the device tree */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1270 | chan->irq = irq_of_parse_and_map(node, 0); |
Ira Snyder | d3f620b | 2010-01-06 13:34:04 +0000 | [diff] [blame] | 1271 | |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1272 | /* Add the channel to DMA device channel list */ |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1273 | list_add_tail(&chan->common.device_node, &fdev->common.channels); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1274 | fdev->common.chancnt++; |
| 1275 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1276 | dev_info(fdev->dev, "#%d (%s), irq %d\n", chan->id, compatible, |
| 1277 | chan->irq != NO_IRQ ? chan->irq : fdev->irq); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1278 | |
| 1279 | return 0; |
Li Yang | 51ee87f | 2008-05-29 23:25:45 -0700 | [diff] [blame] | 1280 | |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1281 | out_iounmap_regs: |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1282 | iounmap(chan->regs); |
| 1283 | out_free_chan: |
| 1284 | kfree(chan); |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1285 | out_return: |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1286 | return err; |
| 1287 | } |
| 1288 | |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1289 | static void fsl_dma_chan_remove(struct fsldma_chan *chan) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1290 | { |
Ira Snyder | a1c0331 | 2010-01-06 13:34:05 +0000 | [diff] [blame] | 1291 | irq_dispose_mapping(chan->irq); |
| 1292 | list_del(&chan->common.device_node); |
| 1293 | iounmap(chan->regs); |
| 1294 | kfree(chan); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1295 | } |
| 1296 | |
Grant Likely | 2dc1158 | 2010-08-06 09:25:50 -0600 | [diff] [blame] | 1297 | static int __devinit fsldma_of_probe(struct platform_device *op, |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1298 | const struct of_device_id *match) |
| 1299 | { |
Ira Snyder | a4f56d4 | 2010-01-06 13:34:01 +0000 | [diff] [blame] | 1300 | struct fsldma_device *fdev; |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 1301 | struct device_node *child; |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1302 | int err; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1303 | |
Ira Snyder | a4f56d4 | 2010-01-06 13:34:01 +0000 | [diff] [blame] | 1304 | fdev = kzalloc(sizeof(*fdev), GFP_KERNEL); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1305 | if (!fdev) { |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1306 | dev_err(&op->dev, "No enough memory for 'priv'\n"); |
| 1307 | err = -ENOMEM; |
| 1308 | goto out_return; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1309 | } |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1310 | |
| 1311 | fdev->dev = &op->dev; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1312 | INIT_LIST_HEAD(&fdev->common.channels); |
| 1313 | |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1314 | /* ioremap the registers for use */ |
Grant Likely | 61c7a08 | 2010-04-13 16:12:29 -0700 | [diff] [blame] | 1315 | fdev->regs = of_iomap(op->dev.of_node, 0); |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1316 | if (!fdev->regs) { |
| 1317 | dev_err(&op->dev, "unable to ioremap registers\n"); |
| 1318 | err = -ENOMEM; |
| 1319 | goto out_free_fdev; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1320 | } |
| 1321 | |
Ira Snyder | d3f620b | 2010-01-06 13:34:04 +0000 | [diff] [blame] | 1322 | /* map the channel IRQ if it exists, but don't hookup the handler yet */ |
Grant Likely | 61c7a08 | 2010-04-13 16:12:29 -0700 | [diff] [blame] | 1323 | fdev->irq = irq_of_parse_and_map(op->dev.of_node, 0); |
Ira Snyder | d3f620b | 2010-01-06 13:34:04 +0000 | [diff] [blame] | 1324 | |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1325 | dma_cap_set(DMA_MEMCPY, fdev->common.cap_mask); |
| 1326 | dma_cap_set(DMA_INTERRUPT, fdev->common.cap_mask); |
Ira Snyder | c1433041 | 2010-09-30 11:46:45 +0000 | [diff] [blame] | 1327 | dma_cap_set(DMA_SG, fdev->common.cap_mask); |
Ira Snyder | bbea0b6 | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 1328 | dma_cap_set(DMA_SLAVE, fdev->common.cap_mask); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1329 | fdev->common.device_alloc_chan_resources = fsl_dma_alloc_chan_resources; |
| 1330 | fdev->common.device_free_chan_resources = fsl_dma_free_chan_resources; |
Zhang Wei | 2187c26 | 2008-03-13 17:45:28 -0700 | [diff] [blame] | 1331 | fdev->common.device_prep_dma_interrupt = fsl_dma_prep_interrupt; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1332 | fdev->common.device_prep_dma_memcpy = fsl_dma_prep_memcpy; |
Ira Snyder | c1433041 | 2010-09-30 11:46:45 +0000 | [diff] [blame] | 1333 | fdev->common.device_prep_dma_sg = fsl_dma_prep_sg; |
Linus Walleij | 0793448 | 2010-03-26 16:50:49 -0700 | [diff] [blame] | 1334 | fdev->common.device_tx_status = fsl_tx_status; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1335 | fdev->common.device_issue_pending = fsl_dma_memcpy_issue_pending; |
Ira Snyder | bbea0b6 | 2009-09-08 17:53:04 -0700 | [diff] [blame] | 1336 | fdev->common.device_prep_slave_sg = fsl_dma_prep_slave_sg; |
Linus Walleij | c3635c7 | 2010-03-26 16:44:01 -0700 | [diff] [blame] | 1337 | fdev->common.device_control = fsl_dma_device_control; |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1338 | fdev->common.dev = &op->dev; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1339 | |
Li Yang | e2c8e425 | 2010-11-11 20:16:29 +0800 | [diff] [blame] | 1340 | dma_set_mask(&(op->dev), DMA_BIT_MASK(36)); |
| 1341 | |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1342 | dev_set_drvdata(&op->dev, fdev); |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 1343 | |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1344 | /* |
| 1345 | * We cannot use of_platform_bus_probe() because there is no |
| 1346 | * of_platform_bus_remove(). Instead, we manually instantiate every DMA |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 1347 | * channel object. |
| 1348 | */ |
Grant Likely | 61c7a08 | 2010-04-13 16:12:29 -0700 | [diff] [blame] | 1349 | for_each_child_of_node(op->dev.of_node, child) { |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1350 | if (of_device_is_compatible(child, "fsl,eloplus-dma-channel")) { |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 1351 | fsl_dma_chan_probe(fdev, child, |
| 1352 | FSL_DMA_IP_85XX | FSL_DMA_BIG_ENDIAN, |
| 1353 | "fsl,eloplus-dma-channel"); |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1354 | } |
| 1355 | |
| 1356 | if (of_device_is_compatible(child, "fsl,elo-dma-channel")) { |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 1357 | fsl_dma_chan_probe(fdev, child, |
| 1358 | FSL_DMA_IP_83XX | FSL_DMA_LITTLE_ENDIAN, |
| 1359 | "fsl,elo-dma-channel"); |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1360 | } |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 1361 | } |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1362 | |
Ira Snyder | d3f620b | 2010-01-06 13:34:04 +0000 | [diff] [blame] | 1363 | /* |
| 1364 | * Hookup the IRQ handler(s) |
| 1365 | * |
| 1366 | * If we have a per-controller interrupt, we prefer that to the |
| 1367 | * per-channel interrupts to reduce the number of shared interrupt |
| 1368 | * handlers on the same IRQ line |
| 1369 | */ |
| 1370 | err = fsldma_request_irqs(fdev); |
| 1371 | if (err) { |
| 1372 | dev_err(fdev->dev, "unable to request IRQs\n"); |
| 1373 | goto out_free_fdev; |
| 1374 | } |
| 1375 | |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1376 | dma_async_device_register(&fdev->common); |
| 1377 | return 0; |
| 1378 | |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1379 | out_free_fdev: |
Ira Snyder | d3f620b | 2010-01-06 13:34:04 +0000 | [diff] [blame] | 1380 | irq_dispose_mapping(fdev->irq); |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1381 | kfree(fdev); |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1382 | out_return: |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1383 | return err; |
| 1384 | } |
| 1385 | |
Grant Likely | 2dc1158 | 2010-08-06 09:25:50 -0600 | [diff] [blame] | 1386 | static int fsldma_of_remove(struct platform_device *op) |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 1387 | { |
Ira Snyder | a4f56d4 | 2010-01-06 13:34:01 +0000 | [diff] [blame] | 1388 | struct fsldma_device *fdev; |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 1389 | unsigned int i; |
| 1390 | |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1391 | fdev = dev_get_drvdata(&op->dev); |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 1392 | dma_async_device_unregister(&fdev->common); |
| 1393 | |
Ira Snyder | d3f620b | 2010-01-06 13:34:04 +0000 | [diff] [blame] | 1394 | fsldma_free_irqs(fdev); |
| 1395 | |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1396 | for (i = 0; i < FSL_DMA_MAX_CHANS_PER_DEVICE; i++) { |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 1397 | if (fdev->chan[i]) |
| 1398 | fsl_dma_chan_remove(fdev->chan[i]); |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1399 | } |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 1400 | |
Ira Snyder | e7a2915 | 2010-01-06 13:34:03 +0000 | [diff] [blame] | 1401 | iounmap(fdev->regs); |
| 1402 | dev_set_drvdata(&op->dev, NULL); |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 1403 | kfree(fdev); |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 1404 | |
| 1405 | return 0; |
| 1406 | } |
| 1407 | |
Márton Németh | 4b1cf1f | 2010-02-02 23:41:06 -0700 | [diff] [blame] | 1408 | static const struct of_device_id fsldma_of_ids[] = { |
Kumar Gala | 049c9d4 | 2008-03-31 11:13:21 -0500 | [diff] [blame] | 1409 | { .compatible = "fsl,eloplus-dma", }, |
| 1410 | { .compatible = "fsl,elo-dma", }, |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1411 | {} |
| 1412 | }; |
| 1413 | |
Ira Snyder | a4f56d4 | 2010-01-06 13:34:01 +0000 | [diff] [blame] | 1414 | static struct of_platform_driver fsldma_of_driver = { |
Grant Likely | 4018294 | 2010-04-13 16:13:02 -0700 | [diff] [blame] | 1415 | .driver = { |
| 1416 | .name = "fsl-elo-dma", |
| 1417 | .owner = THIS_MODULE, |
| 1418 | .of_match_table = fsldma_of_ids, |
| 1419 | }, |
| 1420 | .probe = fsldma_of_probe, |
| 1421 | .remove = fsldma_of_remove, |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1422 | }; |
| 1423 | |
Ira Snyder | a4f56d4 | 2010-01-06 13:34:01 +0000 | [diff] [blame] | 1424 | /*----------------------------------------------------------------------------*/ |
| 1425 | /* Module Init / Exit */ |
| 1426 | /*----------------------------------------------------------------------------*/ |
| 1427 | |
| 1428 | static __init int fsldma_init(void) |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1429 | { |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 1430 | int ret; |
| 1431 | |
| 1432 | pr_info("Freescale Elo / Elo Plus DMA driver\n"); |
| 1433 | |
Ira Snyder | a4f56d4 | 2010-01-06 13:34:01 +0000 | [diff] [blame] | 1434 | ret = of_register_platform_driver(&fsldma_of_driver); |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 1435 | if (ret) |
| 1436 | pr_err("fsldma: failed to register platform driver\n"); |
| 1437 | |
| 1438 | return ret; |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 1439 | } |
| 1440 | |
Ira Snyder | a4f56d4 | 2010-01-06 13:34:01 +0000 | [diff] [blame] | 1441 | static void __exit fsldma_exit(void) |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 1442 | { |
Ira Snyder | a4f56d4 | 2010-01-06 13:34:01 +0000 | [diff] [blame] | 1443 | of_unregister_platform_driver(&fsldma_of_driver); |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 1444 | } |
| 1445 | |
Ira Snyder | a4f56d4 | 2010-01-06 13:34:01 +0000 | [diff] [blame] | 1446 | subsys_initcall(fsldma_init); |
| 1447 | module_exit(fsldma_exit); |
Timur Tabi | 77cd62e | 2008-09-26 17:00:11 -0700 | [diff] [blame] | 1448 | |
| 1449 | MODULE_DESCRIPTION("Freescale Elo / Elo Plus DMA driver"); |
| 1450 | MODULE_LICENSE("GPL"); |