| dea3101 | 2005-04-17 16:05:31 -0500 | [diff] [blame] | 1 | /******************************************************************* |
| 2 | * This file is part of the Emulex Linux Device Driver for * |
James.Smart@Emulex.Com | c44ce17 | 2005-06-25 10:34:39 -0400 | [diff] [blame] | 3 | * Fibre Channel Host Bus Adapters. * |
James Smart | 9413aff | 2007-04-25 09:53:35 -0400 | [diff] [blame] | 4 | * Copyright (C) 2004-2007 Emulex. All rights reserved. * |
James.Smart@Emulex.Com | c44ce17 | 2005-06-25 10:34:39 -0400 | [diff] [blame] | 5 | * EMULEX and SLI are trademarks of Emulex. * |
| dea3101 | 2005-04-17 16:05:31 -0500 | [diff] [blame] | 6 | * www.emulex.com * |
James.Smart@Emulex.Com | c44ce17 | 2005-06-25 10:34:39 -0400 | [diff] [blame] | 7 | * Portions Copyright (C) 2004-2005 Christoph Hellwig * |
| dea3101 | 2005-04-17 16:05:31 -0500 | [diff] [blame] | 8 | * * |
| 9 | * This program is free software; you can redistribute it and/or * |
James.Smart@Emulex.Com | c44ce17 | 2005-06-25 10:34:39 -0400 | [diff] [blame] | 10 | * modify it under the terms of version 2 of the GNU General * |
| 11 | * Public License as published by the Free Software Foundation. * |
| 12 | * This program is distributed in the hope that it will be useful. * |
| 13 | * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND * |
| 14 | * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, * |
| 15 | * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE * |
| 16 | * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD * |
| 17 | * TO BE LEGALLY INVALID. See the GNU General Public License for * |
| 18 | * more details, a copy of which can be found in the file COPYING * |
| 19 | * included with this package. * |
| dea3101 | 2005-04-17 16:05:31 -0500 | [diff] [blame] | 20 | *******************************************************************/ |
| 21 | |
| dea3101 | 2005-04-17 16:05:31 -0500 | [diff] [blame] | 22 | #include <linux/blkdev.h> |
| 23 | #include <linux/pci.h> |
| 24 | #include <linux/interrupt.h> |
| 25 | |
James.Smart@Emulex.Com | f888ba3 | 2005-08-10 15:03:01 -0400 | [diff] [blame] | 26 | #include <scsi/scsi_device.h> |
| 27 | #include <scsi/scsi_transport_fc.h> |
| 28 | |
James.Smart@Emulex.Com | 9188652 | 2005-08-10 15:03:09 -0400 | [diff] [blame] | 29 | #include <scsi/scsi.h> |
| 30 | |
| dea3101 | 2005-04-17 16:05:31 -0500 | [diff] [blame] | 31 | #include "lpfc_hw.h" |
| 32 | #include "lpfc_sli.h" |
| 33 | #include "lpfc_disc.h" |
| 34 | #include "lpfc_scsi.h" |
| 35 | #include "lpfc.h" |
| 36 | #include "lpfc_logmsg.h" |
| 37 | #include "lpfc_crtn.h" |
| 38 | #include "lpfc_compat.h" |
| 39 | |
| 40 | /**********************************************/ |
| 41 | |
| 42 | /* mailbox command */ |
| 43 | /**********************************************/ |
| 44 | void |
| 45 | lpfc_dump_mem(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb, uint16_t offset) |
| 46 | { |
| 47 | MAILBOX_t *mb; |
| 48 | void *ctx; |
| 49 | |
| 50 | mb = &pmb->mb; |
| 51 | ctx = pmb->context2; |
| 52 | |
| 53 | /* Setup to dump VPD region */ |
| 54 | memset(pmb, 0, sizeof (LPFC_MBOXQ_t)); |
| 55 | mb->mbxCommand = MBX_DUMP_MEMORY; |
| 56 | mb->un.varDmp.cv = 1; |
| 57 | mb->un.varDmp.type = DMP_NV_PARAMS; |
| 58 | mb->un.varDmp.entry_index = offset; |
| 59 | mb->un.varDmp.region_id = DMP_REGION_VPD; |
| 60 | mb->un.varDmp.word_cnt = (DMP_RSP_SIZE / sizeof (uint32_t)); |
| 61 | mb->un.varDmp.co = 0; |
| 62 | mb->un.varDmp.resp_offset = 0; |
| 63 | pmb->context2 = ctx; |
| 64 | mb->mbxOwner = OWN_HOST; |
| 65 | return; |
| 66 | } |
| 67 | |
| 68 | /**********************************************/ |
| 69 | /* lpfc_read_nv Issue a READ NVPARAM */ |
| 70 | /* mailbox command */ |
| 71 | /**********************************************/ |
| 72 | void |
| 73 | lpfc_read_nv(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb) |
| 74 | { |
| 75 | MAILBOX_t *mb; |
| 76 | |
| 77 | mb = &pmb->mb; |
| 78 | memset(pmb, 0, sizeof (LPFC_MBOXQ_t)); |
| 79 | mb->mbxCommand = MBX_READ_NV; |
| 80 | mb->mbxOwner = OWN_HOST; |
| 81 | return; |
| 82 | } |
| 83 | |
| 84 | /**********************************************/ |
James Smart | 57127f1 | 2007-10-27 13:37:05 -0400 | [diff] [blame] | 85 | /* lpfc_config_async Issue a */ |
| 86 | /* MBX_ASYNC_EVT_ENABLE mailbox command */ |
| 87 | /**********************************************/ |
| 88 | void |
| 89 | lpfc_config_async(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb, |
| 90 | uint32_t ring) |
| 91 | { |
| 92 | MAILBOX_t *mb; |
| 93 | |
| 94 | mb = &pmb->mb; |
| 95 | memset(pmb, 0, sizeof (LPFC_MBOXQ_t)); |
| 96 | mb->mbxCommand = MBX_ASYNCEVT_ENABLE; |
| 97 | mb->un.varCfgAsyncEvent.ring = ring; |
| 98 | mb->mbxOwner = OWN_HOST; |
| 99 | return; |
| 100 | } |
| 101 | |
| 102 | /**********************************************/ |
James Smart | 858c9f6 | 2007-06-17 19:56:39 -0500 | [diff] [blame] | 103 | /* lpfc_heart_beat Issue a HEART_BEAT */ |
| 104 | /* mailbox command */ |
| 105 | /**********************************************/ |
| 106 | void |
| 107 | lpfc_heart_beat(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb) |
| 108 | { |
| 109 | MAILBOX_t *mb; |
| 110 | |
| 111 | mb = &pmb->mb; |
| 112 | memset(pmb, 0, sizeof (LPFC_MBOXQ_t)); |
| 113 | mb->mbxCommand = MBX_HEARTBEAT; |
| 114 | mb->mbxOwner = OWN_HOST; |
| 115 | return; |
| 116 | } |
| 117 | |
| 118 | /**********************************************/ |
| dea3101 | 2005-04-17 16:05:31 -0500 | [diff] [blame] | 119 | /* lpfc_read_la Issue a READ LA */ |
| 120 | /* mailbox command */ |
| 121 | /**********************************************/ |
| 122 | int |
| 123 | lpfc_read_la(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb, struct lpfc_dmabuf *mp) |
| 124 | { |
| 125 | MAILBOX_t *mb; |
| 126 | struct lpfc_sli *psli; |
| 127 | |
| 128 | psli = &phba->sli; |
| 129 | mb = &pmb->mb; |
| 130 | memset(pmb, 0, sizeof (LPFC_MBOXQ_t)); |
| 131 | |
| 132 | INIT_LIST_HEAD(&mp->list); |
| 133 | mb->mbxCommand = MBX_READ_LA64; |
| 134 | mb->un.varReadLA.un.lilpBde64.tus.f.bdeSize = 128; |
| 135 | mb->un.varReadLA.un.lilpBde64.addrHigh = putPaddrHigh(mp->phys); |
| 136 | mb->un.varReadLA.un.lilpBde64.addrLow = putPaddrLow(mp->phys); |
| 137 | |
| 138 | /* Save address for later completion and set the owner to host so that |
| 139 | * the FW knows this mailbox is available for processing. |
| 140 | */ |
| 141 | pmb->context1 = (uint8_t *) mp; |
| 142 | mb->mbxOwner = OWN_HOST; |
James Smart | 92d7f7b | 2007-06-17 19:56:38 -0500 | [diff] [blame] | 143 | return (0); |
| dea3101 | 2005-04-17 16:05:31 -0500 | [diff] [blame] | 144 | } |
| 145 | |
| 146 | /**********************************************/ |
| 147 | /* lpfc_clear_la Issue a CLEAR LA */ |
| 148 | /* mailbox command */ |
| 149 | /**********************************************/ |
| 150 | void |
| 151 | lpfc_clear_la(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb) |
| 152 | { |
| 153 | MAILBOX_t *mb; |
| 154 | |
| 155 | mb = &pmb->mb; |
| 156 | memset(pmb, 0, sizeof (LPFC_MBOXQ_t)); |
| 157 | |
| 158 | mb->un.varClearLA.eventTag = phba->fc_eventTag; |
| 159 | mb->mbxCommand = MBX_CLEAR_LA; |
| 160 | mb->mbxOwner = OWN_HOST; |
| 161 | return; |
| 162 | } |
| 163 | |
| 164 | /**************************************************/ |
| 165 | /* lpfc_config_link Issue a CONFIG LINK */ |
| 166 | /* mailbox command */ |
| 167 | /**************************************************/ |
| 168 | void |
| 169 | lpfc_config_link(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb) |
| 170 | { |
James Smart | 2e0fef8 | 2007-06-17 19:56:36 -0500 | [diff] [blame] | 171 | struct lpfc_vport *vport = phba->pport; |
| dea3101 | 2005-04-17 16:05:31 -0500 | [diff] [blame] | 172 | MAILBOX_t *mb = &pmb->mb; |
| 173 | memset(pmb, 0, sizeof (LPFC_MBOXQ_t)); |
| 174 | |
| 175 | /* NEW_FEATURE |
| 176 | * SLI-2, Coalescing Response Feature. |
| 177 | */ |
| 178 | if (phba->cfg_cr_delay) { |
| 179 | mb->un.varCfgLnk.cr = 1; |
| 180 | mb->un.varCfgLnk.ci = 1; |
| 181 | mb->un.varCfgLnk.cr_delay = phba->cfg_cr_delay; |
| 182 | mb->un.varCfgLnk.cr_count = phba->cfg_cr_count; |
| 183 | } |
| 184 | |
James Smart | 2e0fef8 | 2007-06-17 19:56:36 -0500 | [diff] [blame] | 185 | mb->un.varCfgLnk.myId = vport->fc_myDID; |
| dea3101 | 2005-04-17 16:05:31 -0500 | [diff] [blame] | 186 | mb->un.varCfgLnk.edtov = phba->fc_edtov; |
| 187 | mb->un.varCfgLnk.arbtov = phba->fc_arbtov; |
| 188 | mb->un.varCfgLnk.ratov = phba->fc_ratov; |
| 189 | mb->un.varCfgLnk.rttov = phba->fc_rttov; |
| 190 | mb->un.varCfgLnk.altov = phba->fc_altov; |
| 191 | mb->un.varCfgLnk.crtov = phba->fc_crtov; |
| 192 | mb->un.varCfgLnk.citov = phba->fc_citov; |
| 193 | |
| 194 | if (phba->cfg_ack0) |
| 195 | mb->un.varCfgLnk.ack0_enable = 1; |
| 196 | |
| 197 | mb->mbxCommand = MBX_CONFIG_LINK; |
| 198 | mb->mbxOwner = OWN_HOST; |
| 199 | return; |
| 200 | } |
| 201 | |
| 202 | /**********************************************/ |
| 203 | /* lpfc_init_link Issue an INIT LINK */ |
| 204 | /* mailbox command */ |
| 205 | /**********************************************/ |
| 206 | void |
| 207 | lpfc_init_link(struct lpfc_hba * phba, |
| 208 | LPFC_MBOXQ_t * pmb, uint32_t topology, uint32_t linkspeed) |
| 209 | { |
| 210 | lpfc_vpd_t *vpd; |
| 211 | struct lpfc_sli *psli; |
| 212 | MAILBOX_t *mb; |
| 213 | |
| 214 | mb = &pmb->mb; |
| 215 | memset(pmb, 0, sizeof (LPFC_MBOXQ_t)); |
| 216 | |
| 217 | psli = &phba->sli; |
| 218 | switch (topology) { |
| 219 | case FLAGS_TOPOLOGY_MODE_LOOP_PT: |
| 220 | mb->un.varInitLnk.link_flags = FLAGS_TOPOLOGY_MODE_LOOP; |
| 221 | mb->un.varInitLnk.link_flags |= FLAGS_TOPOLOGY_FAILOVER; |
| 222 | break; |
| 223 | case FLAGS_TOPOLOGY_MODE_PT_PT: |
| 224 | mb->un.varInitLnk.link_flags = FLAGS_TOPOLOGY_MODE_PT_PT; |
| 225 | break; |
| 226 | case FLAGS_TOPOLOGY_MODE_LOOP: |
| 227 | mb->un.varInitLnk.link_flags = FLAGS_TOPOLOGY_MODE_LOOP; |
| 228 | break; |
| 229 | case FLAGS_TOPOLOGY_MODE_PT_LOOP: |
| 230 | mb->un.varInitLnk.link_flags = FLAGS_TOPOLOGY_MODE_PT_PT; |
| 231 | mb->un.varInitLnk.link_flags |= FLAGS_TOPOLOGY_FAILOVER; |
| 232 | break; |
Jamie Wellnitz | 367c271 | 2006-02-28 19:25:32 -0500 | [diff] [blame] | 233 | case FLAGS_LOCAL_LB: |
| 234 | mb->un.varInitLnk.link_flags = FLAGS_LOCAL_LB; |
| 235 | break; |
| dea3101 | 2005-04-17 16:05:31 -0500 | [diff] [blame] | 236 | } |
| 237 | |
James Smart | 4b0b91d | 2006-04-15 11:53:00 -0400 | [diff] [blame] | 238 | /* Enable asynchronous ABTS responses from firmware */ |
| 239 | mb->un.varInitLnk.link_flags |= FLAGS_IMED_ABORT; |
| 240 | |
| dea3101 | 2005-04-17 16:05:31 -0500 | [diff] [blame] | 241 | /* NEW_FEATURE |
| 242 | * Setting up the link speed |
| 243 | */ |
| 244 | vpd = &phba->vpd; |
| 245 | if (vpd->rev.feaLevelHigh >= 0x02){ |
James Smart | 92d7f7b | 2007-06-17 19:56:38 -0500 | [diff] [blame] | 246 | switch(linkspeed){ |
| dea3101 | 2005-04-17 16:05:31 -0500 | [diff] [blame] | 247 | case LINK_SPEED_1G: |
| 248 | case LINK_SPEED_2G: |
| 249 | case LINK_SPEED_4G: |
James Smart | b87eab3 | 2007-04-25 09:53:28 -0400 | [diff] [blame] | 250 | case LINK_SPEED_8G: |
| dea3101 | 2005-04-17 16:05:31 -0500 | [diff] [blame] | 251 | mb->un.varInitLnk.link_flags |= |
| 252 | FLAGS_LINK_SPEED; |
| 253 | mb->un.varInitLnk.link_speed = linkspeed; |
| 254 | break; |
| 255 | case LINK_SPEED_AUTO: |
| 256 | default: |
| 257 | mb->un.varInitLnk.link_speed = |
| 258 | LINK_SPEED_AUTO; |
| 259 | break; |
| 260 | } |
| 261 | |
| 262 | } |
| 263 | else |
| 264 | mb->un.varInitLnk.link_speed = LINK_SPEED_AUTO; |
| 265 | |
| 266 | mb->mbxCommand = (volatile uint8_t)MBX_INIT_LINK; |
| 267 | mb->mbxOwner = OWN_HOST; |
| 268 | mb->un.varInitLnk.fabric_AL_PA = phba->fc_pref_ALPA; |
| 269 | return; |
| 270 | } |
| 271 | |
| 272 | /**********************************************/ |
| 273 | /* lpfc_read_sparam Issue a READ SPARAM */ |
| 274 | /* mailbox command */ |
| 275 | /**********************************************/ |
| 276 | int |
James Smart | 92d7f7b | 2007-06-17 19:56:38 -0500 | [diff] [blame] | 277 | lpfc_read_sparam(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb, int vpi) |
| dea3101 | 2005-04-17 16:05:31 -0500 | [diff] [blame] | 278 | { |
| 279 | struct lpfc_dmabuf *mp; |
| 280 | MAILBOX_t *mb; |
| 281 | struct lpfc_sli *psli; |
| 282 | |
| 283 | psli = &phba->sli; |
| 284 | mb = &pmb->mb; |
| 285 | memset(pmb, 0, sizeof (LPFC_MBOXQ_t)); |
| 286 | |
| 287 | mb->mbxOwner = OWN_HOST; |
| 288 | |
| 289 | /* Get a buffer to hold the HBAs Service Parameters */ |
| 290 | |
James Smart | 98c9ea5 | 2007-10-27 13:37:33 -0400 | [diff] [blame] | 291 | mp = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL); |
| 292 | if (mp) |
| 293 | mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys); |
| 294 | if (!mp || !mp->virt) { |
Jesper Juhl | c9475cb | 2005-11-07 01:01:26 -0800 | [diff] [blame] | 295 | kfree(mp); |
| dea3101 | 2005-04-17 16:05:31 -0500 | [diff] [blame] | 296 | mb->mbxCommand = MBX_READ_SPARM64; |
| 297 | /* READ_SPARAM: no buffers */ |
James Smart | e8b6201 | 2007-08-02 11:10:09 -0400 | [diff] [blame] | 298 | lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX, |
| 299 | "0301 READ_SPARAM: no buffers\n"); |
James Smart | 92d7f7b | 2007-06-17 19:56:38 -0500 | [diff] [blame] | 300 | return (1); |
| dea3101 | 2005-04-17 16:05:31 -0500 | [diff] [blame] | 301 | } |
| 302 | INIT_LIST_HEAD(&mp->list); |
| 303 | mb->mbxCommand = MBX_READ_SPARM64; |
| 304 | mb->un.varRdSparm.un.sp64.tus.f.bdeSize = sizeof (struct serv_parm); |
| 305 | mb->un.varRdSparm.un.sp64.addrHigh = putPaddrHigh(mp->phys); |
| 306 | mb->un.varRdSparm.un.sp64.addrLow = putPaddrLow(mp->phys); |
James Smart | 92d7f7b | 2007-06-17 19:56:38 -0500 | [diff] [blame] | 307 | mb->un.varRdSparm.vpi = vpi; |
| dea3101 | 2005-04-17 16:05:31 -0500 | [diff] [blame] | 308 | |
| 309 | /* save address for completion */ |
| 310 | pmb->context1 = mp; |
| 311 | |
James Smart | 92d7f7b | 2007-06-17 19:56:38 -0500 | [diff] [blame] | 312 | return (0); |
| dea3101 | 2005-04-17 16:05:31 -0500 | [diff] [blame] | 313 | } |
| 314 | |
| 315 | /********************************************/ |
| 316 | /* lpfc_unreg_did Issue a UNREG_DID */ |
| 317 | /* mailbox command */ |
| 318 | /********************************************/ |
| 319 | void |
James Smart | 92d7f7b | 2007-06-17 19:56:38 -0500 | [diff] [blame] | 320 | lpfc_unreg_did(struct lpfc_hba * phba, uint16_t vpi, uint32_t did, |
| 321 | LPFC_MBOXQ_t * pmb) |
| dea3101 | 2005-04-17 16:05:31 -0500 | [diff] [blame] | 322 | { |
| 323 | MAILBOX_t *mb; |
| 324 | |
| 325 | mb = &pmb->mb; |
| 326 | memset(pmb, 0, sizeof (LPFC_MBOXQ_t)); |
| 327 | |
| 328 | mb->un.varUnregDID.did = did; |
James Smart | 92d7f7b | 2007-06-17 19:56:38 -0500 | [diff] [blame] | 329 | mb->un.varUnregDID.vpi = vpi; |
| dea3101 | 2005-04-17 16:05:31 -0500 | [diff] [blame] | 330 | |
| 331 | mb->mbxCommand = MBX_UNREG_D_ID; |
| 332 | mb->mbxOwner = OWN_HOST; |
| 333 | return; |
| 334 | } |
| 335 | |
| dea3101 | 2005-04-17 16:05:31 -0500 | [diff] [blame] | 336 | /**********************************************/ |
| 337 | /* lpfc_read_nv Issue a READ CONFIG */ |
| 338 | /* mailbox command */ |
| 339 | /**********************************************/ |
| 340 | void |
| 341 | lpfc_read_config(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb) |
| 342 | { |
| 343 | MAILBOX_t *mb; |
| 344 | |
| 345 | mb = &pmb->mb; |
| 346 | memset(pmb, 0, sizeof (LPFC_MBOXQ_t)); |
| 347 | |
| 348 | mb->mbxCommand = MBX_READ_CONFIG; |
| 349 | mb->mbxOwner = OWN_HOST; |
| 350 | return; |
| 351 | } |
| 352 | |
Jamie Wellnitz | 7bb3b13 | 2006-02-28 19:25:15 -0500 | [diff] [blame] | 353 | /*************************************************/ |
| 354 | /* lpfc_read_lnk_stat Issue a READ LINK STATUS */ |
| 355 | /* mailbox command */ |
| 356 | /*************************************************/ |
| 357 | void |
| 358 | lpfc_read_lnk_stat(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb) |
| 359 | { |
| 360 | MAILBOX_t *mb; |
| 361 | |
| 362 | mb = &pmb->mb; |
| 363 | memset(pmb, 0, sizeof (LPFC_MBOXQ_t)); |
| 364 | |
| 365 | mb->mbxCommand = MBX_READ_LNK_STAT; |
| 366 | mb->mbxOwner = OWN_HOST; |
| 367 | return; |
| 368 | } |
| 369 | |
| dea3101 | 2005-04-17 16:05:31 -0500 | [diff] [blame] | 370 | /********************************************/ |
| 371 | /* lpfc_reg_login Issue a REG_LOGIN */ |
| 372 | /* mailbox command */ |
| 373 | /********************************************/ |
| 374 | int |
James Smart | 92d7f7b | 2007-06-17 19:56:38 -0500 | [diff] [blame] | 375 | lpfc_reg_login(struct lpfc_hba *phba, uint16_t vpi, uint32_t did, |
| 376 | uint8_t *param, LPFC_MBOXQ_t *pmb, uint32_t flag) |
| dea3101 | 2005-04-17 16:05:31 -0500 | [diff] [blame] | 377 | { |
James Smart | 2e0fef8 | 2007-06-17 19:56:36 -0500 | [diff] [blame] | 378 | MAILBOX_t *mb = &pmb->mb; |
| dea3101 | 2005-04-17 16:05:31 -0500 | [diff] [blame] | 379 | uint8_t *sparam; |
| 380 | struct lpfc_dmabuf *mp; |
| dea3101 | 2005-04-17 16:05:31 -0500 | [diff] [blame] | 381 | |
| dea3101 | 2005-04-17 16:05:31 -0500 | [diff] [blame] | 382 | memset(pmb, 0, sizeof (LPFC_MBOXQ_t)); |
| 383 | |
| 384 | mb->un.varRegLogin.rpi = 0; |
James Smart | 92d7f7b | 2007-06-17 19:56:38 -0500 | [diff] [blame] | 385 | mb->un.varRegLogin.vpi = vpi; |
| dea3101 | 2005-04-17 16:05:31 -0500 | [diff] [blame] | 386 | mb->un.varRegLogin.did = did; |
| 387 | mb->un.varWords[30] = flag; /* Set flag to issue action on cmpl */ |
| 388 | |
| 389 | mb->mbxOwner = OWN_HOST; |
| 390 | |
| 391 | /* Get a buffer to hold NPorts Service Parameters */ |
James Smart | 98c9ea5 | 2007-10-27 13:37:33 -0400 | [diff] [blame] | 392 | mp = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL); |
| 393 | if (mp) |
| 394 | mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys); |
| 395 | if (!mp || !mp->virt) { |
Jesper Juhl | c9475cb | 2005-11-07 01:01:26 -0800 | [diff] [blame] | 396 | kfree(mp); |
| dea3101 | 2005-04-17 16:05:31 -0500 | [diff] [blame] | 397 | mb->mbxCommand = MBX_REG_LOGIN64; |
| 398 | /* REG_LOGIN: no buffers */ |
James Smart | 92d7f7b | 2007-06-17 19:56:38 -0500 | [diff] [blame] | 399 | lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX, |
James Smart | e8b6201 | 2007-08-02 11:10:09 -0400 | [diff] [blame] | 400 | "0302 REG_LOGIN: no buffers, VPI:%d DID:x%x, " |
| 401 | "flag x%x\n", vpi, did, flag); |
James Smart | 92d7f7b | 2007-06-17 19:56:38 -0500 | [diff] [blame] | 402 | return (1); |
| dea3101 | 2005-04-17 16:05:31 -0500 | [diff] [blame] | 403 | } |
| 404 | INIT_LIST_HEAD(&mp->list); |
| 405 | sparam = mp->virt; |
| 406 | |
| 407 | /* Copy param's into a new buffer */ |
| 408 | memcpy(sparam, param, sizeof (struct serv_parm)); |
| 409 | |
| 410 | /* save address for completion */ |
| 411 | pmb->context1 = (uint8_t *) mp; |
| 412 | |
| 413 | mb->mbxCommand = MBX_REG_LOGIN64; |
| 414 | mb->un.varRegLogin.un.sp64.tus.f.bdeSize = sizeof (struct serv_parm); |
| 415 | mb->un.varRegLogin.un.sp64.addrHigh = putPaddrHigh(mp->phys); |
| 416 | mb->un.varRegLogin.un.sp64.addrLow = putPaddrLow(mp->phys); |
| 417 | |
James Smart | 92d7f7b | 2007-06-17 19:56:38 -0500 | [diff] [blame] | 418 | return (0); |
| dea3101 | 2005-04-17 16:05:31 -0500 | [diff] [blame] | 419 | } |
| 420 | |
| 421 | /**********************************************/ |
| 422 | /* lpfc_unreg_login Issue a UNREG_LOGIN */ |
| 423 | /* mailbox command */ |
| 424 | /**********************************************/ |
| 425 | void |
James Smart | 92d7f7b | 2007-06-17 19:56:38 -0500 | [diff] [blame] | 426 | lpfc_unreg_login(struct lpfc_hba *phba, uint16_t vpi, uint32_t rpi, |
| 427 | LPFC_MBOXQ_t * pmb) |
| dea3101 | 2005-04-17 16:05:31 -0500 | [diff] [blame] | 428 | { |
| 429 | MAILBOX_t *mb; |
| 430 | |
| 431 | mb = &pmb->mb; |
| 432 | memset(pmb, 0, sizeof (LPFC_MBOXQ_t)); |
| 433 | |
| 434 | mb->un.varUnregLogin.rpi = (uint16_t) rpi; |
| 435 | mb->un.varUnregLogin.rsvd1 = 0; |
James Smart | 92d7f7b | 2007-06-17 19:56:38 -0500 | [diff] [blame] | 436 | mb->un.varUnregLogin.vpi = vpi; |
| dea3101 | 2005-04-17 16:05:31 -0500 | [diff] [blame] | 437 | |
| 438 | mb->mbxCommand = MBX_UNREG_LOGIN; |
| 439 | mb->mbxOwner = OWN_HOST; |
| 440 | return; |
| 441 | } |
| 442 | |
James Smart | 92d7f7b | 2007-06-17 19:56:38 -0500 | [diff] [blame] | 443 | /**************************************************/ |
| 444 | /* lpfc_reg_vpi Issue a REG_VPI */ |
| 445 | /* mailbox command */ |
| 446 | /**************************************************/ |
| 447 | void |
| 448 | lpfc_reg_vpi(struct lpfc_hba *phba, uint16_t vpi, uint32_t sid, |
| 449 | LPFC_MBOXQ_t *pmb) |
| 450 | { |
| 451 | MAILBOX_t *mb = &pmb->mb; |
| 452 | |
| 453 | memset(pmb, 0, sizeof (LPFC_MBOXQ_t)); |
| 454 | |
| 455 | mb->un.varRegVpi.vpi = vpi; |
| 456 | mb->un.varRegVpi.sid = sid; |
| 457 | |
| 458 | mb->mbxCommand = MBX_REG_VPI; |
| 459 | mb->mbxOwner = OWN_HOST; |
| 460 | return; |
| 461 | |
| 462 | } |
| 463 | |
| 464 | /**************************************************/ |
| 465 | /* lpfc_unreg_vpi Issue a UNREG_VNPI */ |
| 466 | /* mailbox command */ |
| 467 | /**************************************************/ |
| 468 | void |
| 469 | lpfc_unreg_vpi(struct lpfc_hba *phba, uint16_t vpi, LPFC_MBOXQ_t *pmb) |
| 470 | { |
| 471 | MAILBOX_t *mb = &pmb->mb; |
| 472 | memset(pmb, 0, sizeof (LPFC_MBOXQ_t)); |
| 473 | |
| 474 | mb->un.varUnregVpi.vpi = vpi; |
| 475 | |
| 476 | mb->mbxCommand = MBX_UNREG_VPI; |
| 477 | mb->mbxOwner = OWN_HOST; |
| 478 | return; |
| 479 | |
| 480 | } |
| 481 | |
| dea3101 | 2005-04-17 16:05:31 -0500 | [diff] [blame] | 482 | static void |
| 483 | lpfc_config_pcb_setup(struct lpfc_hba * phba) |
| 484 | { |
| 485 | struct lpfc_sli *psli = &phba->sli; |
| 486 | struct lpfc_sli_ring *pring; |
| 487 | PCB_t *pcbp = &phba->slim2p->pcb; |
| 488 | dma_addr_t pdma_addr; |
| 489 | uint32_t offset; |
James Smart | 2e0fef8 | 2007-06-17 19:56:36 -0500 | [diff] [blame] | 490 | uint32_t iocbCnt = 0; |
| dea3101 | 2005-04-17 16:05:31 -0500 | [diff] [blame] | 491 | int i; |
| 492 | |
| dea3101 | 2005-04-17 16:05:31 -0500 | [diff] [blame] | 493 | pcbp->maxRing = (psli->num_rings - 1); |
| 494 | |
| dea3101 | 2005-04-17 16:05:31 -0500 | [diff] [blame] | 495 | for (i = 0; i < psli->num_rings; i++) { |
| 496 | pring = &psli->ring[i]; |
James Smart | 2e0fef8 | 2007-06-17 19:56:36 -0500 | [diff] [blame] | 497 | |
James Smart | ed95768 | 2007-06-17 19:56:37 -0500 | [diff] [blame] | 498 | pring->sizeCiocb = phba->sli_rev == 3 ? SLI3_IOCB_CMD_SIZE: |
James Smart | 92d7f7b | 2007-06-17 19:56:38 -0500 | [diff] [blame] | 499 | SLI2_IOCB_CMD_SIZE; |
James Smart | ed95768 | 2007-06-17 19:56:37 -0500 | [diff] [blame] | 500 | pring->sizeRiocb = phba->sli_rev == 3 ? SLI3_IOCB_RSP_SIZE: |
James Smart | 92d7f7b | 2007-06-17 19:56:38 -0500 | [diff] [blame] | 501 | SLI2_IOCB_RSP_SIZE; |
| dea3101 | 2005-04-17 16:05:31 -0500 | [diff] [blame] | 502 | /* A ring MUST have both cmd and rsp entries defined to be |
| 503 | valid */ |
| 504 | if ((pring->numCiocb == 0) || (pring->numRiocb == 0)) { |
| 505 | pcbp->rdsc[i].cmdEntries = 0; |
| 506 | pcbp->rdsc[i].rspEntries = 0; |
| 507 | pcbp->rdsc[i].cmdAddrHigh = 0; |
| 508 | pcbp->rdsc[i].rspAddrHigh = 0; |
| 509 | pcbp->rdsc[i].cmdAddrLow = 0; |
| 510 | pcbp->rdsc[i].rspAddrLow = 0; |
| 511 | pring->cmdringaddr = NULL; |
| 512 | pring->rspringaddr = NULL; |
| 513 | continue; |
| 514 | } |
| 515 | /* Command ring setup for ring */ |
James Smart | 92d7f7b | 2007-06-17 19:56:38 -0500 | [diff] [blame] | 516 | pring->cmdringaddr = (void *) &phba->slim2p->IOCBs[iocbCnt]; |
| dea3101 | 2005-04-17 16:05:31 -0500 | [diff] [blame] | 517 | pcbp->rdsc[i].cmdEntries = pring->numCiocb; |
| 518 | |
James Smart | 92d7f7b | 2007-06-17 19:56:38 -0500 | [diff] [blame] | 519 | offset = (uint8_t *) &phba->slim2p->IOCBs[iocbCnt] - |
| 520 | (uint8_t *) phba->slim2p; |
| dea3101 | 2005-04-17 16:05:31 -0500 | [diff] [blame] | 521 | pdma_addr = phba->slim2p_mapping + offset; |
| 522 | pcbp->rdsc[i].cmdAddrHigh = putPaddrHigh(pdma_addr); |
| 523 | pcbp->rdsc[i].cmdAddrLow = putPaddrLow(pdma_addr); |
| 524 | iocbCnt += pring->numCiocb; |
| 525 | |
| 526 | /* Response ring setup for ring */ |
James Smart | 92d7f7b | 2007-06-17 19:56:38 -0500 | [diff] [blame] | 527 | pring->rspringaddr = (void *) &phba->slim2p->IOCBs[iocbCnt]; |
| dea3101 | 2005-04-17 16:05:31 -0500 | [diff] [blame] | 528 | |
| 529 | pcbp->rdsc[i].rspEntries = pring->numRiocb; |
| 530 | offset = (uint8_t *)&phba->slim2p->IOCBs[iocbCnt] - |
| 531 | (uint8_t *)phba->slim2p; |
| 532 | pdma_addr = phba->slim2p_mapping + offset; |
| 533 | pcbp->rdsc[i].rspAddrHigh = putPaddrHigh(pdma_addr); |
| 534 | pcbp->rdsc[i].rspAddrLow = putPaddrLow(pdma_addr); |
| 535 | iocbCnt += pring->numRiocb; |
| 536 | } |
| 537 | } |
| 538 | |
| 539 | void |
| 540 | lpfc_read_rev(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb) |
| 541 | { |
James Smart | 2e0fef8 | 2007-06-17 19:56:36 -0500 | [diff] [blame] | 542 | MAILBOX_t *mb = &pmb->mb; |
| dea3101 | 2005-04-17 16:05:31 -0500 | [diff] [blame] | 543 | memset(pmb, 0, sizeof (LPFC_MBOXQ_t)); |
| 544 | mb->un.varRdRev.cv = 1; |
James Smart | ed95768 | 2007-06-17 19:56:37 -0500 | [diff] [blame] | 545 | mb->un.varRdRev.v3req = 1; /* Request SLI3 info */ |
| dea3101 | 2005-04-17 16:05:31 -0500 | [diff] [blame] | 546 | mb->mbxCommand = MBX_READ_REV; |
| 547 | mb->mbxOwner = OWN_HOST; |
| 548 | return; |
| 549 | } |
| 550 | |
James Smart | ed95768 | 2007-06-17 19:56:37 -0500 | [diff] [blame] | 551 | static void |
| 552 | lpfc_build_hbq_profile2(struct config_hbq_var *hbqmb, |
| 553 | struct lpfc_hbq_init *hbq_desc) |
| 554 | { |
| 555 | hbqmb->profiles.profile2.seqlenbcnt = hbq_desc->seqlenbcnt; |
| 556 | hbqmb->profiles.profile2.maxlen = hbq_desc->maxlen; |
| 557 | hbqmb->profiles.profile2.seqlenoff = hbq_desc->seqlenoff; |
| 558 | } |
| 559 | |
| 560 | static void |
| 561 | lpfc_build_hbq_profile3(struct config_hbq_var *hbqmb, |
| 562 | struct lpfc_hbq_init *hbq_desc) |
| 563 | { |
| 564 | hbqmb->profiles.profile3.seqlenbcnt = hbq_desc->seqlenbcnt; |
| 565 | hbqmb->profiles.profile3.maxlen = hbq_desc->maxlen; |
| 566 | hbqmb->profiles.profile3.cmdcodeoff = hbq_desc->cmdcodeoff; |
| 567 | hbqmb->profiles.profile3.seqlenoff = hbq_desc->seqlenoff; |
| 568 | memcpy(&hbqmb->profiles.profile3.cmdmatch, hbq_desc->cmdmatch, |
| 569 | sizeof(hbqmb->profiles.profile3.cmdmatch)); |
| 570 | } |
| 571 | |
| 572 | static void |
| 573 | lpfc_build_hbq_profile5(struct config_hbq_var *hbqmb, |
| 574 | struct lpfc_hbq_init *hbq_desc) |
| 575 | { |
| 576 | hbqmb->profiles.profile5.seqlenbcnt = hbq_desc->seqlenbcnt; |
| 577 | hbqmb->profiles.profile5.maxlen = hbq_desc->maxlen; |
| 578 | hbqmb->profiles.profile5.cmdcodeoff = hbq_desc->cmdcodeoff; |
| 579 | hbqmb->profiles.profile5.seqlenoff = hbq_desc->seqlenoff; |
| 580 | memcpy(&hbqmb->profiles.profile5.cmdmatch, hbq_desc->cmdmatch, |
| 581 | sizeof(hbqmb->profiles.profile5.cmdmatch)); |
| 582 | } |
| 583 | |
| 584 | void |
James Smart | 51ef4c2 | 2007-08-02 11:10:31 -0400 | [diff] [blame] | 585 | lpfc_config_hbq(struct lpfc_hba *phba, uint32_t id, |
| 586 | struct lpfc_hbq_init *hbq_desc, |
James Smart | ed95768 | 2007-06-17 19:56:37 -0500 | [diff] [blame] | 587 | uint32_t hbq_entry_index, LPFC_MBOXQ_t *pmb) |
| 588 | { |
| 589 | int i; |
| 590 | MAILBOX_t *mb = &pmb->mb; |
| 591 | struct config_hbq_var *hbqmb = &mb->un.varCfgHbq; |
| 592 | |
| 593 | memset(pmb, 0, sizeof (LPFC_MBOXQ_t)); |
James Smart | 51ef4c2 | 2007-08-02 11:10:31 -0400 | [diff] [blame] | 594 | hbqmb->hbqId = id; |
James Smart | ed95768 | 2007-06-17 19:56:37 -0500 | [diff] [blame] | 595 | hbqmb->entry_count = hbq_desc->entry_count; /* # entries in HBQ */ |
| 596 | hbqmb->recvNotify = hbq_desc->rn; /* Receive |
| 597 | * Notification */ |
| 598 | hbqmb->numMask = hbq_desc->mask_count; /* # R_CTL/TYPE masks |
| 599 | * # in words 0-19 */ |
James Smart | 92d7f7b | 2007-06-17 19:56:38 -0500 | [diff] [blame] | 600 | hbqmb->profile = hbq_desc->profile; /* Selection profile: |
James Smart | ed95768 | 2007-06-17 19:56:37 -0500 | [diff] [blame] | 601 | * 0 = all, |
| 602 | * 7 = logentry */ |
| 603 | hbqmb->ringMask = hbq_desc->ring_mask; /* Binds HBQ to a ring |
| 604 | * e.g. Ring0=b0001, |
| 605 | * ring2=b0100 */ |
| 606 | hbqmb->headerLen = hbq_desc->headerLen; /* 0 if not profile 4 |
| 607 | * or 5 */ |
| 608 | hbqmb->logEntry = hbq_desc->logEntry; /* Set to 1 if this |
| 609 | * HBQ will be used |
| 610 | * for LogEntry |
| 611 | * buffers */ |
| 612 | hbqmb->hbqaddrLow = putPaddrLow(phba->hbqslimp.phys) + |
| 613 | hbq_entry_index * sizeof(struct lpfc_hbq_entry); |
| 614 | hbqmb->hbqaddrHigh = putPaddrHigh(phba->hbqslimp.phys); |
| 615 | |
| 616 | mb->mbxCommand = MBX_CONFIG_HBQ; |
| 617 | mb->mbxOwner = OWN_HOST; |
| 618 | |
James Smart | 92d7f7b | 2007-06-17 19:56:38 -0500 | [diff] [blame] | 619 | /* Copy info for profiles 2,3,5. Other |
| 620 | * profiles this area is reserved |
| 621 | */ |
James Smart | ed95768 | 2007-06-17 19:56:37 -0500 | [diff] [blame] | 622 | if (hbq_desc->profile == 2) |
| 623 | lpfc_build_hbq_profile2(hbqmb, hbq_desc); |
| 624 | else if (hbq_desc->profile == 3) |
| 625 | lpfc_build_hbq_profile3(hbqmb, hbq_desc); |
| 626 | else if (hbq_desc->profile == 5) |
| 627 | lpfc_build_hbq_profile5(hbqmb, hbq_desc); |
| 628 | |
| 629 | /* Return if no rctl / type masks for this HBQ */ |
| 630 | if (!hbq_desc->mask_count) |
| 631 | return; |
| 632 | |
| 633 | /* Otherwise we setup specific rctl / type masks for this HBQ */ |
| 634 | for (i = 0; i < hbq_desc->mask_count; i++) { |
| 635 | hbqmb->hbqMasks[i].tmatch = hbq_desc->hbqMasks[i].tmatch; |
| 636 | hbqmb->hbqMasks[i].tmask = hbq_desc->hbqMasks[i].tmask; |
| 637 | hbqmb->hbqMasks[i].rctlmatch = hbq_desc->hbqMasks[i].rctlmatch; |
| 638 | hbqmb->hbqMasks[i].rctlmask = hbq_desc->hbqMasks[i].rctlmask; |
| 639 | } |
| 640 | |
| 641 | return; |
| 642 | } |
| 643 | |
James Smart | 92d7f7b | 2007-06-17 19:56:38 -0500 | [diff] [blame] | 644 | |
| 645 | |
| dea3101 | 2005-04-17 16:05:31 -0500 | [diff] [blame] | 646 | void |
| 647 | lpfc_config_ring(struct lpfc_hba * phba, int ring, LPFC_MBOXQ_t * pmb) |
| 648 | { |
| 649 | int i; |
| 650 | MAILBOX_t *mb = &pmb->mb; |
| 651 | struct lpfc_sli *psli; |
| 652 | struct lpfc_sli_ring *pring; |
| 653 | |
| 654 | memset(pmb, 0, sizeof (LPFC_MBOXQ_t)); |
| 655 | |
| 656 | mb->un.varCfgRing.ring = ring; |
| 657 | mb->un.varCfgRing.maxOrigXchg = 0; |
| 658 | mb->un.varCfgRing.maxRespXchg = 0; |
| 659 | mb->un.varCfgRing.recvNotify = 1; |
| 660 | |
| 661 | psli = &phba->sli; |
| 662 | pring = &psli->ring[ring]; |
| 663 | mb->un.varCfgRing.numMask = pring->num_mask; |
| 664 | mb->mbxCommand = MBX_CONFIG_RING; |
| 665 | mb->mbxOwner = OWN_HOST; |
| 666 | |
| 667 | /* Is this ring configured for a specific profile */ |
| 668 | if (pring->prt[0].profile) { |
| 669 | mb->un.varCfgRing.profile = pring->prt[0].profile; |
| 670 | return; |
| 671 | } |
| 672 | |
| 673 | /* Otherwise we setup specific rctl / type masks for this ring */ |
| 674 | for (i = 0; i < pring->num_mask; i++) { |
| 675 | mb->un.varCfgRing.rrRegs[i].rval = pring->prt[i].rctl; |
| 676 | if (mb->un.varCfgRing.rrRegs[i].rval != FC_ELS_REQ) |
| 677 | mb->un.varCfgRing.rrRegs[i].rmask = 0xff; |
| 678 | else |
| 679 | mb->un.varCfgRing.rrRegs[i].rmask = 0xfe; |
| 680 | mb->un.varCfgRing.rrRegs[i].tval = pring->prt[i].type; |
| 681 | mb->un.varCfgRing.rrRegs[i].tmask = 0xff; |
| 682 | } |
| 683 | |
| 684 | return; |
| 685 | } |
| 686 | |
| 687 | void |
James Smart | 92d7f7b | 2007-06-17 19:56:38 -0500 | [diff] [blame] | 688 | lpfc_config_port(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb) |
| dea3101 | 2005-04-17 16:05:31 -0500 | [diff] [blame] | 689 | { |
James Smart | ed95768 | 2007-06-17 19:56:37 -0500 | [diff] [blame] | 690 | MAILBOX_t __iomem *mb_slim = (MAILBOX_t __iomem *) phba->MBslimaddr; |
| dea3101 | 2005-04-17 16:05:31 -0500 | [diff] [blame] | 691 | MAILBOX_t *mb = &pmb->mb; |
| 692 | dma_addr_t pdma_addr; |
| 693 | uint32_t bar_low, bar_high; |
| 694 | size_t offset; |
James.Smart@Emulex.Com | 4cc2da1 | 2005-06-25 10:34:00 -0400 | [diff] [blame] | 695 | struct lpfc_hgp hgp; |
James.Smart@Emulex.Com | f91b392 | 2005-10-28 20:29:28 -0400 | [diff] [blame] | 696 | int i; |
James Smart | ed95768 | 2007-06-17 19:56:37 -0500 | [diff] [blame] | 697 | uint32_t pgp_offset; |
| dea3101 | 2005-04-17 16:05:31 -0500 | [diff] [blame] | 698 | |
| 699 | memset(pmb, 0, sizeof(LPFC_MBOXQ_t)); |
| 700 | mb->mbxCommand = MBX_CONFIG_PORT; |
| 701 | mb->mbxOwner = OWN_HOST; |
| 702 | |
| 703 | mb->un.varCfgPort.pcbLen = sizeof(PCB_t); |
| 704 | |
| 705 | offset = (uint8_t *)&phba->slim2p->pcb - (uint8_t *)phba->slim2p; |
| 706 | pdma_addr = phba->slim2p_mapping + offset; |
| 707 | mb->un.varCfgPort.pcbLow = putPaddrLow(pdma_addr); |
| 708 | mb->un.varCfgPort.pcbHigh = putPaddrHigh(pdma_addr); |
| 709 | |
James Smart | ed95768 | 2007-06-17 19:56:37 -0500 | [diff] [blame] | 710 | /* If HBA supports SLI=3 ask for it */ |
| 711 | |
James Smart | 92d7f7b | 2007-06-17 19:56:38 -0500 | [diff] [blame] | 712 | if (phba->sli_rev == 3 && phba->vpd.sli3Feat.cerbm) { |
James Smart | ed95768 | 2007-06-17 19:56:37 -0500 | [diff] [blame] | 713 | mb->un.varCfgPort.cerbm = 1; /* Request HBQs */ |
James Smart | 51ef4c2 | 2007-08-02 11:10:31 -0400 | [diff] [blame] | 714 | mb->un.varCfgPort.max_hbq = lpfc_sli_hbq_count(); |
James Smart | 78b2d85 | 2007-08-02 11:10:21 -0400 | [diff] [blame] | 715 | if (phba->max_vpi && phba->cfg_enable_npiv && |
James Smart | 92d7f7b | 2007-06-17 19:56:38 -0500 | [diff] [blame] | 716 | phba->vpd.sli3Feat.cmv) { |
| 717 | mb->un.varCfgPort.max_vpi = phba->max_vpi; |
| 718 | mb->un.varCfgPort.cmv = 1; |
| 719 | phba->sli3_options |= LPFC_SLI3_NPIV_ENABLED; |
| 720 | } else |
| 721 | mb->un.varCfgPort.max_vpi = phba->max_vpi = 0; |
| 722 | } else |
| 723 | phba->sli_rev = 2; |
| 724 | mb->un.varCfgPort.sli_mode = phba->sli_rev; |
James Smart | ed95768 | 2007-06-17 19:56:37 -0500 | [diff] [blame] | 725 | |
| dea3101 | 2005-04-17 16:05:31 -0500 | [diff] [blame] | 726 | /* Now setup pcb */ |
| 727 | phba->slim2p->pcb.type = TYPE_NATIVE_SLI2; |
| 728 | phba->slim2p->pcb.feature = FEATURE_INITIAL_SLI2; |
| 729 | |
| 730 | /* Setup Mailbox pointers */ |
James Smart | ed95768 | 2007-06-17 19:56:37 -0500 | [diff] [blame] | 731 | phba->slim2p->pcb.mailBoxSize = offsetof(MAILBOX_t, us) + |
| 732 | sizeof(struct sli2_desc); |
| dea3101 | 2005-04-17 16:05:31 -0500 | [diff] [blame] | 733 | offset = (uint8_t *)&phba->slim2p->mbx - (uint8_t *)phba->slim2p; |
| 734 | pdma_addr = phba->slim2p_mapping + offset; |
| 735 | phba->slim2p->pcb.mbAddrHigh = putPaddrHigh(pdma_addr); |
| 736 | phba->slim2p->pcb.mbAddrLow = putPaddrLow(pdma_addr); |
| 737 | |
| 738 | /* |
| 739 | * Setup Host Group ring pointer. |
| 740 | * |
| 741 | * For efficiency reasons, the ring get/put pointers can be |
| 742 | * placed in adapter memory (SLIM) rather than in host memory. |
| 743 | * This allows firmware to avoid PCI reads/writes when updating |
| 744 | * and checking pointers. |
| 745 | * |
| 746 | * The firmware recognizes the use of SLIM memory by comparing |
| 747 | * the address of the get/put pointers structure with that of |
| 748 | * the SLIM BAR (BAR0). |
| 749 | * |
| 750 | * Caution: be sure to use the PCI config space value of BAR0/BAR1 |
| 751 | * (the hardware's view of the base address), not the OS's |
| 752 | * value of pci_resource_start() as the OS value may be a cookie |
| 753 | * for ioremap/iomap. |
| 754 | */ |
| 755 | |
| 756 | |
| 757 | pci_read_config_dword(phba->pcidev, PCI_BASE_ADDRESS_0, &bar_low); |
| 758 | pci_read_config_dword(phba->pcidev, PCI_BASE_ADDRESS_1, &bar_high); |
| 759 | |
James Smart | ed95768 | 2007-06-17 19:56:37 -0500 | [diff] [blame] | 760 | /* |
| 761 | * Set up HGP - Port Memory |
| 762 | * |
| 763 | * The port expects the host get/put pointers to reside in memory |
| 764 | * following the "non-diagnostic" mode mailbox (32 words, 0x80 bytes) |
| 765 | * area of SLIM. In SLI-2 mode, there's an additional 16 reserved |
| 766 | * words (0x40 bytes). This area is not reserved if HBQs are |
| 767 | * configured in SLI-3. |
| 768 | * |
| 769 | * CR0Put - SLI2(no HBQs) = 0xc0, With HBQs = 0x80 |
| 770 | * RR0Get 0xc4 0x84 |
| 771 | * CR1Put 0xc8 0x88 |
| 772 | * RR1Get 0xcc 0x8c |
| 773 | * CR2Put 0xd0 0x90 |
| 774 | * RR2Get 0xd4 0x94 |
| 775 | * CR3Put 0xd8 0x98 |
| 776 | * RR3Get 0xdc 0x9c |
| 777 | * |
| 778 | * Reserved 0xa0-0xbf |
| 779 | * If HBQs configured: |
| 780 | * HBQ 0 Put ptr 0xc0 |
| 781 | * HBQ 1 Put ptr 0xc4 |
| 782 | * HBQ 2 Put ptr 0xc8 |
| 783 | * ...... |
| 784 | * HBQ(M-1)Put Pointer 0xc0+(M-1)*4 |
| 785 | * |
| 786 | */ |
| 787 | |
| 788 | if (phba->sli_rev == 3) { |
| 789 | phba->host_gp = &mb_slim->us.s3.host[0]; |
| 790 | phba->hbq_put = &mb_slim->us.s3.hbq_put[0]; |
| 791 | } else { |
| 792 | phba->host_gp = &mb_slim->us.s2.host[0]; |
| 793 | phba->hbq_put = NULL; |
| 794 | } |
| dea3101 | 2005-04-17 16:05:31 -0500 | [diff] [blame] | 795 | |
| 796 | /* mask off BAR0's flag bits 0 - 3 */ |
| 797 | phba->slim2p->pcb.hgpAddrLow = (bar_low & PCI_BASE_ADDRESS_MEM_MASK) + |
James Smart | ed95768 | 2007-06-17 19:56:37 -0500 | [diff] [blame] | 798 | (void __iomem *) phba->host_gp - |
| 799 | (void __iomem *)phba->MBslimaddr; |
| dea3101 | 2005-04-17 16:05:31 -0500 | [diff] [blame] | 800 | if (bar_low & PCI_BASE_ADDRESS_MEM_TYPE_64) |
| 801 | phba->slim2p->pcb.hgpAddrHigh = bar_high; |
| 802 | else |
| 803 | phba->slim2p->pcb.hgpAddrHigh = 0; |
| 804 | /* write HGP data to SLIM at the required longword offset */ |
James.Smart@Emulex.Com | 4cc2da1 | 2005-06-25 10:34:00 -0400 | [diff] [blame] | 805 | memset(&hgp, 0, sizeof(struct lpfc_hgp)); |
James.Smart@Emulex.Com | f91b392 | 2005-10-28 20:29:28 -0400 | [diff] [blame] | 806 | |
| 807 | for (i=0; i < phba->sli.num_rings; i++) { |
James Smart | ed95768 | 2007-06-17 19:56:37 -0500 | [diff] [blame] | 808 | lpfc_memcpy_to_slim(phba->host_gp + i, &hgp, |
| 809 | sizeof(*phba->host_gp)); |
James.Smart@Emulex.Com | f91b392 | 2005-10-28 20:29:28 -0400 | [diff] [blame] | 810 | } |
| dea3101 | 2005-04-17 16:05:31 -0500 | [diff] [blame] | 811 | |
| 812 | /* Setup Port Group ring pointer */ |
James Smart | ed95768 | 2007-06-17 19:56:37 -0500 | [diff] [blame] | 813 | if (phba->sli_rev == 3) |
| 814 | pgp_offset = (uint8_t *)&phba->slim2p->mbx.us.s3_pgp.port - |
| 815 | (uint8_t *)phba->slim2p; |
| 816 | else |
| 817 | pgp_offset = (uint8_t *)&phba->slim2p->mbx.us.s2.port - |
| 818 | (uint8_t *)phba->slim2p; |
| 819 | |
| 820 | pdma_addr = phba->slim2p_mapping + pgp_offset; |
| dea3101 | 2005-04-17 16:05:31 -0500 | [diff] [blame] | 821 | phba->slim2p->pcb.pgpAddrHigh = putPaddrHigh(pdma_addr); |
| 822 | phba->slim2p->pcb.pgpAddrLow = putPaddrLow(pdma_addr); |
James Smart | ed95768 | 2007-06-17 19:56:37 -0500 | [diff] [blame] | 823 | phba->hbq_get = &phba->slim2p->mbx.us.s3_pgp.hbq_get[0]; |
| dea3101 | 2005-04-17 16:05:31 -0500 | [diff] [blame] | 824 | |
| 825 | /* Use callback routine to setp rings in the pcb */ |
| 826 | lpfc_config_pcb_setup(phba); |
| 827 | |
| 828 | /* special handling for LC HBAs */ |
| 829 | if (lpfc_is_LC_HBA(phba->pcidev->device)) { |
| 830 | uint32_t hbainit[5]; |
| 831 | |
| 832 | lpfc_hba_init(phba, hbainit); |
| 833 | |
| 834 | memcpy(&mb->un.varCfgPort.hbainit, hbainit, 20); |
| 835 | } |
| 836 | |
| 837 | /* Swap PCB if needed */ |
| 838 | lpfc_sli_pcimem_bcopy(&phba->slim2p->pcb, &phba->slim2p->pcb, |
James Smart | 92d7f7b | 2007-06-17 19:56:38 -0500 | [diff] [blame] | 839 | sizeof(PCB_t)); |
| dea3101 | 2005-04-17 16:05:31 -0500 | [diff] [blame] | 840 | } |
| 841 | |
| 842 | void |
Jamie Wellnitz | 4141586 | 2006-02-28 19:25:27 -0500 | [diff] [blame] | 843 | lpfc_kill_board(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb) |
| 844 | { |
| 845 | MAILBOX_t *mb = &pmb->mb; |
| 846 | |
| 847 | memset(pmb, 0, sizeof(LPFC_MBOXQ_t)); |
| 848 | mb->mbxCommand = MBX_KILL_BOARD; |
| 849 | mb->mbxOwner = OWN_HOST; |
| 850 | return; |
| 851 | } |
| 852 | |
| 853 | void |
| dea3101 | 2005-04-17 16:05:31 -0500 | [diff] [blame] | 854 | lpfc_mbox_put(struct lpfc_hba * phba, LPFC_MBOXQ_t * mbq) |
| 855 | { |
| 856 | struct lpfc_sli *psli; |
| 857 | |
| 858 | psli = &phba->sli; |
| 859 | |
| 860 | list_add_tail(&mbq->list, &psli->mboxq); |
| 861 | |
| 862 | psli->mboxq_cnt++; |
| 863 | |
| 864 | return; |
| 865 | } |
| 866 | |
| 867 | LPFC_MBOXQ_t * |
| 868 | lpfc_mbox_get(struct lpfc_hba * phba) |
| 869 | { |
| 870 | LPFC_MBOXQ_t *mbq = NULL; |
| 871 | struct lpfc_sli *psli = &phba->sli; |
| 872 | |
James Smart | 2e0fef8 | 2007-06-17 19:56:36 -0500 | [diff] [blame] | 873 | list_remove_head((&psli->mboxq), mbq, LPFC_MBOXQ_t, list); |
James Smart | 92d7f7b | 2007-06-17 19:56:38 -0500 | [diff] [blame] | 874 | if (mbq) |
| dea3101 | 2005-04-17 16:05:31 -0500 | [diff] [blame] | 875 | psli->mboxq_cnt--; |
| dea3101 | 2005-04-17 16:05:31 -0500 | [diff] [blame] | 876 | |
| 877 | return mbq; |
| 878 | } |
James Smart | a309a6b | 2006-08-01 07:33:43 -0400 | [diff] [blame] | 879 | |
James Smart | 92d7f7b | 2007-06-17 19:56:38 -0500 | [diff] [blame] | 880 | void |
| 881 | lpfc_mbox_cmpl_put(struct lpfc_hba * phba, LPFC_MBOXQ_t * mbq) |
| 882 | { |
| 883 | /* This function expects to be called from interupt context */ |
| 884 | spin_lock(&phba->hbalock); |
| 885 | list_add_tail(&mbq->list, &phba->sli.mboxq_cmpl); |
| 886 | spin_unlock(&phba->hbalock); |
| 887 | return; |
| 888 | } |
| 889 | |
James Smart | a309a6b | 2006-08-01 07:33:43 -0400 | [diff] [blame] | 890 | int |
| 891 | lpfc_mbox_tmo_val(struct lpfc_hba *phba, int cmd) |
| 892 | { |
| 893 | switch (cmd) { |
| 894 | case MBX_WRITE_NV: /* 0x03 */ |
| 895 | case MBX_UPDATE_CFG: /* 0x1B */ |
| 896 | case MBX_DOWN_LOAD: /* 0x1C */ |
| 897 | case MBX_DEL_LD_ENTRY: /* 0x1D */ |
| 898 | case MBX_LOAD_AREA: /* 0x81 */ |
James Smart | 0937282 | 2008-01-11 01:52:54 -0500 | [diff] [blame] | 899 | case MBX_WRITE_WWN: /* 0x98 */ |
James Smart | a309a6b | 2006-08-01 07:33:43 -0400 | [diff] [blame] | 900 | case MBX_LOAD_EXP_ROM: /* 0x9C */ |
| 901 | return LPFC_MBOX_TMO_FLASH_CMD; |
| 902 | } |
| 903 | return LPFC_MBOX_TMO; |
| 904 | } |