blob: 2495958f10168383b3a80e9ee26c707ceb54bb8c [file] [log] [blame]
Dinh Nguyen66314222012-07-18 16:07:18 -06001/*
2 * Copyright (C) 2012 Altera Corporation <www.altera.com>
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program. If not, see <http://www.gnu.org/licenses/>.
16 */
17
18/dts-v1/;
19/include/ "socfpga.dtsi"
20
21/ {
22 model = "Altera SOCFPGA Cyclone V";
Dinh Nguyenc2ad2842013-02-11 17:30:30 -060023 compatible = "altr,socfpga-cyclone5", "altr,socfpga";
Dinh Nguyen66314222012-07-18 16:07:18 -060024
25 chosen {
26 bootargs = "console=ttyS0,57600";
27 };
28
29 memory {
30 name = "memory";
31 device_type = "memory";
Dinh Nguyenc2ad2842013-02-11 17:30:30 -060032 reg = <0x0 0x40000000>; /* 1GB */
33 };
34
35 soc {
Dinh Nguyen042000b2013-04-11 10:55:25 -050036 clkmgr@ffd04000 {
37 clocks {
38 osc1 {
39 clock-frequency = <25000000>;
40 };
41 };
42 };
43
Dinh Nguyenc2ad2842013-02-11 17:30:30 -060044 timer0@ffc08000 {
45 clock-frequency = <100000000>;
46 };
47
48 timer1@ffc09000 {
49 clock-frequency = <100000000>;
50 };
51
52 timer2@ffd00000 {
53 clock-frequency = <25000000>;
54 };
55
56 timer3@ffd01000 {
57 clock-frequency = <25000000>;
58 };
59
60 serial0@ffc02000 {
61 clock-frequency = <100000000>;
62 };
63
64 serial1@ffc03000 {
65 clock-frequency = <100000000>;
66 };
Dinh Nguyend6dd7352013-02-11 17:30:33 -060067
68 sysmgr@ffd08000 {
69 cpu1-start-addr = <0xffd080c4>;
70 };
Dinh Nguyen66314222012-07-18 16:07:18 -060071 };
72};