Zhangfei Gao | fa375d4 | 2012-06-11 18:04:39 +0800 | [diff] [blame] | 1 | /* |
| 2 | * linux/sound/soc/pxa/mmp-sspa.c |
| 3 | * Base on pxa2xx-ssp.c |
| 4 | * |
| 5 | * Copyright (C) 2011 Marvell International Ltd. |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; either version 2 of the License, or |
| 10 | * (at your option) any later version. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License |
| 18 | * along with this program; if not, write to the Free Software |
| 19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 20 | * |
| 21 | */ |
| 22 | #include <linux/init.h> |
| 23 | #include <linux/module.h> |
| 24 | #include <linux/platform_device.h> |
| 25 | #include <linux/delay.h> |
| 26 | #include <linux/clk.h> |
| 27 | #include <linux/slab.h> |
| 28 | #include <linux/pxa2xx_ssp.h> |
| 29 | #include <linux/io.h> |
Daniel Mack | d65a145 | 2013-08-12 10:42:39 +0200 | [diff] [blame] | 30 | #include <linux/dmaengine.h> |
| 31 | |
Zhangfei Gao | fa375d4 | 2012-06-11 18:04:39 +0800 | [diff] [blame] | 32 | #include <sound/core.h> |
| 33 | #include <sound/pcm.h> |
| 34 | #include <sound/initval.h> |
| 35 | #include <sound/pcm_params.h> |
| 36 | #include <sound/soc.h> |
| 37 | #include <sound/pxa2xx-lib.h> |
Daniel Mack | d65a145 | 2013-08-12 10:42:39 +0200 | [diff] [blame] | 38 | #include <sound/dmaengine_pcm.h> |
Zhangfei Gao | fa375d4 | 2012-06-11 18:04:39 +0800 | [diff] [blame] | 39 | #include "mmp-sspa.h" |
| 40 | |
| 41 | /* |
| 42 | * SSPA audio private data |
| 43 | */ |
| 44 | struct sspa_priv { |
| 45 | struct ssp_device *sspa; |
Daniel Mack | d65a145 | 2013-08-12 10:42:39 +0200 | [diff] [blame] | 46 | struct snd_dmaengine_dai_dma_data *dma_params; |
Zhangfei Gao | fa375d4 | 2012-06-11 18:04:39 +0800 | [diff] [blame] | 47 | struct clk *audio_clk; |
| 48 | struct clk *sysclk; |
| 49 | int dai_fmt; |
| 50 | int running_cnt; |
| 51 | }; |
| 52 | |
| 53 | static void mmp_sspa_write_reg(struct ssp_device *sspa, u32 reg, u32 val) |
| 54 | { |
| 55 | __raw_writel(val, sspa->mmio_base + reg); |
| 56 | } |
| 57 | |
| 58 | static u32 mmp_sspa_read_reg(struct ssp_device *sspa, u32 reg) |
| 59 | { |
| 60 | return __raw_readl(sspa->mmio_base + reg); |
| 61 | } |
| 62 | |
| 63 | static void mmp_sspa_tx_enable(struct ssp_device *sspa) |
| 64 | { |
| 65 | unsigned int sspa_sp; |
| 66 | |
| 67 | sspa_sp = mmp_sspa_read_reg(sspa, SSPA_TXSP); |
| 68 | sspa_sp |= SSPA_SP_S_EN; |
| 69 | sspa_sp |= SSPA_SP_WEN; |
| 70 | mmp_sspa_write_reg(sspa, SSPA_TXSP, sspa_sp); |
| 71 | } |
| 72 | |
| 73 | static void mmp_sspa_tx_disable(struct ssp_device *sspa) |
| 74 | { |
| 75 | unsigned int sspa_sp; |
| 76 | |
| 77 | sspa_sp = mmp_sspa_read_reg(sspa, SSPA_TXSP); |
| 78 | sspa_sp &= ~SSPA_SP_S_EN; |
| 79 | sspa_sp |= SSPA_SP_WEN; |
| 80 | mmp_sspa_write_reg(sspa, SSPA_TXSP, sspa_sp); |
| 81 | } |
| 82 | |
| 83 | static void mmp_sspa_rx_enable(struct ssp_device *sspa) |
| 84 | { |
| 85 | unsigned int sspa_sp; |
| 86 | |
| 87 | sspa_sp = mmp_sspa_read_reg(sspa, SSPA_RXSP); |
| 88 | sspa_sp |= SSPA_SP_S_EN; |
| 89 | sspa_sp |= SSPA_SP_WEN; |
| 90 | mmp_sspa_write_reg(sspa, SSPA_RXSP, sspa_sp); |
| 91 | } |
| 92 | |
| 93 | static void mmp_sspa_rx_disable(struct ssp_device *sspa) |
| 94 | { |
| 95 | unsigned int sspa_sp; |
| 96 | |
| 97 | sspa_sp = mmp_sspa_read_reg(sspa, SSPA_RXSP); |
| 98 | sspa_sp &= ~SSPA_SP_S_EN; |
| 99 | sspa_sp |= SSPA_SP_WEN; |
| 100 | mmp_sspa_write_reg(sspa, SSPA_RXSP, sspa_sp); |
| 101 | } |
| 102 | |
| 103 | static int mmp_sspa_startup(struct snd_pcm_substream *substream, |
| 104 | struct snd_soc_dai *dai) |
| 105 | { |
| 106 | struct sspa_priv *priv = snd_soc_dai_get_drvdata(dai); |
| 107 | |
| 108 | clk_enable(priv->sysclk); |
| 109 | clk_enable(priv->sspa->clk); |
| 110 | |
| 111 | return 0; |
| 112 | } |
| 113 | |
| 114 | static void mmp_sspa_shutdown(struct snd_pcm_substream *substream, |
| 115 | struct snd_soc_dai *dai) |
| 116 | { |
| 117 | struct sspa_priv *priv = snd_soc_dai_get_drvdata(dai); |
| 118 | |
| 119 | clk_disable(priv->sspa->clk); |
| 120 | clk_disable(priv->sysclk); |
| 121 | |
| 122 | return; |
| 123 | } |
| 124 | |
| 125 | /* |
| 126 | * Set the SSP ports SYSCLK. |
| 127 | */ |
| 128 | static int mmp_sspa_set_dai_sysclk(struct snd_soc_dai *cpu_dai, |
| 129 | int clk_id, unsigned int freq, int dir) |
| 130 | { |
| 131 | struct sspa_priv *priv = snd_soc_dai_get_drvdata(cpu_dai); |
| 132 | int ret = 0; |
| 133 | |
| 134 | switch (clk_id) { |
| 135 | case MMP_SSPA_CLK_AUDIO: |
| 136 | ret = clk_set_rate(priv->audio_clk, freq); |
| 137 | if (ret) |
| 138 | return ret; |
| 139 | break; |
| 140 | case MMP_SSPA_CLK_PLL: |
| 141 | case MMP_SSPA_CLK_VCXO: |
| 142 | /* not support yet */ |
| 143 | return -EINVAL; |
| 144 | default: |
| 145 | return -EINVAL; |
| 146 | } |
| 147 | |
| 148 | return 0; |
| 149 | } |
| 150 | |
| 151 | static int mmp_sspa_set_dai_pll(struct snd_soc_dai *cpu_dai, int pll_id, |
| 152 | int source, unsigned int freq_in, |
| 153 | unsigned int freq_out) |
| 154 | { |
| 155 | struct sspa_priv *priv = snd_soc_dai_get_drvdata(cpu_dai); |
| 156 | int ret = 0; |
| 157 | |
| 158 | switch (pll_id) { |
| 159 | case MMP_SYSCLK: |
| 160 | ret = clk_set_rate(priv->sysclk, freq_out); |
| 161 | if (ret) |
| 162 | return ret; |
| 163 | break; |
| 164 | case MMP_SSPA_CLK: |
| 165 | ret = clk_set_rate(priv->sspa->clk, freq_out); |
| 166 | if (ret) |
| 167 | return ret; |
| 168 | break; |
| 169 | default: |
| 170 | return -ENODEV; |
| 171 | } |
| 172 | |
| 173 | return 0; |
| 174 | } |
| 175 | |
| 176 | /* |
| 177 | * Set up the sspa dai format. The sspa port must be inactive |
| 178 | * before calling this function as the physical |
| 179 | * interface format is changed. |
| 180 | */ |
| 181 | static int mmp_sspa_set_dai_fmt(struct snd_soc_dai *cpu_dai, |
| 182 | unsigned int fmt) |
| 183 | { |
| 184 | struct sspa_priv *sspa_priv = snd_soc_dai_get_drvdata(cpu_dai); |
| 185 | struct ssp_device *sspa = sspa_priv->sspa; |
| 186 | u32 sspa_sp, sspa_ctrl; |
| 187 | |
| 188 | /* check if we need to change anything at all */ |
| 189 | if (sspa_priv->dai_fmt == fmt) |
| 190 | return 0; |
| 191 | |
| 192 | /* we can only change the settings if the port is not in use */ |
| 193 | if ((mmp_sspa_read_reg(sspa, SSPA_TXSP) & SSPA_SP_S_EN) || |
| 194 | (mmp_sspa_read_reg(sspa, SSPA_RXSP) & SSPA_SP_S_EN)) { |
| 195 | dev_err(&sspa->pdev->dev, |
| 196 | "can't change hardware dai format: stream is in use\n"); |
| 197 | return -EINVAL; |
| 198 | } |
| 199 | |
| 200 | /* reset port settings */ |
| 201 | sspa_sp = SSPA_SP_WEN | SSPA_SP_S_RST | SSPA_SP_FFLUSH; |
| 202 | sspa_ctrl = 0; |
| 203 | |
| 204 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { |
| 205 | case SND_SOC_DAIFMT_CBS_CFS: |
| 206 | sspa_sp |= SSPA_SP_MSL; |
| 207 | break; |
| 208 | case SND_SOC_DAIFMT_CBM_CFM: |
| 209 | break; |
| 210 | default: |
| 211 | return -EINVAL; |
| 212 | } |
| 213 | |
| 214 | switch (fmt & SND_SOC_DAIFMT_INV_MASK) { |
| 215 | case SND_SOC_DAIFMT_NB_NF: |
| 216 | sspa_sp |= SSPA_SP_FSP; |
| 217 | break; |
| 218 | default: |
| 219 | return -EINVAL; |
| 220 | } |
| 221 | |
| 222 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { |
| 223 | case SND_SOC_DAIFMT_I2S: |
| 224 | sspa_sp |= SSPA_TXSP_FPER(63); |
| 225 | sspa_sp |= SSPA_SP_FWID(31); |
| 226 | sspa_ctrl |= SSPA_CTL_XDATDLY(1); |
| 227 | break; |
| 228 | default: |
| 229 | return -EINVAL; |
| 230 | } |
| 231 | |
| 232 | mmp_sspa_write_reg(sspa, SSPA_TXSP, sspa_sp); |
| 233 | mmp_sspa_write_reg(sspa, SSPA_RXSP, sspa_sp); |
| 234 | |
| 235 | sspa_sp &= ~(SSPA_SP_S_RST | SSPA_SP_FFLUSH); |
| 236 | mmp_sspa_write_reg(sspa, SSPA_TXSP, sspa_sp); |
| 237 | mmp_sspa_write_reg(sspa, SSPA_RXSP, sspa_sp); |
| 238 | |
| 239 | /* |
| 240 | * FIXME: hw issue, for the tx serial port, |
| 241 | * can not config the master/slave mode; |
| 242 | * so must clean this bit. |
| 243 | * The master/slave mode has been set in the |
| 244 | * rx port. |
| 245 | */ |
| 246 | sspa_sp &= ~SSPA_SP_MSL; |
| 247 | mmp_sspa_write_reg(sspa, SSPA_TXSP, sspa_sp); |
| 248 | |
| 249 | mmp_sspa_write_reg(sspa, SSPA_TXCTL, sspa_ctrl); |
| 250 | mmp_sspa_write_reg(sspa, SSPA_RXCTL, sspa_ctrl); |
| 251 | |
| 252 | /* Since we are configuring the timings for the format by hand |
| 253 | * we have to defer some things until hw_params() where we |
| 254 | * know parameters like the sample size. |
| 255 | */ |
| 256 | sspa_priv->dai_fmt = fmt; |
| 257 | return 0; |
| 258 | } |
| 259 | |
| 260 | /* |
| 261 | * Set the SSPA audio DMA parameters and sample size. |
| 262 | * Can be called multiple times by oss emulation. |
| 263 | */ |
| 264 | static int mmp_sspa_hw_params(struct snd_pcm_substream *substream, |
| 265 | struct snd_pcm_hw_params *params, |
| 266 | struct snd_soc_dai *dai) |
| 267 | { |
| 268 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
| 269 | struct snd_soc_dai *cpu_dai = rtd->cpu_dai; |
| 270 | struct sspa_priv *sspa_priv = snd_soc_dai_get_drvdata(dai); |
| 271 | struct ssp_device *sspa = sspa_priv->sspa; |
Daniel Mack | d65a145 | 2013-08-12 10:42:39 +0200 | [diff] [blame] | 272 | struct snd_dmaengine_dai_dma_data *dma_params; |
Zhangfei Gao | fa375d4 | 2012-06-11 18:04:39 +0800 | [diff] [blame] | 273 | u32 sspa_ctrl; |
| 274 | |
| 275 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) |
| 276 | sspa_ctrl = mmp_sspa_read_reg(sspa, SSPA_TXCTL); |
| 277 | else |
| 278 | sspa_ctrl = mmp_sspa_read_reg(sspa, SSPA_RXCTL); |
| 279 | |
| 280 | sspa_ctrl &= ~SSPA_CTL_XFRLEN1_MASK; |
| 281 | sspa_ctrl |= SSPA_CTL_XFRLEN1(params_channels(params) - 1); |
| 282 | sspa_ctrl &= ~SSPA_CTL_XWDLEN1_MASK; |
| 283 | sspa_ctrl |= SSPA_CTL_XWDLEN1(SSPA_CTL_32_BITS); |
| 284 | sspa_ctrl &= ~SSPA_CTL_XSSZ1_MASK; |
| 285 | |
| 286 | switch (params_format(params)) { |
| 287 | case SNDRV_PCM_FORMAT_S8: |
| 288 | sspa_ctrl |= SSPA_CTL_XSSZ1(SSPA_CTL_8_BITS); |
| 289 | break; |
| 290 | case SNDRV_PCM_FORMAT_S16_LE: |
| 291 | sspa_ctrl |= SSPA_CTL_XSSZ1(SSPA_CTL_16_BITS); |
| 292 | break; |
| 293 | case SNDRV_PCM_FORMAT_S20_3LE: |
| 294 | sspa_ctrl |= SSPA_CTL_XSSZ1(SSPA_CTL_20_BITS); |
| 295 | break; |
| 296 | case SNDRV_PCM_FORMAT_S24_3LE: |
| 297 | sspa_ctrl |= SSPA_CTL_XSSZ1(SSPA_CTL_24_BITS); |
| 298 | break; |
| 299 | case SNDRV_PCM_FORMAT_S32_LE: |
| 300 | sspa_ctrl |= SSPA_CTL_XSSZ1(SSPA_CTL_32_BITS); |
| 301 | break; |
| 302 | default: |
| 303 | return -EINVAL; |
| 304 | } |
| 305 | |
| 306 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { |
| 307 | mmp_sspa_write_reg(sspa, SSPA_TXCTL, sspa_ctrl); |
| 308 | mmp_sspa_write_reg(sspa, SSPA_TXFIFO_LL, 0x1); |
| 309 | } else { |
| 310 | mmp_sspa_write_reg(sspa, SSPA_RXCTL, sspa_ctrl); |
| 311 | mmp_sspa_write_reg(sspa, SSPA_RXFIFO_UL, 0x0); |
| 312 | } |
| 313 | |
| 314 | dma_params = &sspa_priv->dma_params[substream->stream]; |
Daniel Mack | d65a145 | 2013-08-12 10:42:39 +0200 | [diff] [blame] | 315 | dma_params->addr = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? |
Zhangfei Gao | fa375d4 | 2012-06-11 18:04:39 +0800 | [diff] [blame] | 316 | (sspa->phys_base + SSPA_TXD) : |
| 317 | (sspa->phys_base + SSPA_RXD); |
| 318 | snd_soc_dai_set_dma_data(cpu_dai, substream, dma_params); |
| 319 | return 0; |
| 320 | } |
| 321 | |
| 322 | static int mmp_sspa_trigger(struct snd_pcm_substream *substream, int cmd, |
| 323 | struct snd_soc_dai *dai) |
| 324 | { |
| 325 | struct sspa_priv *sspa_priv = snd_soc_dai_get_drvdata(dai); |
| 326 | struct ssp_device *sspa = sspa_priv->sspa; |
| 327 | int ret = 0; |
| 328 | |
| 329 | switch (cmd) { |
| 330 | case SNDRV_PCM_TRIGGER_START: |
| 331 | case SNDRV_PCM_TRIGGER_RESUME: |
| 332 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: |
| 333 | /* |
| 334 | * whatever playback or capture, must enable rx. |
| 335 | * this is a hw issue, so need check if rx has been |
| 336 | * enabled or not; if has been enabled by another |
| 337 | * stream, do not enable again. |
| 338 | */ |
| 339 | if (!sspa_priv->running_cnt) |
| 340 | mmp_sspa_rx_enable(sspa); |
| 341 | |
| 342 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) |
| 343 | mmp_sspa_tx_enable(sspa); |
| 344 | |
| 345 | sspa_priv->running_cnt++; |
| 346 | break; |
| 347 | |
| 348 | case SNDRV_PCM_TRIGGER_STOP: |
| 349 | case SNDRV_PCM_TRIGGER_SUSPEND: |
| 350 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: |
| 351 | sspa_priv->running_cnt--; |
| 352 | |
| 353 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) |
| 354 | mmp_sspa_tx_disable(sspa); |
| 355 | |
| 356 | /* have no capture stream, disable rx port */ |
| 357 | if (!sspa_priv->running_cnt) |
| 358 | mmp_sspa_rx_disable(sspa); |
| 359 | break; |
| 360 | |
| 361 | default: |
| 362 | ret = -EINVAL; |
| 363 | } |
| 364 | |
| 365 | return ret; |
| 366 | } |
| 367 | |
| 368 | static int mmp_sspa_probe(struct snd_soc_dai *dai) |
| 369 | { |
| 370 | struct sspa_priv *priv = dev_get_drvdata(dai->dev); |
| 371 | |
| 372 | snd_soc_dai_set_drvdata(dai, priv); |
| 373 | return 0; |
| 374 | |
| 375 | } |
| 376 | |
| 377 | #define MMP_SSPA_RATES SNDRV_PCM_RATE_8000_192000 |
| 378 | #define MMP_SSPA_FORMATS (SNDRV_PCM_FMTBIT_S8 | \ |
| 379 | SNDRV_PCM_FMTBIT_S16_LE | \ |
| 380 | SNDRV_PCM_FMTBIT_S24_LE | \ |
| 381 | SNDRV_PCM_FMTBIT_S24_LE | \ |
| 382 | SNDRV_PCM_FMTBIT_S32_LE) |
| 383 | |
| 384 | static struct snd_soc_dai_ops mmp_sspa_dai_ops = { |
| 385 | .startup = mmp_sspa_startup, |
| 386 | .shutdown = mmp_sspa_shutdown, |
| 387 | .trigger = mmp_sspa_trigger, |
| 388 | .hw_params = mmp_sspa_hw_params, |
| 389 | .set_sysclk = mmp_sspa_set_dai_sysclk, |
| 390 | .set_pll = mmp_sspa_set_dai_pll, |
| 391 | .set_fmt = mmp_sspa_set_dai_fmt, |
| 392 | }; |
| 393 | |
Lars-Peter Clausen | 5d9ff40 | 2013-05-14 22:19:52 +0200 | [diff] [blame] | 394 | static struct snd_soc_dai_driver mmp_sspa_dai = { |
Zhangfei Gao | fa375d4 | 2012-06-11 18:04:39 +0800 | [diff] [blame] | 395 | .probe = mmp_sspa_probe, |
| 396 | .playback = { |
| 397 | .channels_min = 1, |
| 398 | .channels_max = 128, |
| 399 | .rates = MMP_SSPA_RATES, |
| 400 | .formats = MMP_SSPA_FORMATS, |
| 401 | }, |
| 402 | .capture = { |
| 403 | .channels_min = 1, |
| 404 | .channels_max = 2, |
| 405 | .rates = MMP_SSPA_RATES, |
| 406 | .formats = MMP_SSPA_FORMATS, |
| 407 | }, |
| 408 | .ops = &mmp_sspa_dai_ops, |
| 409 | }; |
| 410 | |
Kuninori Morimoto | 425f370 | 2013-03-21 03:34:48 -0700 | [diff] [blame] | 411 | static const struct snd_soc_component_driver mmp_sspa_component = { |
| 412 | .name = "mmp-sspa", |
| 413 | }; |
| 414 | |
Bill Pemberton | 570f6fe | 2012-12-07 09:26:17 -0500 | [diff] [blame] | 415 | static int asoc_mmp_sspa_probe(struct platform_device *pdev) |
Zhangfei Gao | fa375d4 | 2012-06-11 18:04:39 +0800 | [diff] [blame] | 416 | { |
| 417 | struct sspa_priv *priv; |
| 418 | struct resource *res; |
| 419 | |
| 420 | priv = devm_kzalloc(&pdev->dev, |
| 421 | sizeof(struct sspa_priv), GFP_KERNEL); |
| 422 | if (!priv) |
| 423 | return -ENOMEM; |
| 424 | |
| 425 | priv->sspa = devm_kzalloc(&pdev->dev, |
| 426 | sizeof(struct ssp_device), GFP_KERNEL); |
| 427 | if (priv->sspa == NULL) |
| 428 | return -ENOMEM; |
| 429 | |
| 430 | priv->dma_params = devm_kzalloc(&pdev->dev, |
Daniel Mack | d65a145 | 2013-08-12 10:42:39 +0200 | [diff] [blame] | 431 | 2 * sizeof(struct snd_dmaengine_dai_dma_data), |
| 432 | GFP_KERNEL); |
Zhangfei Gao | fa375d4 | 2012-06-11 18:04:39 +0800 | [diff] [blame] | 433 | if (priv->dma_params == NULL) |
| 434 | return -ENOMEM; |
| 435 | |
| 436 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
Thierry Reding | b25b5aa | 2013-01-21 11:09:26 +0100 | [diff] [blame] | 437 | priv->sspa->mmio_base = devm_ioremap_resource(&pdev->dev, res); |
| 438 | if (IS_ERR(priv->sspa->mmio_base)) |
| 439 | return PTR_ERR(priv->sspa->mmio_base); |
Zhangfei Gao | fa375d4 | 2012-06-11 18:04:39 +0800 | [diff] [blame] | 440 | |
| 441 | priv->sspa->clk = devm_clk_get(&pdev->dev, NULL); |
| 442 | if (IS_ERR(priv->sspa->clk)) |
| 443 | return PTR_ERR(priv->sspa->clk); |
| 444 | |
| 445 | priv->audio_clk = clk_get(NULL, "mmp-audio"); |
| 446 | if (IS_ERR(priv->audio_clk)) |
| 447 | return PTR_ERR(priv->audio_clk); |
| 448 | |
| 449 | priv->sysclk = clk_get(NULL, "mmp-sysclk"); |
| 450 | if (IS_ERR(priv->sysclk)) { |
| 451 | clk_put(priv->audio_clk); |
| 452 | return PTR_ERR(priv->sysclk); |
| 453 | } |
| 454 | clk_enable(priv->audio_clk); |
| 455 | priv->dai_fmt = (unsigned int) -1; |
| 456 | platform_set_drvdata(pdev, priv); |
| 457 | |
Sachin Kamat | 9ff5072 | 2013-09-17 10:32:48 +0530 | [diff] [blame] | 458 | return devm_snd_soc_register_component(&pdev->dev, &mmp_sspa_component, |
| 459 | &mmp_sspa_dai, 1); |
Zhangfei Gao | fa375d4 | 2012-06-11 18:04:39 +0800 | [diff] [blame] | 460 | } |
| 461 | |
Bill Pemberton | 570f6fe | 2012-12-07 09:26:17 -0500 | [diff] [blame] | 462 | static int asoc_mmp_sspa_remove(struct platform_device *pdev) |
Zhangfei Gao | fa375d4 | 2012-06-11 18:04:39 +0800 | [diff] [blame] | 463 | { |
| 464 | struct sspa_priv *priv = platform_get_drvdata(pdev); |
| 465 | |
| 466 | clk_disable(priv->audio_clk); |
| 467 | clk_put(priv->audio_clk); |
| 468 | clk_put(priv->sysclk); |
Zhangfei Gao | fa375d4 | 2012-06-11 18:04:39 +0800 | [diff] [blame] | 469 | return 0; |
| 470 | } |
| 471 | |
| 472 | static struct platform_driver asoc_mmp_sspa_driver = { |
| 473 | .driver = { |
| 474 | .name = "mmp-sspa-dai", |
| 475 | .owner = THIS_MODULE, |
| 476 | }, |
| 477 | .probe = asoc_mmp_sspa_probe, |
Bill Pemberton | 570f6fe | 2012-12-07 09:26:17 -0500 | [diff] [blame] | 478 | .remove = asoc_mmp_sspa_remove, |
Zhangfei Gao | fa375d4 | 2012-06-11 18:04:39 +0800 | [diff] [blame] | 479 | }; |
| 480 | |
| 481 | module_platform_driver(asoc_mmp_sspa_driver); |
| 482 | |
| 483 | MODULE_AUTHOR("Leo Yan <leoy@marvell.com>"); |
| 484 | MODULE_DESCRIPTION("MMP SSPA SoC Interface"); |
| 485 | MODULE_LICENSE("GPL"); |