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Wei Ni9a10eb22008-09-26 13:45:46 +08001/*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for NVIDIA HDMI codecs
5 *
6 * Copyright (c) 2008 NVIDIA Corp. All rights reserved.
7 * Copyright (c) 2008 Wei Ni <wni@nvidia.com>
8 *
9 *
10 * This driver is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This driver is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 */
24
25#include <linux/init.h>
26#include <linux/delay.h>
27#include <linux/slab.h>
28#include <sound/core.h>
29#include "hda_codec.h"
30#include "hda_local.h"
31
Wu Fengguang079d88c2010-03-08 10:44:23 +080032#define MAX_HDMI_CVTS 1
33#define MAX_HDMI_PINS 1
34
35#include "patch_hdmi.c"
36
37static char *nvhdmi_pcm_names[MAX_HDMI_CVTS] = {
38 "NVIDIA HDMI",
39};
40
Takashi Iwaif0613d52009-10-09 17:44:08 +020041/* define below to restrict the supported rates and formats */
Takashi Iwai491dc042009-10-13 16:07:59 +020042/* #define LIMITED_RATE_FMT_SUPPORT */
Takashi Iwaif0613d52009-10-09 17:44:08 +020043
Wei Ni25045702010-03-03 15:11:40 +080044enum HDACodec {
45 HDA_CODEC_NVIDIA_MCP7X,
46 HDA_CODEC_NVIDIA_MCP89,
47 HDA_CODEC_NVIDIA_GT21X,
48 HDA_CODEC_INVALID
Wei Ni9a10eb22008-09-26 13:45:46 +080049};
50
Wei Nia3d6ab92009-06-01 16:37:28 +080051#define Nv_VERB_SET_Channel_Allocation 0xF79
52#define Nv_VERB_SET_Info_Frame_Checksum 0xF7A
53#define Nv_VERB_SET_Audio_Protection_On 0xF98
54#define Nv_VERB_SET_Audio_Protection_Off 0xF99
55
Wei Ni25045702010-03-03 15:11:40 +080056#define nvhdmi_master_con_nid_7x 0x04
57#define nvhdmi_master_pin_nid_7x 0x05
Wei Nia3d6ab92009-06-01 16:37:28 +080058
Wei Ni25045702010-03-03 15:11:40 +080059#define nvhdmi_master_con_nid_89 0x04
60#define nvhdmi_master_pin_nid_89 0x05
61
62static hda_nid_t nvhdmi_con_nids_7x[4] = {
Wei Nia3d6ab92009-06-01 16:37:28 +080063 /*front, rear, clfe, rear_surr */
64 0x6, 0x8, 0xa, 0xc,
65};
66
Wei Ni25045702010-03-03 15:11:40 +080067static struct hda_verb nvhdmi_basic_init_7x[] = {
Wei Nia3d6ab92009-06-01 16:37:28 +080068 /* set audio protect on */
69 { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
Wei Ni9a10eb22008-09-26 13:45:46 +080070 /* enable digital output on pin widget */
Wei Nia3d6ab92009-06-01 16:37:28 +080071 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
72 { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
73 { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
74 { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
75 { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
Wei Ni9a10eb22008-09-26 13:45:46 +080076 {} /* terminator */
77};
78
Takashi Iwaif0613d52009-10-09 17:44:08 +020079#ifdef LIMITED_RATE_FMT_SUPPORT
80/* support only the safe format and rate */
81#define SUPPORTED_RATES SNDRV_PCM_RATE_48000
82#define SUPPORTED_MAXBPS 16
83#define SUPPORTED_FORMATS SNDRV_PCM_FMTBIT_S16_LE
84#else
85/* support all rates and formats */
86#define SUPPORTED_RATES \
87 (SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
88 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
89 SNDRV_PCM_RATE_192000)
90#define SUPPORTED_MAXBPS 24
91#define SUPPORTED_FORMATS \
92 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
93#endif
94
Wei Ni9a10eb22008-09-26 13:45:46 +080095/*
96 * Controls
97 */
98static int nvhdmi_build_controls(struct hda_codec *codec)
99{
Wu Fengguang079d88c2010-03-08 10:44:23 +0800100 struct hdmi_spec *spec = codec->spec;
Wei Ni9a10eb22008-09-26 13:45:46 +0800101 int err;
Wei Ni25045702010-03-03 15:11:40 +0800102 int i;
Wei Ni9a10eb22008-09-26 13:45:46 +0800103
Wei Ni25045702010-03-03 15:11:40 +0800104 if ((spec->codec_type == HDA_CODEC_NVIDIA_MCP89)
105 || (spec->codec_type == HDA_CODEC_NVIDIA_GT21X)) {
106 for (i = 0; i < codec->num_pcms; i++) {
107 err = snd_hda_create_spdif_out_ctls(codec,
108 spec->cvt[i]);
109 if (err < 0)
110 return err;
111 }
112 } else {
113 err = snd_hda_create_spdif_out_ctls(codec,
114 spec->multiout.dig_out_nid);
115 if (err < 0)
116 return err;
117 }
Wei Ni9a10eb22008-09-26 13:45:46 +0800118
119 return 0;
120}
121
122static int nvhdmi_init(struct hda_codec *codec)
123{
Wu Fengguang079d88c2010-03-08 10:44:23 +0800124 struct hdmi_spec *spec = codec->spec;
Wei Ni25045702010-03-03 15:11:40 +0800125 int i;
126 if ((spec->codec_type == HDA_CODEC_NVIDIA_MCP89)
127 || (spec->codec_type == HDA_CODEC_NVIDIA_GT21X)) {
128 for (i = 0; spec->pin[i]; i++) {
129 hdmi_enable_output(codec, spec->pin[i]);
130 snd_hda_codec_write(codec, spec->pin[i], 0,
131 AC_VERB_SET_UNSOLICITED_ENABLE,
132 AC_USRSP_EN | spec->pin[i]);
133 }
134 } else {
135 snd_hda_sequence_write(codec, nvhdmi_basic_init_7x);
136 }
Wei Ni9a10eb22008-09-26 13:45:46 +0800137 return 0;
138}
139
Wei Ni25045702010-03-03 15:11:40 +0800140static void nvhdmi_free(struct hda_codec *codec)
141{
Wu Fengguang079d88c2010-03-08 10:44:23 +0800142 struct hdmi_spec *spec = codec->spec;
Wei Ni25045702010-03-03 15:11:40 +0800143 int i;
144
145 if ((spec->codec_type == HDA_CODEC_NVIDIA_MCP89)
146 || (spec->codec_type == HDA_CODEC_NVIDIA_GT21X)) {
147 for (i = 0; i < spec->num_pins; i++)
148 snd_hda_eld_proc_free(codec, &spec->sink_eld[i]);
149 }
150
151 kfree(spec);
152}
153
Wei Ni9a10eb22008-09-26 13:45:46 +0800154/*
155 * Digital out
156 */
157static int nvhdmi_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
Wei Nia3d6ab92009-06-01 16:37:28 +0800158 struct hda_codec *codec,
159 struct snd_pcm_substream *substream)
Wei Ni9a10eb22008-09-26 13:45:46 +0800160{
Wu Fengguang079d88c2010-03-08 10:44:23 +0800161 struct hdmi_spec *spec = codec->spec;
Wei Ni9a10eb22008-09-26 13:45:46 +0800162 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
163}
164
Wei Ni25045702010-03-03 15:11:40 +0800165static int nvhdmi_dig_playback_pcm_close_8ch_7x(struct hda_pcm_stream *hinfo,
Wei Nia3d6ab92009-06-01 16:37:28 +0800166 struct hda_codec *codec,
167 struct snd_pcm_substream *substream)
168{
Wu Fengguang079d88c2010-03-08 10:44:23 +0800169 struct hdmi_spec *spec = codec->spec;
Wei Nia3d6ab92009-06-01 16:37:28 +0800170 int i;
171
Wei Ni25045702010-03-03 15:11:40 +0800172 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
Wei Nia3d6ab92009-06-01 16:37:28 +0800173 0, AC_VERB_SET_CHANNEL_STREAMID, 0);
174 for (i = 0; i < 4; i++) {
175 /* set the stream id */
Wei Ni25045702010-03-03 15:11:40 +0800176 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
Wei Nia3d6ab92009-06-01 16:37:28 +0800177 AC_VERB_SET_CHANNEL_STREAMID, 0);
178 /* set the stream format */
Wei Ni25045702010-03-03 15:11:40 +0800179 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
Wei Nia3d6ab92009-06-01 16:37:28 +0800180 AC_VERB_SET_STREAM_FORMAT, 0);
181 }
182
183 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
184}
185
186static int nvhdmi_dig_playback_pcm_close_2ch(struct hda_pcm_stream *hinfo,
187 struct hda_codec *codec,
188 struct snd_pcm_substream *substream)
Wei Ni9a10eb22008-09-26 13:45:46 +0800189{
Wu Fengguang079d88c2010-03-08 10:44:23 +0800190 struct hdmi_spec *spec = codec->spec;
Wei Ni9a10eb22008-09-26 13:45:46 +0800191 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
192}
193
Wei Ni25045702010-03-03 15:11:40 +0800194static int nvhdmi_dig_playback_pcm_prepare_8ch_89(struct hda_pcm_stream *hinfo,
195 struct hda_codec *codec,
196 unsigned int stream_tag,
197 unsigned int format,
198 struct snd_pcm_substream *substream)
199{
200 hdmi_set_channel_count(codec, hinfo->nid,
201 substream->runtime->channels);
202
203 hdmi_setup_audio_infoframe(codec, hinfo->nid, substream);
204
Anssi Hannulaea87d1c2010-08-03 13:28:58 +0300205 return hdmi_setup_stream(codec, hinfo->nid, stream_tag, format);
Wei Ni25045702010-03-03 15:11:40 +0800206}
207
Wei Nia3d6ab92009-06-01 16:37:28 +0800208static int nvhdmi_dig_playback_pcm_prepare_8ch(struct hda_pcm_stream *hinfo,
209 struct hda_codec *codec,
210 unsigned int stream_tag,
211 unsigned int format,
212 struct snd_pcm_substream *substream)
213{
214 int chs;
215 unsigned int dataDCC1, dataDCC2, chan, chanmask, channel_id;
216 int i;
217
218 mutex_lock(&codec->spdif_mutex);
219
220 chs = substream->runtime->channels;
221 chan = chs ? (chs - 1) : 1;
222
223 switch (chs) {
224 default:
225 case 0:
226 case 2:
227 chanmask = 0x00;
228 break;
229 case 4:
230 chanmask = 0x08;
231 break;
232 case 6:
233 chanmask = 0x0b;
234 break;
235 case 8:
236 chanmask = 0x13;
237 break;
238 }
239 dataDCC1 = AC_DIG1_ENABLE | AC_DIG1_COPYRIGHT;
240 dataDCC2 = 0x2;
241
242 /* set the Audio InforFrame Channel Allocation */
243 snd_hda_codec_write(codec, 0x1, 0,
244 Nv_VERB_SET_Channel_Allocation, chanmask);
245
246 /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
247 if (codec->spdif_status_reset && (codec->spdif_ctls & AC_DIG1_ENABLE))
248 snd_hda_codec_write(codec,
Wei Ni25045702010-03-03 15:11:40 +0800249 nvhdmi_master_con_nid_7x,
Wei Nia3d6ab92009-06-01 16:37:28 +0800250 0,
251 AC_VERB_SET_DIGI_CONVERT_1,
252 codec->spdif_ctls & ~AC_DIG1_ENABLE & 0xff);
253
254 /* set the stream id */
Wei Ni25045702010-03-03 15:11:40 +0800255 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
Wei Nia3d6ab92009-06-01 16:37:28 +0800256 AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
257
258 /* set the stream format */
Wei Ni25045702010-03-03 15:11:40 +0800259 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
Wei Nia3d6ab92009-06-01 16:37:28 +0800260 AC_VERB_SET_STREAM_FORMAT, format);
261
262 /* turn on again (if needed) */
263 /* enable and set the channel status audio/data flag */
264 if (codec->spdif_status_reset && (codec->spdif_ctls & AC_DIG1_ENABLE)) {
265 snd_hda_codec_write(codec,
Wei Ni25045702010-03-03 15:11:40 +0800266 nvhdmi_master_con_nid_7x,
Wei Nia3d6ab92009-06-01 16:37:28 +0800267 0,
268 AC_VERB_SET_DIGI_CONVERT_1,
269 codec->spdif_ctls & 0xff);
270 snd_hda_codec_write(codec,
Wei Ni25045702010-03-03 15:11:40 +0800271 nvhdmi_master_con_nid_7x,
Wei Nia3d6ab92009-06-01 16:37:28 +0800272 0,
273 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
274 }
275
276 for (i = 0; i < 4; i++) {
277 if (chs == 2)
278 channel_id = 0;
279 else
280 channel_id = i * 2;
281
282 /* turn off SPDIF once;
283 *otherwise the IEC958 bits won't be updated
284 */
285 if (codec->spdif_status_reset &&
286 (codec->spdif_ctls & AC_DIG1_ENABLE))
287 snd_hda_codec_write(codec,
Wei Ni25045702010-03-03 15:11:40 +0800288 nvhdmi_con_nids_7x[i],
Wei Nia3d6ab92009-06-01 16:37:28 +0800289 0,
290 AC_VERB_SET_DIGI_CONVERT_1,
291 codec->spdif_ctls & ~AC_DIG1_ENABLE & 0xff);
292 /* set the stream id */
293 snd_hda_codec_write(codec,
Wei Ni25045702010-03-03 15:11:40 +0800294 nvhdmi_con_nids_7x[i],
Wei Nia3d6ab92009-06-01 16:37:28 +0800295 0,
296 AC_VERB_SET_CHANNEL_STREAMID,
297 (stream_tag << 4) | channel_id);
298 /* set the stream format */
299 snd_hda_codec_write(codec,
Wei Ni25045702010-03-03 15:11:40 +0800300 nvhdmi_con_nids_7x[i],
Wei Nia3d6ab92009-06-01 16:37:28 +0800301 0,
302 AC_VERB_SET_STREAM_FORMAT,
303 format);
304 /* turn on again (if needed) */
305 /* enable and set the channel status audio/data flag */
306 if (codec->spdif_status_reset &&
307 (codec->spdif_ctls & AC_DIG1_ENABLE)) {
308 snd_hda_codec_write(codec,
Wei Ni25045702010-03-03 15:11:40 +0800309 nvhdmi_con_nids_7x[i],
Wei Nia3d6ab92009-06-01 16:37:28 +0800310 0,
311 AC_VERB_SET_DIGI_CONVERT_1,
312 codec->spdif_ctls & 0xff);
313 snd_hda_codec_write(codec,
Wei Ni25045702010-03-03 15:11:40 +0800314 nvhdmi_con_nids_7x[i],
Wei Nia3d6ab92009-06-01 16:37:28 +0800315 0,
316 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
317 }
318 }
319
320 /* set the Audio Info Frame Checksum */
321 snd_hda_codec_write(codec, 0x1, 0,
322 Nv_VERB_SET_Info_Frame_Checksum,
323 (0x71 - chan - chanmask));
324
325 mutex_unlock(&codec->spdif_mutex);
326 return 0;
327}
328
Wei Ni25045702010-03-03 15:11:40 +0800329static int nvhdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
330 struct hda_codec *codec,
331 struct snd_pcm_substream *substream)
332{
333 return 0;
334}
335
Wei Nia3d6ab92009-06-01 16:37:28 +0800336static int nvhdmi_dig_playback_pcm_prepare_2ch(struct hda_pcm_stream *hinfo,
337 struct hda_codec *codec,
338 unsigned int stream_tag,
339 unsigned int format,
340 struct snd_pcm_substream *substream)
Wei Ni9a10eb22008-09-26 13:45:46 +0800341{
Wu Fengguang079d88c2010-03-08 10:44:23 +0800342 struct hdmi_spec *spec = codec->spec;
Wei Ni9a10eb22008-09-26 13:45:46 +0800343 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout, stream_tag,
Wei Nia3d6ab92009-06-01 16:37:28 +0800344 format, substream);
Wei Ni9a10eb22008-09-26 13:45:46 +0800345}
346
Wei Ni25045702010-03-03 15:11:40 +0800347static struct hda_pcm_stream nvhdmi_pcm_digital_playback_8ch_89 = {
348 .substreams = 1,
349 .channels_min = 2,
350 .rates = SUPPORTED_RATES,
351 .maxbps = SUPPORTED_MAXBPS,
352 .formats = SUPPORTED_FORMATS,
353 .ops = {
354 .prepare = nvhdmi_dig_playback_pcm_prepare_8ch_89,
355 .cleanup = nvhdmi_playback_pcm_cleanup,
356 },
357};
358
359static struct hda_pcm_stream nvhdmi_pcm_digital_playback_8ch_7x = {
Wei Ni9a10eb22008-09-26 13:45:46 +0800360 .substreams = 1,
361 .channels_min = 2,
Wei Nia3d6ab92009-06-01 16:37:28 +0800362 .channels_max = 8,
Wei Ni25045702010-03-03 15:11:40 +0800363 .nid = nvhdmi_master_con_nid_7x,
Takashi Iwaif0613d52009-10-09 17:44:08 +0200364 .rates = SUPPORTED_RATES,
365 .maxbps = SUPPORTED_MAXBPS,
366 .formats = SUPPORTED_FORMATS,
Wei Ni9a10eb22008-09-26 13:45:46 +0800367 .ops = {
368 .open = nvhdmi_dig_playback_pcm_open,
Wei Ni25045702010-03-03 15:11:40 +0800369 .close = nvhdmi_dig_playback_pcm_close_8ch_7x,
Wei Nia3d6ab92009-06-01 16:37:28 +0800370 .prepare = nvhdmi_dig_playback_pcm_prepare_8ch
Wei Ni9a10eb22008-09-26 13:45:46 +0800371 },
372};
373
Wei Nia3d6ab92009-06-01 16:37:28 +0800374static struct hda_pcm_stream nvhdmi_pcm_digital_playback_2ch = {
375 .substreams = 1,
376 .channels_min = 2,
377 .channels_max = 2,
Wei Ni25045702010-03-03 15:11:40 +0800378 .nid = nvhdmi_master_con_nid_7x,
Takashi Iwaif0613d52009-10-09 17:44:08 +0200379 .rates = SUPPORTED_RATES,
380 .maxbps = SUPPORTED_MAXBPS,
381 .formats = SUPPORTED_FORMATS,
Wei Nia3d6ab92009-06-01 16:37:28 +0800382 .ops = {
383 .open = nvhdmi_dig_playback_pcm_open,
384 .close = nvhdmi_dig_playback_pcm_close_2ch,
385 .prepare = nvhdmi_dig_playback_pcm_prepare_2ch
386 },
387};
388
Wei Ni25045702010-03-03 15:11:40 +0800389static int nvhdmi_build_pcms_8ch_89(struct hda_codec *codec)
Wei Ni9a10eb22008-09-26 13:45:46 +0800390{
Wu Fengguang079d88c2010-03-08 10:44:23 +0800391 struct hdmi_spec *spec = codec->spec;
Wei Ni25045702010-03-03 15:11:40 +0800392 struct hda_pcm *info = spec->pcm_rec;
393 int i;
394
395 codec->num_pcms = spec->num_cvts;
396 codec->pcm_info = info;
397
398 for (i = 0; i < codec->num_pcms; i++, info++) {
399 unsigned int chans;
400
401 chans = get_wcaps(codec, spec->cvt[i]);
402 chans = get_wcaps_channels(chans);
403
404 info->name = nvhdmi_pcm_names[i];
405 info->pcm_type = HDA_PCM_TYPE_HDMI;
406 info->stream[SNDRV_PCM_STREAM_PLAYBACK]
407 = nvhdmi_pcm_digital_playback_8ch_89;
408 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->cvt[i];
409 info->stream[SNDRV_PCM_STREAM_PLAYBACK].channels_max = chans;
410 }
411
412 return 0;
413}
414
415static int nvhdmi_build_pcms_8ch_7x(struct hda_codec *codec)
416{
Wu Fengguang079d88c2010-03-08 10:44:23 +0800417 struct hdmi_spec *spec = codec->spec;
Wei Ni25045702010-03-03 15:11:40 +0800418 struct hda_pcm *info = spec->pcm_rec;
Wei Ni9a10eb22008-09-26 13:45:46 +0800419
420 codec->num_pcms = 1;
421 codec->pcm_info = info;
422
423 info->name = "NVIDIA HDMI";
Takashi Iwaiec4e86b2008-10-16 08:02:41 +0200424 info->pcm_type = HDA_PCM_TYPE_HDMI;
Wei Nia3d6ab92009-06-01 16:37:28 +0800425 info->stream[SNDRV_PCM_STREAM_PLAYBACK]
Wei Ni25045702010-03-03 15:11:40 +0800426 = nvhdmi_pcm_digital_playback_8ch_7x;
Wei Nia3d6ab92009-06-01 16:37:28 +0800427
428 return 0;
429}
430
431static int nvhdmi_build_pcms_2ch(struct hda_codec *codec)
432{
Wu Fengguang079d88c2010-03-08 10:44:23 +0800433 struct hdmi_spec *spec = codec->spec;
Wei Ni25045702010-03-03 15:11:40 +0800434 struct hda_pcm *info = spec->pcm_rec;
Wei Nia3d6ab92009-06-01 16:37:28 +0800435
436 codec->num_pcms = 1;
437 codec->pcm_info = info;
438
439 info->name = "NVIDIA HDMI";
440 info->pcm_type = HDA_PCM_TYPE_HDMI;
441 info->stream[SNDRV_PCM_STREAM_PLAYBACK]
442 = nvhdmi_pcm_digital_playback_2ch;
Wei Ni9a10eb22008-09-26 13:45:46 +0800443
444 return 0;
445}
446
Wei Ni25045702010-03-03 15:11:40 +0800447static struct hda_codec_ops nvhdmi_patch_ops_8ch_89 = {
Wei Ni9a10eb22008-09-26 13:45:46 +0800448 .build_controls = nvhdmi_build_controls,
Wei Ni25045702010-03-03 15:11:40 +0800449 .build_pcms = nvhdmi_build_pcms_8ch_89,
450 .init = nvhdmi_init,
451 .free = nvhdmi_free,
Wu Fengguang079d88c2010-03-08 10:44:23 +0800452 .unsol_event = hdmi_unsol_event,
Wei Ni25045702010-03-03 15:11:40 +0800453};
454
455static struct hda_codec_ops nvhdmi_patch_ops_8ch_7x = {
456 .build_controls = nvhdmi_build_controls,
457 .build_pcms = nvhdmi_build_pcms_8ch_7x,
Wei Ni9a10eb22008-09-26 13:45:46 +0800458 .init = nvhdmi_init,
459 .free = nvhdmi_free,
460};
461
Wei Nia3d6ab92009-06-01 16:37:28 +0800462static struct hda_codec_ops nvhdmi_patch_ops_2ch = {
463 .build_controls = nvhdmi_build_controls,
464 .build_pcms = nvhdmi_build_pcms_2ch,
465 .init = nvhdmi_init,
466 .free = nvhdmi_free,
467};
468
Wei Ni25045702010-03-03 15:11:40 +0800469static int patch_nvhdmi_8ch_89(struct hda_codec *codec)
470{
Wu Fengguang079d88c2010-03-08 10:44:23 +0800471 struct hdmi_spec *spec;
Wei Ni25045702010-03-03 15:11:40 +0800472 int i;
473
474 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
475 if (spec == NULL)
476 return -ENOMEM;
477
478 codec->spec = spec;
479 spec->codec_type = HDA_CODEC_NVIDIA_MCP89;
Takashi Iwai38faddb2010-07-28 14:21:55 +0200480 spec->old_pin_detect = 1;
Wei Ni25045702010-03-03 15:11:40 +0800481
Wu Fengguang079d88c2010-03-08 10:44:23 +0800482 if (hdmi_parse_codec(codec) < 0) {
Wei Ni25045702010-03-03 15:11:40 +0800483 codec->spec = NULL;
484 kfree(spec);
485 return -EINVAL;
486 }
487 codec->patch_ops = nvhdmi_patch_ops_8ch_89;
488
489 for (i = 0; i < spec->num_pins; i++)
490 snd_hda_eld_proc_new(codec, &spec->sink_eld[i], i);
491
492 init_channel_allocations();
493
494 return 0;
495}
496
497static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
Wei Ni9a10eb22008-09-26 13:45:46 +0800498{
Wu Fengguang079d88c2010-03-08 10:44:23 +0800499 struct hdmi_spec *spec;
Wei Ni9a10eb22008-09-26 13:45:46 +0800500
501 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
502 if (spec == NULL)
503 return -ENOMEM;
504
505 codec->spec = spec;
506
Wei Nia3d6ab92009-06-01 16:37:28 +0800507 spec->multiout.num_dacs = 0; /* no analog */
508 spec->multiout.max_channels = 8;
Wei Ni25045702010-03-03 15:11:40 +0800509 spec->multiout.dig_out_nid = nvhdmi_master_con_nid_7x;
510 spec->codec_type = HDA_CODEC_NVIDIA_MCP7X;
Takashi Iwai38faddb2010-07-28 14:21:55 +0200511 spec->old_pin_detect = 1;
Wei Ni9a10eb22008-09-26 13:45:46 +0800512
Wei Ni25045702010-03-03 15:11:40 +0800513 codec->patch_ops = nvhdmi_patch_ops_8ch_7x;
Wei Nia3d6ab92009-06-01 16:37:28 +0800514
515 return 0;
516}
517
518static int patch_nvhdmi_2ch(struct hda_codec *codec)
519{
Wu Fengguang079d88c2010-03-08 10:44:23 +0800520 struct hdmi_spec *spec;
Wei Nia3d6ab92009-06-01 16:37:28 +0800521
522 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
523 if (spec == NULL)
524 return -ENOMEM;
525
526 codec->spec = spec;
527
528 spec->multiout.num_dacs = 0; /* no analog */
529 spec->multiout.max_channels = 2;
Wei Ni25045702010-03-03 15:11:40 +0800530 spec->multiout.dig_out_nid = nvhdmi_master_con_nid_7x;
531 spec->codec_type = HDA_CODEC_NVIDIA_MCP7X;
Takashi Iwai38faddb2010-07-28 14:21:55 +0200532 spec->old_pin_detect = 1;
Wei Nia3d6ab92009-06-01 16:37:28 +0800533
534 codec->patch_ops = nvhdmi_patch_ops_2ch;
Wei Ni9a10eb22008-09-26 13:45:46 +0800535
536 return 0;
537}
538
539/*
540 * patch entries
541 */
Takashi Iwai1289e9e2008-11-27 15:47:11 +0100542static struct hda_codec_preset snd_hda_preset_nvhdmi[] = {
Wei Ni25045702010-03-03 15:11:40 +0800543 { .id = 0x10de0002, .name = "MCP77/78 HDMI",
544 .patch = patch_nvhdmi_8ch_7x },
545 { .id = 0x10de0003, .name = "MCP77/78 HDMI",
546 .patch = patch_nvhdmi_8ch_7x },
547 { .id = 0x10de0005, .name = "MCP77/78 HDMI",
548 .patch = patch_nvhdmi_8ch_7x },
549 { .id = 0x10de0006, .name = "MCP77/78 HDMI",
550 .patch = patch_nvhdmi_8ch_7x },
551 { .id = 0x10de0007, .name = "MCP79/7A HDMI",
552 .patch = patch_nvhdmi_8ch_7x },
Takashi Iwaiea823c02010-03-22 08:07:55 +0100553 { .id = 0x10de000a, .name = "GT220 HDMI",
Wei Ni25045702010-03-03 15:11:40 +0800554 .patch = patch_nvhdmi_8ch_89 },
555 { .id = 0x10de000b, .name = "GT21x HDMI",
556 .patch = patch_nvhdmi_8ch_89 },
Takashi Iwaiea823c02010-03-22 08:07:55 +0100557 { .id = 0x10de000c, .name = "MCP89 HDMI",
Derek Kellye933e9e2010-03-22 08:04:19 +0100558 .patch = patch_nvhdmi_8ch_89 },
Wei Ni25045702010-03-03 15:11:40 +0800559 { .id = 0x10de000d, .name = "GT240 HDMI",
560 .patch = patch_nvhdmi_8ch_89 },
Takashi Iwaiea823c02010-03-22 08:07:55 +0100561 { .id = 0x10de0067, .name = "MCP67 HDMI", .patch = patch_nvhdmi_2ch },
562 { .id = 0x10de8001, .name = "MCP73 HDMI", .patch = patch_nvhdmi_2ch },
Wei Ni9a10eb22008-09-26 13:45:46 +0800563 {} /* terminator */
564};
Takashi Iwai1289e9e2008-11-27 15:47:11 +0100565
566MODULE_ALIAS("snd-hda-codec-id:10de0002");
Takashi Iwaif8ff0352009-09-01 08:53:19 +0200567MODULE_ALIAS("snd-hda-codec-id:10de0003");
Takashi Iwaie2e527a2009-11-13 08:28:03 +0100568MODULE_ALIAS("snd-hda-codec-id:10de0005");
Takashi Iwaif84e3e92009-01-13 12:32:21 +0100569MODULE_ALIAS("snd-hda-codec-id:10de0006");
Takashi Iwai1289e9e2008-11-27 15:47:11 +0100570MODULE_ALIAS("snd-hda-codec-id:10de0007");
Takashi Iwaiea823c02010-03-22 08:07:55 +0100571MODULE_ALIAS("snd-hda-codec-id:10de000a");
572MODULE_ALIAS("snd-hda-codec-id:10de000b");
573MODULE_ALIAS("snd-hda-codec-id:10de000c");
574MODULE_ALIAS("snd-hda-codec-id:10de000d");
Takashi Iwai4151d152008-12-04 07:49:15 +0100575MODULE_ALIAS("snd-hda-codec-id:10de0067");
Brian Hinze3d6ce62009-01-07 11:49:56 +0100576MODULE_ALIAS("snd-hda-codec-id:10de8001");
Takashi Iwai1289e9e2008-11-27 15:47:11 +0100577
578MODULE_LICENSE("GPL");
Wei Ni25045702010-03-03 15:11:40 +0800579MODULE_DESCRIPTION("NVIDIA HDMI HD-audio codec");
Takashi Iwai1289e9e2008-11-27 15:47:11 +0100580
581static struct hda_codec_preset_list nvhdmi_list = {
582 .preset = snd_hda_preset_nvhdmi,
583 .owner = THIS_MODULE,
584};
585
586static int __init patch_nvhdmi_init(void)
587{
588 return snd_hda_add_codec_preset(&nvhdmi_list);
589}
590
591static void __exit patch_nvhdmi_exit(void)
592{
593 snd_hda_delete_codec_preset(&nvhdmi_list);
594}
595
596module_init(patch_nvhdmi_init)
597module_exit(patch_nvhdmi_exit)