Adrian Bunk | b00dc83 | 2008-05-19 16:52:27 -0700 | [diff] [blame] | 1 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2 | * rtrap.S: Preparing for return from trap on Sparc V9. |
| 3 | * |
| 4 | * Copyright (C) 1997,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz) |
| 5 | * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu) |
| 6 | */ |
| 7 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 8 | |
| 9 | #include <asm/asi.h> |
| 10 | #include <asm/pstate.h> |
| 11 | #include <asm/ptrace.h> |
| 12 | #include <asm/spitfire.h> |
| 13 | #include <asm/head.h> |
| 14 | #include <asm/visasm.h> |
| 15 | #include <asm/processor.h> |
| 16 | |
David S. Miller | 64f2dde | 2008-10-29 21:25:00 -0700 | [diff] [blame] | 17 | #define RTRAP_PSTATE (PSTATE_TSO|PSTATE_PEF|PSTATE_PRIV|PSTATE_IE) |
| 18 | #define RTRAP_PSTATE_IRQOFF (PSTATE_TSO|PSTATE_PEF|PSTATE_PRIV) |
| 19 | #define RTRAP_PSTATE_AG_IRQOFF (PSTATE_TSO|PSTATE_PEF|PSTATE_PRIV|PSTATE_AG) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 20 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 21 | .text |
| 22 | .align 32 |
| 23 | __handle_softirq: |
| 24 | call do_softirq |
| 25 | nop |
| 26 | ba,a,pt %xcc, __handle_softirq_continue |
| 27 | nop |
| 28 | __handle_preemption: |
| 29 | call schedule |
| 30 | wrpr %g0, RTRAP_PSTATE, %pstate |
| 31 | ba,pt %xcc, __handle_preemption_continue |
| 32 | wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate |
| 33 | |
| 34 | __handle_user_windows: |
| 35 | call fault_in_user_windows |
| 36 | wrpr %g0, RTRAP_PSTATE, %pstate |
Al Viro | caebf91 | 2010-09-23 21:52:52 -0700 | [diff] [blame] | 37 | ba,pt %xcc, __handle_preemption_continue |
| 38 | wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 39 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 40 | __handle_userfpu: |
| 41 | rd %fprs, %l5 |
| 42 | andcc %l5, FPRS_FEF, %g0 |
| 43 | sethi %hi(TSTATE_PEF), %o0 |
| 44 | be,a,pn %icc, __handle_userfpu_continue |
| 45 | andn %l1, %o0, %l1 |
| 46 | ba,a,pt %xcc, __handle_userfpu_continue |
| 47 | |
| 48 | __handle_signal: |
David S. Miller | 2d7d5f0 | 2006-01-19 02:42:49 -0800 | [diff] [blame] | 49 | mov %l5, %o1 |
David S. Miller | 2d7d5f0 | 2006-01-19 02:42:49 -0800 | [diff] [blame] | 50 | add %sp, PTREGS_OFF, %o0 |
David S. Miller | 7697daa | 2008-04-24 03:15:22 -0700 | [diff] [blame] | 51 | mov %l0, %o2 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 52 | call do_notify_resume |
| 53 | wrpr %g0, RTRAP_PSTATE, %pstate |
| 54 | wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 55 | |
| 56 | /* Signal delivery can modify pt_regs tstate, so we must |
| 57 | * reload it. |
| 58 | */ |
| 59 | ldx [%sp + PTREGS_OFF + PT_V9_TSTATE], %l1 |
| 60 | sethi %hi(0xf << 20), %l4 |
| 61 | and %l1, %l4, %l4 |
Al Viro | caebf91 | 2010-09-23 21:52:52 -0700 | [diff] [blame] | 62 | ba,pt %xcc, __handle_preemption_continue |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 63 | andn %l1, %l4, %l1 |
| 64 | |
David S. Miller | 5565736 | 2008-11-25 22:24:59 -0800 | [diff] [blame] | 65 | /* When returning from a NMI (%pil==15) interrupt we want to |
| 66 | * avoid running softirqs, doing IRQ tracing, preempting, etc. |
| 67 | */ |
| 68 | .globl rtrap_nmi |
| 69 | rtrap_nmi: ldx [%sp + PTREGS_OFF + PT_V9_TSTATE], %l1 |
| 70 | sethi %hi(0xf << 20), %l4 |
| 71 | and %l1, %l4, %l4 |
| 72 | andn %l1, %l4, %l1 |
| 73 | srl %l4, 20, %l4 |
| 74 | ba,pt %xcc, rtrap_no_irq_enable |
| 75 | wrpr %l4, %pil |
| 76 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 77 | .align 64 |
David S. Miller | 7697daa | 2008-04-24 03:15:22 -0700 | [diff] [blame] | 78 | .globl rtrap_irq, rtrap, irqsz_patchme, rtrap_xcall |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 79 | rtrap_irq: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 80 | rtrap: |
David S. Miller | d7ce78f | 2005-08-29 22:46:43 -0700 | [diff] [blame] | 81 | #ifndef CONFIG_SMP |
Rusty Russell | dd17c8f | 2009-10-29 22:34:15 +0900 | [diff] [blame] | 82 | sethi %hi(__cpu_data), %l0 |
| 83 | lduw [%l0 + %lo(__cpu_data)], %l1 |
David S. Miller | d7ce78f | 2005-08-29 22:46:43 -0700 | [diff] [blame] | 84 | #else |
Rusty Russell | dd17c8f | 2009-10-29 22:34:15 +0900 | [diff] [blame] | 85 | sethi %hi(__cpu_data), %l0 |
| 86 | or %l0, %lo(__cpu_data), %l0 |
David S. Miller | d7ce78f | 2005-08-29 22:46:43 -0700 | [diff] [blame] | 87 | lduw [%l0 + %g5], %l1 |
| 88 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 89 | cmp %l1, 0 |
| 90 | |
| 91 | /* mm/ultra.S:xcall_report_regs KNOWS about this load. */ |
| 92 | bne,pn %icc, __handle_softirq |
| 93 | ldx [%sp + PTREGS_OFF + PT_V9_TSTATE], %l1 |
| 94 | __handle_softirq_continue: |
| 95 | rtrap_xcall: |
| 96 | sethi %hi(0xf << 20), %l4 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 97 | and %l1, %l4, %l4 |
David S. Miller | 10e2672 | 2006-11-16 13:38:57 -0800 | [diff] [blame] | 98 | andn %l1, %l4, %l1 |
| 99 | srl %l4, 20, %l4 |
| 100 | #ifdef CONFIG_TRACE_IRQFLAGS |
| 101 | brnz,pn %l4, rtrap_no_irq_enable |
| 102 | nop |
| 103 | call trace_hardirqs_on |
| 104 | nop |
David S. Miller | 28a1f53 | 2010-04-20 00:48:37 -0700 | [diff] [blame] | 105 | /* Do not actually set the %pil here. We will do that |
| 106 | * below after we clear PSTATE_IE in the %pstate register. |
| 107 | * If we re-enable interrupts here, we can recurse down |
| 108 | * the hardirq stack potentially endlessly, causing a |
| 109 | * stack overflow. |
| 110 | * |
| 111 | * It is tempting to put this test and trace_hardirqs_on |
| 112 | * call at the 'rt_continue' label, but that will not work |
| 113 | * as that path hits unconditionally and we do not want to |
| 114 | * execute this in NMI return paths, for example. |
| 115 | */ |
David S. Miller | 10e2672 | 2006-11-16 13:38:57 -0800 | [diff] [blame] | 116 | #endif |
David S. Miller | 5565736 | 2008-11-25 22:24:59 -0800 | [diff] [blame] | 117 | rtrap_no_irq_enable: |
David S. Miller | 10e2672 | 2006-11-16 13:38:57 -0800 | [diff] [blame] | 118 | andcc %l1, TSTATE_PRIV, %l3 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 119 | bne,pn %icc, to_kernel |
David S. Miller | 10e2672 | 2006-11-16 13:38:57 -0800 | [diff] [blame] | 120 | nop |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 121 | |
| 122 | /* We must hold IRQs off and atomically test schedule+signal |
| 123 | * state, then hold them off all the way back to userspace. |
David S. Miller | 10e2672 | 2006-11-16 13:38:57 -0800 | [diff] [blame] | 124 | * If we are returning to kernel, none of this matters. Note |
| 125 | * that we are disabling interrupts via PSTATE_IE, not using |
| 126 | * %pil. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 127 | * |
| 128 | * If we do not do this, there is a window where we would do |
| 129 | * the tests, later the signal/resched event arrives but we do |
| 130 | * not process it since we are still in kernel mode. It would |
| 131 | * take until the next local IRQ before the signal/resched |
| 132 | * event would be handled. |
| 133 | * |
David S. Miller | c7d5a00 | 2010-03-03 08:08:49 -0800 | [diff] [blame] | 134 | * This also means that if we have to deal with user |
| 135 | * windows, we have to redo all of these sched+signal checks |
| 136 | * with IRQs disabled. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 137 | */ |
| 138 | to_user: wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate |
| 139 | wrpr 0, %pil |
| 140 | __handle_preemption_continue: |
| 141 | ldx [%g6 + TI_FLAGS], %l0 |
| 142 | sethi %hi(_TIF_USER_WORK_MASK), %o0 |
| 143 | or %o0, %lo(_TIF_USER_WORK_MASK), %o0 |
| 144 | andcc %l0, %o0, %g0 |
| 145 | sethi %hi(TSTATE_PEF), %o0 |
| 146 | be,pt %xcc, user_nowork |
| 147 | andcc %l1, %o0, %g0 |
| 148 | andcc %l0, _TIF_NEED_RESCHED, %g0 |
| 149 | bne,pn %xcc, __handle_preemption |
Roland McGrath | e35a892 | 2008-04-20 15:06:49 -0700 | [diff] [blame] | 150 | andcc %l0, _TIF_DO_NOTIFY_RESUME_MASK, %g0 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 151 | bne,pn %xcc, __handle_signal |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 152 | ldub [%g6 + TI_WSAVED], %o2 |
| 153 | brnz,pn %o2, __handle_user_windows |
| 154 | nop |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 155 | sethi %hi(TSTATE_PEF), %o0 |
David S. Miller | c7d5a00 | 2010-03-03 08:08:49 -0800 | [diff] [blame] | 156 | andcc %l1, %o0, %g0 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 157 | |
| 158 | /* This fpdepth clear is necessary for non-syscall rtraps only */ |
| 159 | user_nowork: |
| 160 | bne,pn %xcc, __handle_userfpu |
| 161 | stb %g0, [%g6 + TI_FPDEPTH] |
| 162 | __handle_userfpu_continue: |
| 163 | |
| 164 | rt_continue: ldx [%sp + PTREGS_OFF + PT_V9_G1], %g1 |
| 165 | ldx [%sp + PTREGS_OFF + PT_V9_G2], %g2 |
| 166 | |
| 167 | ldx [%sp + PTREGS_OFF + PT_V9_G3], %g3 |
| 168 | ldx [%sp + PTREGS_OFF + PT_V9_G4], %g4 |
| 169 | ldx [%sp + PTREGS_OFF + PT_V9_G5], %g5 |
David S. Miller | 56fb4df | 2006-02-26 23:24:22 -0800 | [diff] [blame] | 170 | brz,pt %l3, 1f |
David S. Miller | 314981a | 2006-02-05 21:59:03 -0800 | [diff] [blame] | 171 | mov %g6, %l2 |
| 172 | |
David S. Miller | 56fb4df | 2006-02-26 23:24:22 -0800 | [diff] [blame] | 173 | /* Must do this before thread reg is clobbered below. */ |
David S. Miller | ffe483d | 2006-02-02 21:55:10 -0800 | [diff] [blame] | 174 | LOAD_PER_CPU_BASE(%g5, %g6, %i0, %i1, %i2) |
David S. Miller | 74bf431 | 2006-01-31 18:29:18 -0800 | [diff] [blame] | 175 | 1: |
| 176 | ldx [%sp + PTREGS_OFF + PT_V9_G6], %g6 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 177 | ldx [%sp + PTREGS_OFF + PT_V9_G7], %g7 |
David S. Miller | 936f482 | 2006-02-05 21:29:28 -0800 | [diff] [blame] | 178 | |
| 179 | /* Normal globals are restored, go to trap globals. */ |
| 180 | 661: wrpr %g0, RTRAP_PSTATE_AG_IRQOFF, %pstate |
David S. Miller | af02bec | 2006-02-16 16:23:45 -0800 | [diff] [blame] | 181 | nop |
| 182 | .section .sun4v_2insn_patch, "ax" |
David S. Miller | 936f482 | 2006-02-05 21:29:28 -0800 | [diff] [blame] | 183 | .word 661b |
David S. Miller | af02bec | 2006-02-16 16:23:45 -0800 | [diff] [blame] | 184 | wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate |
David S. Miller | 936f482 | 2006-02-05 21:29:28 -0800 | [diff] [blame] | 185 | SET_GL(1) |
| 186 | .previous |
| 187 | |
David S. Miller | 314981a | 2006-02-05 21:59:03 -0800 | [diff] [blame] | 188 | mov %l2, %g6 |
| 189 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 190 | ldx [%sp + PTREGS_OFF + PT_V9_I0], %i0 |
| 191 | ldx [%sp + PTREGS_OFF + PT_V9_I1], %i1 |
| 192 | |
| 193 | ldx [%sp + PTREGS_OFF + PT_V9_I2], %i2 |
| 194 | ldx [%sp + PTREGS_OFF + PT_V9_I3], %i3 |
| 195 | ldx [%sp + PTREGS_OFF + PT_V9_I4], %i4 |
| 196 | ldx [%sp + PTREGS_OFF + PT_V9_I5], %i5 |
| 197 | ldx [%sp + PTREGS_OFF + PT_V9_I6], %i6 |
| 198 | ldx [%sp + PTREGS_OFF + PT_V9_I7], %i7 |
| 199 | ldx [%sp + PTREGS_OFF + PT_V9_TPC], %l2 |
| 200 | ldx [%sp + PTREGS_OFF + PT_V9_TNPC], %o2 |
| 201 | |
| 202 | ld [%sp + PTREGS_OFF + PT_V9_Y], %o3 |
| 203 | wr %o3, %g0, %y |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 204 | wrpr %l4, 0x0, %pil |
| 205 | wrpr %g0, 0x1, %tl |
David S. Miller | 28e6103 | 2008-05-11 02:07:19 -0700 | [diff] [blame] | 206 | andn %l1, TSTATE_SYSCALL, %l1 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 207 | wrpr %l1, %g0, %tstate |
| 208 | wrpr %l2, %g0, %tpc |
| 209 | wrpr %o2, %g0, %tnpc |
| 210 | |
| 211 | brnz,pn %l3, kern_rtt |
| 212 | mov PRIMARY_CONTEXT, %l7 |
David S. Miller | 8b11bd1 | 2006-02-07 22:13:05 -0800 | [diff] [blame] | 213 | |
| 214 | 661: ldxa [%l7 + %l7] ASI_DMMU, %l0 |
| 215 | .section .sun4v_1insn_patch, "ax" |
| 216 | .word 661b |
| 217 | ldxa [%l7 + %l7] ASI_MMU, %l0 |
| 218 | .previous |
| 219 | |
David S. Miller | 0835ae0 | 2005-10-04 15:23:20 -0700 | [diff] [blame] | 220 | sethi %hi(sparc64_kern_pri_nuc_bits), %l1 |
| 221 | ldx [%l1 + %lo(sparc64_kern_pri_nuc_bits)], %l1 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 222 | or %l0, %l1, %l0 |
David S. Miller | 8b11bd1 | 2006-02-07 22:13:05 -0800 | [diff] [blame] | 223 | |
| 224 | 661: stxa %l0, [%l7] ASI_DMMU |
| 225 | .section .sun4v_1insn_patch, "ax" |
| 226 | .word 661b |
| 227 | stxa %l0, [%l7] ASI_MMU |
| 228 | .previous |
| 229 | |
David S. Miller | 4da808c | 2006-01-31 18:33:00 -0800 | [diff] [blame] | 230 | sethi %hi(KERNBASE), %l7 |
| 231 | flush %l7 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 232 | rdpr %wstate, %l1 |
| 233 | rdpr %otherwin, %l2 |
| 234 | srl %l1, 3, %l1 |
| 235 | |
| 236 | wrpr %l2, %g0, %canrestore |
| 237 | wrpr %l1, %g0, %wstate |
David S. Miller | 314ef68 | 2006-02-04 00:10:01 -0800 | [diff] [blame] | 238 | brnz,pt %l2, user_rtt_restore |
| 239 | wrpr %g0, %g0, %otherwin |
| 240 | |
| 241 | ldx [%g6 + TI_FLAGS], %g3 |
| 242 | wr %g0, ASI_AIUP, %asi |
| 243 | rdpr %cwp, %g1 |
| 244 | andcc %g3, _TIF_32BIT, %g0 |
| 245 | sub %g1, 1, %g1 |
| 246 | bne,pt %xcc, user_rtt_fill_32bit |
| 247 | wrpr %g1, %cwp |
| 248 | ba,a,pt %xcc, user_rtt_fill_64bit |
| 249 | |
| 250 | user_rtt_fill_fixup: |
| 251 | rdpr %cwp, %g1 |
| 252 | add %g1, 1, %g1 |
| 253 | wrpr %g1, 0x0, %cwp |
| 254 | |
| 255 | rdpr %wstate, %g2 |
| 256 | sll %g2, 3, %g2 |
| 257 | wrpr %g2, 0x0, %wstate |
| 258 | |
| 259 | /* We know %canrestore and %otherwin are both zero. */ |
| 260 | |
| 261 | sethi %hi(sparc64_kern_pri_context), %g2 |
| 262 | ldx [%g2 + %lo(sparc64_kern_pri_context)], %g2 |
| 263 | mov PRIMARY_CONTEXT, %g1 |
David S. Miller | 8b11bd1 | 2006-02-07 22:13:05 -0800 | [diff] [blame] | 264 | |
| 265 | 661: stxa %g2, [%g1] ASI_DMMU |
| 266 | .section .sun4v_1insn_patch, "ax" |
| 267 | .word 661b |
| 268 | stxa %g2, [%g1] ASI_MMU |
| 269 | .previous |
| 270 | |
David S. Miller | 314ef68 | 2006-02-04 00:10:01 -0800 | [diff] [blame] | 271 | sethi %hi(KERNBASE), %g1 |
| 272 | flush %g1 |
| 273 | |
| 274 | or %g4, FAULT_CODE_WINFIXUP, %g4 |
| 275 | stb %g4, [%g6 + TI_FAULT_CODE] |
| 276 | stx %g5, [%g6 + TI_FAULT_ADDR] |
| 277 | |
| 278 | mov %g6, %l1 |
| 279 | wrpr %g0, 0x0, %tl |
David S. Miller | 936f482 | 2006-02-05 21:29:28 -0800 | [diff] [blame] | 280 | |
| 281 | 661: nop |
David S. Miller | df7d6ae | 2006-02-07 00:00:16 -0800 | [diff] [blame] | 282 | .section .sun4v_1insn_patch, "ax" |
David S. Miller | 936f482 | 2006-02-05 21:29:28 -0800 | [diff] [blame] | 283 | .word 661b |
| 284 | SET_GL(0) |
| 285 | .previous |
| 286 | |
David S. Miller | fc50492 | 2006-02-22 16:15:45 -0800 | [diff] [blame] | 287 | wrpr %g0, RTRAP_PSTATE, %pstate |
| 288 | |
David S. Miller | 314ef68 | 2006-02-04 00:10:01 -0800 | [diff] [blame] | 289 | mov %l1, %g6 |
| 290 | ldx [%g6 + TI_TASK], %g4 |
| 291 | LOAD_PER_CPU_BASE(%g5, %g6, %g1, %g2, %g3) |
| 292 | call do_sparc64_fault |
| 293 | add %sp, PTREGS_OFF, %o0 |
| 294 | ba,pt %xcc, rtrap |
| 295 | nop |
| 296 | |
| 297 | user_rtt_pre_restore: |
| 298 | add %g1, 1, %g1 |
| 299 | wrpr %g1, 0x0, %cwp |
| 300 | |
| 301 | user_rtt_restore: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 302 | restore |
| 303 | rdpr %canrestore, %g1 |
| 304 | wrpr %g1, 0x0, %cleanwin |
| 305 | retry |
| 306 | nop |
| 307 | |
David S. Miller | 314ef68 | 2006-02-04 00:10:01 -0800 | [diff] [blame] | 308 | kern_rtt: rdpr %canrestore, %g1 |
| 309 | brz,pn %g1, kern_rtt_fill |
| 310 | nop |
| 311 | kern_rtt_restore: |
David S. Miller | ada44a0 | 2008-05-21 21:50:01 -0700 | [diff] [blame] | 312 | stw %g0, [%sp + PTREGS_OFF + PT_V9_MAGIC] |
David S. Miller | 314ef68 | 2006-02-04 00:10:01 -0800 | [diff] [blame] | 313 | restore |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 314 | retry |
David S. Miller | 314ef68 | 2006-02-04 00:10:01 -0800 | [diff] [blame] | 315 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 316 | to_kernel: |
| 317 | #ifdef CONFIG_PREEMPT |
| 318 | ldsw [%g6 + TI_PRE_COUNT], %l5 |
| 319 | brnz %l5, kern_fpucheck |
| 320 | ldx [%g6 + TI_FLAGS], %l5 |
| 321 | andcc %l5, _TIF_NEED_RESCHED, %g0 |
| 322 | be,pt %xcc, kern_fpucheck |
David S. Miller | 10e2672 | 2006-11-16 13:38:57 -0800 | [diff] [blame] | 323 | nop |
| 324 | cmp %l4, 0 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 325 | bne,pn %xcc, kern_fpucheck |
| 326 | sethi %hi(PREEMPT_ACTIVE), %l6 |
| 327 | stw %l6, [%g6 + TI_PRE_COUNT] |
| 328 | call schedule |
| 329 | nop |
| 330 | ba,pt %xcc, rtrap |
| 331 | stw %g0, [%g6 + TI_PRE_COUNT] |
| 332 | #endif |
| 333 | kern_fpucheck: ldub [%g6 + TI_FPDEPTH], %l5 |
| 334 | brz,pt %l5, rt_continue |
| 335 | srl %l5, 1, %o0 |
| 336 | add %g6, TI_FPSAVED, %l6 |
| 337 | ldub [%l6 + %o0], %l2 |
| 338 | sub %l5, 2, %l5 |
| 339 | |
| 340 | add %g6, TI_GSR, %o1 |
| 341 | andcc %l2, (FPRS_FEF|FPRS_DU), %g0 |
| 342 | be,pt %icc, 2f |
| 343 | and %l2, FPRS_DL, %l6 |
| 344 | andcc %l2, FPRS_FEF, %g0 |
| 345 | be,pn %icc, 5f |
| 346 | sll %o0, 3, %o5 |
| 347 | rd %fprs, %g1 |
| 348 | |
| 349 | wr %g1, FPRS_FEF, %fprs |
| 350 | ldx [%o1 + %o5], %g1 |
| 351 | add %g6, TI_XFSR, %o1 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 352 | sll %o0, 8, %o2 |
| 353 | add %g6, TI_FPREGS, %o3 |
| 354 | brz,pn %l6, 1f |
| 355 | add %g6, TI_FPREGS+0x40, %o4 |
| 356 | |
David S. Miller | ba639933 | 2005-10-07 13:30:49 -0700 | [diff] [blame] | 357 | membar #Sync |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 358 | ldda [%o3 + %o2] ASI_BLK_P, %f0 |
| 359 | ldda [%o4 + %o2] ASI_BLK_P, %f16 |
David S. Miller | ba639933 | 2005-10-07 13:30:49 -0700 | [diff] [blame] | 360 | membar #Sync |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 361 | 1: andcc %l2, FPRS_DU, %g0 |
| 362 | be,pn %icc, 1f |
| 363 | wr %g1, 0, %gsr |
| 364 | add %o2, 0x80, %o2 |
David S. Miller | ba639933 | 2005-10-07 13:30:49 -0700 | [diff] [blame] | 365 | membar #Sync |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 366 | ldda [%o3 + %o2] ASI_BLK_P, %f32 |
| 367 | ldda [%o4 + %o2] ASI_BLK_P, %f48 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 368 | 1: membar #Sync |
| 369 | ldx [%o1 + %o5], %fsr |
| 370 | 2: stb %l5, [%g6 + TI_FPDEPTH] |
| 371 | ba,pt %xcc, rt_continue |
| 372 | nop |
| 373 | 5: wr %g0, FPRS_FEF, %fprs |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 374 | sll %o0, 8, %o2 |
| 375 | |
| 376 | add %g6, TI_FPREGS+0x80, %o3 |
| 377 | add %g6, TI_FPREGS+0xc0, %o4 |
David S. Miller | ba639933 | 2005-10-07 13:30:49 -0700 | [diff] [blame] | 378 | membar #Sync |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 379 | ldda [%o3 + %o2] ASI_BLK_P, %f32 |
| 380 | ldda [%o4 + %o2] ASI_BLK_P, %f48 |
| 381 | membar #Sync |
| 382 | wr %g0, FPRS_DU, %fprs |
| 383 | ba,pt %xcc, rt_continue |
| 384 | stb %l5, [%g6 + TI_FPDEPTH] |