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Ben Dooks0d1bb412009-06-14 13:52:37 +01001/* linux/drivers/mmc/host/sdhci-s3c.c
2 *
3 * Copyright 2008 Openmoko Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
7 *
8 * SDHCI (HSMMC) support for Samsung SoC
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#include <linux/delay.h>
16#include <linux/dma-mapping.h>
17#include <linux/platform_device.h>
Arnd Bergmanncc014f32013-03-04 18:28:21 +010018#include <linux/platform_data/mmc-sdhci-s3c.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090019#include <linux/slab.h>
Ben Dooks0d1bb412009-06-14 13:52:37 +010020#include <linux/clk.h>
21#include <linux/io.h>
Marek Szyprowski17866e12010-08-10 18:01:58 -070022#include <linux/gpio.h>
Mark Brown55156d22011-07-29 15:35:00 +010023#include <linux/module.h>
Mark Brownd5e9c022012-03-03 00:46:41 +000024#include <linux/of.h>
25#include <linux/of_gpio.h>
26#include <linux/pm.h>
Mark Brown9f4e8152012-03-31 23:31:55 -040027#include <linux/pm_runtime.h>
Ben Dooks0d1bb412009-06-14 13:52:37 +010028
29#include <linux/mmc/host.h>
30
Arnd Bergmanncc014f32013-03-04 18:28:21 +010031#include "sdhci-s3c-regs.h"
Ben Dooks0d1bb412009-06-14 13:52:37 +010032#include "sdhci.h"
33
34#define MAX_BUS_CLK (4)
35
Thomas Abrahamcd1b00e2012-08-23 17:10:09 +000036/* Number of gpio's used is max data bus width + command and clock lines */
37#define NUM_GPIOS(x) (x + 2)
38
Ben Dooks0d1bb412009-06-14 13:52:37 +010039/**
40 * struct sdhci_s3c - S3C SDHCI instance
41 * @host: The SDHCI host created
42 * @pdev: The platform device we where created from.
43 * @ioarea: The resource created when we claimed the IO area.
44 * @pdata: The platform data for this controller.
45 * @cur_clk: The index of the current bus clock.
46 * @clk_io: The clock for the internal bus interface.
47 * @clk_bus: The clocks that are available for the SD/MMC bus clock.
48 */
49struct sdhci_s3c {
50 struct sdhci_host *host;
51 struct platform_device *pdev;
52 struct resource *ioarea;
53 struct s3c_sdhci_platdata *pdata;
54 unsigned int cur_clk;
Marek Szyprowski17866e12010-08-10 18:01:58 -070055 int ext_cd_irq;
56 int ext_cd_gpio;
Ben Dooks0d1bb412009-06-14 13:52:37 +010057
58 struct clk *clk_io;
59 struct clk *clk_bus[MAX_BUS_CLK];
60};
61
Thomas Abraham3119936a2012-02-16 22:23:58 +090062/**
63 * struct sdhci_s3c_driver_data - S3C SDHCI platform specific driver data
64 * @sdhci_quirks: sdhci host specific quirks.
65 *
66 * Specifies platform specific configuration of sdhci controller.
67 * Note: A structure for driver specific platform data is used for future
68 * expansion of its usage.
69 */
70struct sdhci_s3c_drv_data {
71 unsigned int sdhci_quirks;
72};
73
Ben Dooks0d1bb412009-06-14 13:52:37 +010074static inline struct sdhci_s3c *to_s3c(struct sdhci_host *host)
75{
76 return sdhci_priv(host);
77}
78
79/**
80 * get_curclk - convert ctrl2 register to clock source number
81 * @ctrl2: Control2 register value.
82 */
83static u32 get_curclk(u32 ctrl2)
84{
85 ctrl2 &= S3C_SDHCI_CTRL2_SELBASECLK_MASK;
86 ctrl2 >>= S3C_SDHCI_CTRL2_SELBASECLK_SHIFT;
87
88 return ctrl2;
89}
90
91static void sdhci_s3c_check_sclk(struct sdhci_host *host)
92{
93 struct sdhci_s3c *ourhost = to_s3c(host);
94 u32 tmp = readl(host->ioaddr + S3C_SDHCI_CONTROL2);
95
96 if (get_curclk(tmp) != ourhost->cur_clk) {
97 dev_dbg(&ourhost->pdev->dev, "restored ctrl2 clock setting\n");
98
99 tmp &= ~S3C_SDHCI_CTRL2_SELBASECLK_MASK;
100 tmp |= ourhost->cur_clk << S3C_SDHCI_CTRL2_SELBASECLK_SHIFT;
Jingoo Han7003fec2011-12-14 13:25:46 +0900101 writel(tmp, host->ioaddr + S3C_SDHCI_CONTROL2);
Ben Dooks0d1bb412009-06-14 13:52:37 +0100102 }
103}
104
105/**
106 * sdhci_s3c_get_max_clk - callback to get maximum clock frequency.
107 * @host: The SDHCI host instance.
108 *
109 * Callback to return the maximum clock rate acheivable by the controller.
110*/
111static unsigned int sdhci_s3c_get_max_clk(struct sdhci_host *host)
112{
113 struct sdhci_s3c *ourhost = to_s3c(host);
114 struct clk *busclk;
115 unsigned int rate, max;
116 int clk;
117
118 /* note, a reset will reset the clock source */
119
120 sdhci_s3c_check_sclk(host);
121
122 for (max = 0, clk = 0; clk < MAX_BUS_CLK; clk++) {
123 busclk = ourhost->clk_bus[clk];
124 if (!busclk)
125 continue;
126
127 rate = clk_get_rate(busclk);
128 if (rate > max)
129 max = rate;
130 }
131
132 return max;
133}
134
Ben Dooks0d1bb412009-06-14 13:52:37 +0100135/**
136 * sdhci_s3c_consider_clock - consider one the bus clocks for current setting
137 * @ourhost: Our SDHCI instance.
138 * @src: The source clock index.
139 * @wanted: The clock frequency wanted.
140 */
141static unsigned int sdhci_s3c_consider_clock(struct sdhci_s3c *ourhost,
142 unsigned int src,
143 unsigned int wanted)
144{
145 unsigned long rate;
146 struct clk *clksrc = ourhost->clk_bus[src];
147 int div;
148
149 if (!clksrc)
150 return UINT_MAX;
151
Jeongbae Seo253e0a72010-10-08 17:46:21 +0900152 /*
Thomas Abraham3119936a2012-02-16 22:23:58 +0900153 * If controller uses a non-standard clock division, find the best clock
154 * speed possible with selected clock source and skip the division.
Jeongbae Seo253e0a72010-10-08 17:46:21 +0900155 */
Thomas Abraham3119936a2012-02-16 22:23:58 +0900156 if (ourhost->host->quirks & SDHCI_QUIRK_NONSTANDARD_CLOCK) {
Jeongbae Seo253e0a72010-10-08 17:46:21 +0900157 rate = clk_round_rate(clksrc, wanted);
158 return wanted - rate;
159 }
160
Ben Dooks0d1bb412009-06-14 13:52:37 +0100161 rate = clk_get_rate(clksrc);
162
163 for (div = 1; div < 256; div *= 2) {
164 if ((rate / div) <= wanted)
165 break;
166 }
167
168 dev_dbg(&ourhost->pdev->dev, "clk %d: rate %ld, want %d, got %ld\n",
169 src, rate, wanted, rate / div);
170
Jingoo Han2ad0b242012-08-29 14:35:06 +0900171 return wanted - (rate / div);
Ben Dooks0d1bb412009-06-14 13:52:37 +0100172}
173
174/**
175 * sdhci_s3c_set_clock - callback on clock change
176 * @host: The SDHCI host being changed
177 * @clock: The clock rate being requested.
178 *
179 * When the card's clock is going to be changed, look at the new frequency
180 * and find the best clock source to go with it.
181*/
182static void sdhci_s3c_set_clock(struct sdhci_host *host, unsigned int clock)
183{
184 struct sdhci_s3c *ourhost = to_s3c(host);
185 unsigned int best = UINT_MAX;
186 unsigned int delta;
187 int best_src = 0;
188 int src;
189 u32 ctrl;
190
191 /* don't bother if the clock is going off. */
192 if (clock == 0)
193 return;
194
195 for (src = 0; src < MAX_BUS_CLK; src++) {
196 delta = sdhci_s3c_consider_clock(ourhost, src, clock);
197 if (delta < best) {
198 best = delta;
199 best_src = src;
200 }
201 }
202
203 dev_dbg(&ourhost->pdev->dev,
204 "selected source %d, clock %d, delta %d\n",
205 best_src, clock, best);
206
207 /* select the new clock source */
Ben Dooks0d1bb412009-06-14 13:52:37 +0100208 if (ourhost->cur_clk != best_src) {
209 struct clk *clk = ourhost->clk_bus[best_src];
210
Thomas Abraham0f310a02012-10-03 08:35:43 +0900211 clk_prepare_enable(clk);
212 clk_disable_unprepare(ourhost->clk_bus[ourhost->cur_clk]);
Chander Kashyape684c462012-09-14 09:08:49 +0000213
Ben Dooks0d1bb412009-06-14 13:52:37 +0100214 /* turn clock off to card before changing clock source */
215 writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL);
216
217 ourhost->cur_clk = best_src;
218 host->max_clk = clk_get_rate(clk);
Ben Dooks0d1bb412009-06-14 13:52:37 +0100219
220 ctrl = readl(host->ioaddr + S3C_SDHCI_CONTROL2);
221 ctrl &= ~S3C_SDHCI_CTRL2_SELBASECLK_MASK;
222 ctrl |= best_src << S3C_SDHCI_CTRL2_SELBASECLK_SHIFT;
223 writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL2);
224 }
225
Thomas Abraham6fe47172011-09-14 12:39:17 +0530226 /* reprogram default hardware configuration */
227 writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA,
228 host->ioaddr + S3C64XX_SDHCI_CONTROL4);
Ben Dooks0d1bb412009-06-14 13:52:37 +0100229
Thomas Abraham6fe47172011-09-14 12:39:17 +0530230 ctrl = readl(host->ioaddr + S3C_SDHCI_CONTROL2);
231 ctrl |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR |
232 S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK |
233 S3C_SDHCI_CTRL2_ENFBCLKRX |
234 S3C_SDHCI_CTRL2_DFCNT_NONE |
235 S3C_SDHCI_CTRL2_ENCLKOUTHOLD);
236 writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL2);
Ben Dooks0d1bb412009-06-14 13:52:37 +0100237
Thomas Abraham6fe47172011-09-14 12:39:17 +0530238 /* reconfigure the controller for new clock rate */
239 ctrl = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0);
240 if (clock < 25 * 1000000)
241 ctrl |= (S3C_SDHCI_CTRL3_FCSEL3 | S3C_SDHCI_CTRL3_FCSEL2);
242 writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL3);
Ben Dooks0d1bb412009-06-14 13:52:37 +0100243}
244
Marek Szyprowskice5f0362010-08-10 18:01:56 -0700245/**
246 * sdhci_s3c_get_min_clock - callback to get minimal supported clock value
247 * @host: The SDHCI host being queried
248 *
249 * To init mmc host properly a minimal clock value is needed. For high system
250 * bus clock's values the standard formula gives values out of allowed range.
251 * The clock still can be set to lower values, if clock source other then
252 * system bus is selected.
253*/
254static unsigned int sdhci_s3c_get_min_clock(struct sdhci_host *host)
255{
256 struct sdhci_s3c *ourhost = to_s3c(host);
257 unsigned int delta, min = UINT_MAX;
258 int src;
259
260 for (src = 0; src < MAX_BUS_CLK; src++) {
261 delta = sdhci_s3c_consider_clock(ourhost, src, 0);
262 if (delta == UINT_MAX)
263 continue;
264 /* delta is a negative value in this case */
265 if (-delta < min)
266 min = -delta;
267 }
268 return min;
269}
270
Jeongbae Seo253e0a72010-10-08 17:46:21 +0900271/* sdhci_cmu_get_max_clk - callback to get maximum clock frequency.*/
272static unsigned int sdhci_cmu_get_max_clock(struct sdhci_host *host)
273{
274 struct sdhci_s3c *ourhost = to_s3c(host);
275
276 return clk_round_rate(ourhost->clk_bus[ourhost->cur_clk], UINT_MAX);
277}
278
279/* sdhci_cmu_get_min_clock - callback to get minimal supported clock value. */
280static unsigned int sdhci_cmu_get_min_clock(struct sdhci_host *host)
281{
282 struct sdhci_s3c *ourhost = to_s3c(host);
283
284 /*
285 * initial clock can be in the frequency range of
286 * 100KHz-400KHz, so we set it as max value.
287 */
288 return clk_round_rate(ourhost->clk_bus[ourhost->cur_clk], 400000);
289}
290
291/* sdhci_cmu_set_clock - callback on clock change.*/
292static void sdhci_cmu_set_clock(struct sdhci_host *host, unsigned int clock)
293{
294 struct sdhci_s3c *ourhost = to_s3c(host);
Jingoo Han2ad0b242012-08-29 14:35:06 +0900295 struct device *dev = &ourhost->pdev->dev;
Thomas Abraham3119936a2012-02-16 22:23:58 +0900296 unsigned long timeout;
297 u16 clk = 0;
Jeongbae Seo253e0a72010-10-08 17:46:21 +0900298
Jaehoon Chung7ef2a5e2013-08-02 23:08:58 +0900299 /* If the clock is going off, set to 0 at clock control register */
300 if (clock == 0) {
301 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);
302 host->clock = clock;
Jeongbae Seo253e0a72010-10-08 17:46:21 +0900303 return;
Jaehoon Chung7ef2a5e2013-08-02 23:08:58 +0900304 }
Jeongbae Seo253e0a72010-10-08 17:46:21 +0900305
306 sdhci_s3c_set_clock(host, clock);
307
308 clk_set_rate(ourhost->clk_bus[ourhost->cur_clk], clock);
309
310 host->clock = clock;
Thomas Abraham3119936a2012-02-16 22:23:58 +0900311
312 clk = SDHCI_CLOCK_INT_EN;
313 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
314
315 /* Wait max 20 ms */
316 timeout = 20;
317 while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL))
318 & SDHCI_CLOCK_INT_STABLE)) {
319 if (timeout == 0) {
Jingoo Han2ad0b242012-08-29 14:35:06 +0900320 dev_err(dev, "%s: Internal clock never stabilised.\n",
321 mmc_hostname(host->mmc));
Thomas Abraham3119936a2012-02-16 22:23:58 +0900322 return;
323 }
324 timeout--;
325 mdelay(1);
326 }
327
328 clk |= SDHCI_CLOCK_CARD_EN;
329 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
Jeongbae Seo253e0a72010-10-08 17:46:21 +0900330}
331
Jaehoon Chung548f07d2011-01-12 11:59:12 +0900332/**
Sascha Hauer7bc088d2013-01-21 19:02:27 +0800333 * sdhci_s3c_platform_bus_width - support 8bit buswidth
Jaehoon Chung548f07d2011-01-12 11:59:12 +0900334 * @host: The SDHCI host being queried
335 * @width: MMC_BUS_WIDTH_ macro for the bus width being requested
336 *
337 * We have 8-bit width support but is not a v3 controller.
Sascha Hauer7bc088d2013-01-21 19:02:27 +0800338 * So we add platform_bus_width() and support 8bit width.
Jaehoon Chung548f07d2011-01-12 11:59:12 +0900339 */
Sascha Hauer7bc088d2013-01-21 19:02:27 +0800340static int sdhci_s3c_platform_bus_width(struct sdhci_host *host, int width)
Jaehoon Chung548f07d2011-01-12 11:59:12 +0900341{
342 u8 ctrl;
343
344 ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
345
346 switch (width) {
347 case MMC_BUS_WIDTH_8:
348 ctrl |= SDHCI_CTRL_8BITBUS;
349 ctrl &= ~SDHCI_CTRL_4BITBUS;
350 break;
351 case MMC_BUS_WIDTH_4:
352 ctrl |= SDHCI_CTRL_4BITBUS;
353 ctrl &= ~SDHCI_CTRL_8BITBUS;
354 break;
355 default:
Girish K S49bb1e62011-08-26 14:58:18 +0530356 ctrl &= ~SDHCI_CTRL_4BITBUS;
357 ctrl &= ~SDHCI_CTRL_8BITBUS;
Jaehoon Chung548f07d2011-01-12 11:59:12 +0900358 break;
359 }
360
361 sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
362
363 return 0;
364}
365
Ben Dooks0d1bb412009-06-14 13:52:37 +0100366static struct sdhci_ops sdhci_s3c_ops = {
367 .get_max_clock = sdhci_s3c_get_max_clk,
Ben Dooks0d1bb412009-06-14 13:52:37 +0100368 .set_clock = sdhci_s3c_set_clock,
Marek Szyprowskice5f0362010-08-10 18:01:56 -0700369 .get_min_clock = sdhci_s3c_get_min_clock,
Sascha Hauer7bc088d2013-01-21 19:02:27 +0800370 .platform_bus_width = sdhci_s3c_platform_bus_width,
Ben Dooks0d1bb412009-06-14 13:52:37 +0100371};
372
Marek Szyprowski17866e12010-08-10 18:01:58 -0700373static void sdhci_s3c_notify_change(struct platform_device *dev, int state)
374{
375 struct sdhci_host *host = platform_get_drvdata(dev);
Sachin Kamat4577f772012-12-04 17:03:07 +0530376#ifdef CONFIG_PM_RUNTIME
Heiko Stübnerfe007c02012-11-18 19:50:05 +0100377 struct sdhci_s3c *sc = sdhci_priv(host);
Sachin Kamat4577f772012-12-04 17:03:07 +0530378#endif
Marek Szyprowski06fe5772010-09-20 15:03:42 +0200379 unsigned long flags;
380
Marek Szyprowski17866e12010-08-10 18:01:58 -0700381 if (host) {
Marek Szyprowski06fe5772010-09-20 15:03:42 +0200382 spin_lock_irqsave(&host->lock, flags);
Marek Szyprowski17866e12010-08-10 18:01:58 -0700383 if (state) {
384 dev_dbg(&dev->dev, "card inserted.\n");
Heiko Stübnerfe007c02012-11-18 19:50:05 +0100385#ifdef CONFIG_PM_RUNTIME
386 clk_prepare_enable(sc->clk_io);
387#endif
Marek Szyprowski17866e12010-08-10 18:01:58 -0700388 host->flags &= ~SDHCI_DEVICE_DEAD;
389 host->quirks |= SDHCI_QUIRK_BROKEN_CARD_DETECTION;
390 } else {
391 dev_dbg(&dev->dev, "card removed.\n");
392 host->flags |= SDHCI_DEVICE_DEAD;
393 host->quirks &= ~SDHCI_QUIRK_BROKEN_CARD_DETECTION;
Heiko Stübnerfe007c02012-11-18 19:50:05 +0100394#ifdef CONFIG_PM_RUNTIME
395 clk_disable_unprepare(sc->clk_io);
396#endif
Marek Szyprowski17866e12010-08-10 18:01:58 -0700397 }
Kyungmin Parkf5228862010-08-19 14:13:37 -0700398 tasklet_schedule(&host->card_tasklet);
Marek Szyprowski06fe5772010-09-20 15:03:42 +0200399 spin_unlock_irqrestore(&host->lock, flags);
Marek Szyprowski17866e12010-08-10 18:01:58 -0700400 }
401}
402
403static irqreturn_t sdhci_s3c_gpio_card_detect_thread(int irq, void *dev_id)
404{
405 struct sdhci_s3c *sc = dev_id;
406 int status = gpio_get_value(sc->ext_cd_gpio);
407 if (sc->pdata->ext_cd_gpio_invert)
408 status = !status;
409 sdhci_s3c_notify_change(sc->pdev, status);
410 return IRQ_HANDLED;
411}
412
413static void sdhci_s3c_setup_card_detect_gpio(struct sdhci_s3c *sc)
414{
415 struct s3c_sdhci_platdata *pdata = sc->pdata;
416 struct device *dev = &sc->pdev->dev;
417
Tomasz Figab1b8fea2012-11-25 15:40:44 -0500418 if (devm_gpio_request(dev, pdata->ext_cd_gpio, "SDHCI EXT CD") == 0) {
Marek Szyprowski17866e12010-08-10 18:01:58 -0700419 sc->ext_cd_gpio = pdata->ext_cd_gpio;
420 sc->ext_cd_irq = gpio_to_irq(pdata->ext_cd_gpio);
421 if (sc->ext_cd_irq &&
422 request_threaded_irq(sc->ext_cd_irq, NULL,
423 sdhci_s3c_gpio_card_detect_thread,
Jingoo Han2ad0b242012-08-29 14:35:06 +0900424 IRQF_TRIGGER_RISING |
425 IRQF_TRIGGER_FALLING |
426 IRQF_ONESHOT,
Marek Szyprowski17866e12010-08-10 18:01:58 -0700427 dev_name(dev), sc) == 0) {
428 int status = gpio_get_value(sc->ext_cd_gpio);
429 if (pdata->ext_cd_gpio_invert)
430 status = !status;
431 sdhci_s3c_notify_change(sc->pdev, status);
432 } else {
433 dev_warn(dev, "cannot request irq for card detect\n");
434 sc->ext_cd_irq = 0;
435 }
436 } else {
437 dev_err(dev, "cannot request gpio for card detect\n");
438 }
439}
440
Thomas Abrahamcd1b00e2012-08-23 17:10:09 +0000441#ifdef CONFIG_OF
Bill Pembertonc3be1ef2012-11-19 13:23:06 -0500442static int sdhci_s3c_parse_dt(struct device *dev,
Thomas Abrahamcd1b00e2012-08-23 17:10:09 +0000443 struct sdhci_host *host, struct s3c_sdhci_platdata *pdata)
444{
445 struct device_node *node = dev->of_node;
446 struct sdhci_s3c *ourhost = to_s3c(host);
447 u32 max_width;
Thomas Abrahame19499a2013-03-06 17:06:16 +0530448 int gpio;
Thomas Abrahamcd1b00e2012-08-23 17:10:09 +0000449
450 /* if the bus-width property is not specified, assume width as 1 */
451 if (of_property_read_u32(node, "bus-width", &max_width))
452 max_width = 1;
453 pdata->max_width = max_width;
454
Thomas Abrahamcd1b00e2012-08-23 17:10:09 +0000455 /* get the card detection method */
Tushar Beheraab5023e2012-11-20 09:41:53 +0530456 if (of_get_property(node, "broken-cd", NULL)) {
Thomas Abrahamcd1b00e2012-08-23 17:10:09 +0000457 pdata->cd_type = S3C_SDHCI_CD_NONE;
Thomas Abrahame19499a2013-03-06 17:06:16 +0530458 return 0;
Thomas Abrahamcd1b00e2012-08-23 17:10:09 +0000459 }
460
Tushar Beheraab5023e2012-11-20 09:41:53 +0530461 if (of_get_property(node, "non-removable", NULL)) {
Thomas Abrahamcd1b00e2012-08-23 17:10:09 +0000462 pdata->cd_type = S3C_SDHCI_CD_PERMANENT;
Thomas Abrahame19499a2013-03-06 17:06:16 +0530463 return 0;
Thomas Abrahamcd1b00e2012-08-23 17:10:09 +0000464 }
465
466 gpio = of_get_named_gpio(node, "cd-gpios", 0);
467 if (gpio_is_valid(gpio)) {
468 pdata->cd_type = S3C_SDHCI_CD_GPIO;
Thomas Abrahame19499a2013-03-06 17:06:16 +0530469 pdata->ext_cd_gpio = gpio;
470 ourhost->ext_cd_gpio = -1;
471 if (of_get_property(node, "cd-inverted", NULL))
472 pdata->ext_cd_gpio_invert = 1;
473 return 0;
Thomas Abrahamcd1b00e2012-08-23 17:10:09 +0000474 } else if (gpio != -ENOENT) {
475 dev_err(dev, "invalid card detect gpio specified\n");
476 return -EINVAL;
477 }
478
Tomasz Figab96efcc2012-11-16 15:28:17 +0100479 /* assuming internal card detect that will be configured by pinctrl */
480 pdata->cd_type = S3C_SDHCI_CD_INTERNAL;
Thomas Abrahamcd1b00e2012-08-23 17:10:09 +0000481 return 0;
Thomas Abrahamcd1b00e2012-08-23 17:10:09 +0000482}
483#else
Bill Pembertonc3be1ef2012-11-19 13:23:06 -0500484static int sdhci_s3c_parse_dt(struct device *dev,
Thomas Abrahamcd1b00e2012-08-23 17:10:09 +0000485 struct sdhci_host *host, struct s3c_sdhci_platdata *pdata)
486{
487 return -EINVAL;
488}
489#endif
490
491static const struct of_device_id sdhci_s3c_dt_match[];
492
Thomas Abraham3119936a2012-02-16 22:23:58 +0900493static inline struct sdhci_s3c_drv_data *sdhci_s3c_get_driver_data(
494 struct platform_device *pdev)
495{
Thomas Abrahamcd1b00e2012-08-23 17:10:09 +0000496#ifdef CONFIG_OF
497 if (pdev->dev.of_node) {
498 const struct of_device_id *match;
499 match = of_match_node(sdhci_s3c_dt_match, pdev->dev.of_node);
500 return (struct sdhci_s3c_drv_data *)match->data;
501 }
502#endif
Thomas Abraham3119936a2012-02-16 22:23:58 +0900503 return (struct sdhci_s3c_drv_data *)
504 platform_get_device_id(pdev)->driver_data;
505}
506
Bill Pembertonc3be1ef2012-11-19 13:23:06 -0500507static int sdhci_s3c_probe(struct platform_device *pdev)
Ben Dooks0d1bb412009-06-14 13:52:37 +0100508{
Thomas Abraham1d4dc332012-02-16 22:23:59 +0900509 struct s3c_sdhci_platdata *pdata;
Thomas Abraham3119936a2012-02-16 22:23:58 +0900510 struct sdhci_s3c_drv_data *drv_data;
Ben Dooks0d1bb412009-06-14 13:52:37 +0100511 struct device *dev = &pdev->dev;
512 struct sdhci_host *host;
513 struct sdhci_s3c *sc;
514 struct resource *res;
515 int ret, irq, ptr, clks;
516
Thomas Abrahamcd1b00e2012-08-23 17:10:09 +0000517 if (!pdev->dev.platform_data && !pdev->dev.of_node) {
Ben Dooks0d1bb412009-06-14 13:52:37 +0100518 dev_err(dev, "no device data specified\n");
519 return -ENOENT;
520 }
521
522 irq = platform_get_irq(pdev, 0);
523 if (irq < 0) {
524 dev_err(dev, "no irq specified\n");
525 return irq;
526 }
527
Ben Dooks0d1bb412009-06-14 13:52:37 +0100528 host = sdhci_alloc_host(dev, sizeof(struct sdhci_s3c));
529 if (IS_ERR(host)) {
530 dev_err(dev, "sdhci_alloc_host() failed\n");
531 return PTR_ERR(host);
532 }
Thomas Abrahamcd1b00e2012-08-23 17:10:09 +0000533 sc = sdhci_priv(host);
Ben Dooks0d1bb412009-06-14 13:52:37 +0100534
Thomas Abraham1d4dc332012-02-16 22:23:59 +0900535 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
536 if (!pdata) {
537 ret = -ENOMEM;
Tomasz Figab1b8fea2012-11-25 15:40:44 -0500538 goto err_pdata_io_clk;
Thomas Abraham1d4dc332012-02-16 22:23:59 +0900539 }
Thomas Abrahamcd1b00e2012-08-23 17:10:09 +0000540
541 if (pdev->dev.of_node) {
542 ret = sdhci_s3c_parse_dt(&pdev->dev, host, pdata);
543 if (ret)
Tomasz Figab1b8fea2012-11-25 15:40:44 -0500544 goto err_pdata_io_clk;
Thomas Abrahamcd1b00e2012-08-23 17:10:09 +0000545 } else {
546 memcpy(pdata, pdev->dev.platform_data, sizeof(*pdata));
547 sc->ext_cd_gpio = -1; /* invalid gpio number */
548 }
Thomas Abraham1d4dc332012-02-16 22:23:59 +0900549
Thomas Abraham3119936a2012-02-16 22:23:58 +0900550 drv_data = sdhci_s3c_get_driver_data(pdev);
Ben Dooks0d1bb412009-06-14 13:52:37 +0100551
552 sc->host = host;
553 sc->pdev = pdev;
554 sc->pdata = pdata;
555
556 platform_set_drvdata(pdev, host);
557
Jingoo Han3aaf7ba2013-02-12 12:24:39 +0900558 sc->clk_io = devm_clk_get(dev, "hsmmc");
Ben Dooks0d1bb412009-06-14 13:52:37 +0100559 if (IS_ERR(sc->clk_io)) {
560 dev_err(dev, "failed to get io clock\n");
561 ret = PTR_ERR(sc->clk_io);
Tomasz Figab1b8fea2012-11-25 15:40:44 -0500562 goto err_pdata_io_clk;
Ben Dooks0d1bb412009-06-14 13:52:37 +0100563 }
564
565 /* enable the local io clock and keep it running for the moment. */
Thomas Abraham0f310a02012-10-03 08:35:43 +0900566 clk_prepare_enable(sc->clk_io);
Ben Dooks0d1bb412009-06-14 13:52:37 +0100567
568 for (clks = 0, ptr = 0; ptr < MAX_BUS_CLK; ptr++) {
569 struct clk *clk;
Rajeshwari Shinde4346b6d2011-11-03 10:52:58 +0900570 char name[14];
Ben Dooks0d1bb412009-06-14 13:52:37 +0100571
Rajeshwari Shinde4346b6d2011-11-03 10:52:58 +0900572 snprintf(name, 14, "mmc_busclk.%d", ptr);
Jingoo Han3aaf7ba2013-02-12 12:24:39 +0900573 clk = devm_clk_get(dev, name);
Jingoo Han2ad0b242012-08-29 14:35:06 +0900574 if (IS_ERR(clk))
Ben Dooks0d1bb412009-06-14 13:52:37 +0100575 continue;
Ben Dooks0d1bb412009-06-14 13:52:37 +0100576
577 clks++;
578 sc->clk_bus[ptr] = clk;
Jeongbae Seo253e0a72010-10-08 17:46:21 +0900579
580 /*
581 * save current clock index to know which clock bus
582 * is used later in overriding functions.
583 */
584 sc->cur_clk = ptr;
585
Ben Dooks0d1bb412009-06-14 13:52:37 +0100586 dev_info(dev, "clock source %d: %s (%ld Hz)\n",
587 ptr, name, clk_get_rate(clk));
588 }
589
590 if (clks == 0) {
591 dev_err(dev, "failed to find any bus clocks\n");
592 ret = -ENOENT;
593 goto err_no_busclks;
594 }
595
Chander Kashyap2abeb5c2012-09-21 05:42:08 +0000596#ifndef CONFIG_PM_RUNTIME
Thomas Abraham0f310a02012-10-03 08:35:43 +0900597 clk_prepare_enable(sc->clk_bus[sc->cur_clk]);
Chander Kashyap2abeb5c2012-09-21 05:42:08 +0000598#endif
Chander Kashyape684c462012-09-14 09:08:49 +0000599
Julia Lawall9bda6da2012-03-08 23:24:53 -0500600 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
Thierry Redinga3e2cd72013-01-21 11:09:11 +0100601 host->ioaddr = devm_ioremap_resource(&pdev->dev, res);
602 if (IS_ERR(host->ioaddr)) {
603 ret = PTR_ERR(host->ioaddr);
Ben Dooks0d1bb412009-06-14 13:52:37 +0100604 goto err_req_regs;
605 }
606
607 /* Ensure we have minimal gpio selected CMD/CLK/Detect */
608 if (pdata->cfg_gpio)
609 pdata->cfg_gpio(pdev, pdata->max_width);
610
611 host->hw_name = "samsung-hsmmc";
612 host->ops = &sdhci_s3c_ops;
613 host->quirks = 0;
Jaehoon Chung285e2442013-08-02 23:09:00 +0900614 host->quirks2 = 0;
Ben Dooks0d1bb412009-06-14 13:52:37 +0100615 host->irq = irq;
616
617 /* Setup quirks for the controller */
Thomas Abrahamb2e75ef2010-05-26 14:42:05 -0700618 host->quirks |= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC;
Marek Szyprowskia1d56462010-08-10 18:01:57 -0700619 host->quirks |= SDHCI_QUIRK_NO_HISPD_BIT;
Thomas Abraham3119936a2012-02-16 22:23:58 +0900620 if (drv_data)
621 host->quirks |= drv_data->sdhci_quirks;
Ben Dooks0d1bb412009-06-14 13:52:37 +0100622
623#ifndef CONFIG_MMC_SDHCI_S3C_DMA
624
625 /* we currently see overruns on errors, so disable the SDMA
626 * support as well. */
627 host->quirks |= SDHCI_QUIRK_BROKEN_DMA;
628
Ben Dooks0d1bb412009-06-14 13:52:37 +0100629#endif /* CONFIG_MMC_SDHCI_S3C_DMA */
630
631 /* It seems we do not get an DATA transfer complete on non-busy
632 * transfers, not sure if this is a problem with this specific
633 * SDHCI block, or a missing configuration that needs to be set. */
634 host->quirks |= SDHCI_QUIRK_NO_BUSY_IRQ;
635
Kyungmin Park732f0e32010-10-30 12:58:56 +0900636 /* This host supports the Auto CMD12 */
637 host->quirks |= SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12;
638
Jaehoon Chung7199e2b2011-07-12 17:30:47 +0900639 /* Samsung SoCs need BROKEN_ADMA_ZEROLEN_DESC */
640 host->quirks |= SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC;
641
Marek Szyprowski17866e12010-08-10 18:01:58 -0700642 if (pdata->cd_type == S3C_SDHCI_CD_NONE ||
643 pdata->cd_type == S3C_SDHCI_CD_PERMANENT)
644 host->quirks |= SDHCI_QUIRK_BROKEN_CARD_DETECTION;
645
646 if (pdata->cd_type == S3C_SDHCI_CD_PERMANENT)
647 host->mmc->caps = MMC_CAP_NONREMOVABLE;
648
Thomas Abraham0d22c772012-03-31 23:29:45 -0400649 switch (pdata->max_width) {
650 case 8:
651 host->mmc->caps |= MMC_CAP_8_BIT_DATA;
652 case 4:
653 host->mmc->caps |= MMC_CAP_4_BIT_DATA;
654 break;
655 }
656
Sangwook Leefa1773c2011-11-07 17:05:22 +0000657 if (pdata->pm_caps)
658 host->mmc->pm_caps |= pdata->pm_caps;
659
Ben Dooks0d1bb412009-06-14 13:52:37 +0100660 host->quirks |= (SDHCI_QUIRK_32BIT_DMA_ADDR |
661 SDHCI_QUIRK_32BIT_DMA_SIZE);
662
Hyuk Lee3fe42e02010-08-10 18:01:55 -0700663 /* HSMMC on Samsung SoCs uses SDCLK as timeout clock */
664 host->quirks |= SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK;
665
Jeongbae Seo253e0a72010-10-08 17:46:21 +0900666 /*
667 * If controller does not have internal clock divider,
668 * we can use overriding functions instead of default.
669 */
Thomas Abraham3119936a2012-02-16 22:23:58 +0900670 if (host->quirks & SDHCI_QUIRK_NONSTANDARD_CLOCK) {
Jeongbae Seo253e0a72010-10-08 17:46:21 +0900671 sdhci_s3c_ops.set_clock = sdhci_cmu_set_clock;
672 sdhci_s3c_ops.get_min_clock = sdhci_cmu_get_min_clock;
673 sdhci_s3c_ops.get_max_clock = sdhci_cmu_get_max_clock;
674 }
675
Jeongbae Seob3824f22010-10-08 17:46:20 +0900676 /* It supports additional host capabilities if needed */
677 if (pdata->host_caps)
678 host->mmc->caps |= pdata->host_caps;
679
Jaehoon Chungc1c4b662012-02-07 15:59:01 +0900680 if (pdata->host_caps2)
681 host->mmc->caps2 |= pdata->host_caps2;
682
Mark Brown9f4e8152012-03-31 23:31:55 -0400683 pm_runtime_enable(&pdev->dev);
684 pm_runtime_set_autosuspend_delay(&pdev->dev, 50);
685 pm_runtime_use_autosuspend(&pdev->dev);
686 pm_suspend_ignore_children(&pdev->dev, 1);
687
Ben Dooks0d1bb412009-06-14 13:52:37 +0100688 ret = sdhci_add_host(host);
689 if (ret) {
690 dev_err(dev, "sdhci_add_host() failed\n");
Mark Brown9f4e8152012-03-31 23:31:55 -0400691 pm_runtime_forbid(&pdev->dev);
692 pm_runtime_get_noresume(&pdev->dev);
Julia Lawall9bda6da2012-03-08 23:24:53 -0500693 goto err_req_regs;
Ben Dooks0d1bb412009-06-14 13:52:37 +0100694 }
695
Marek Szyprowski17866e12010-08-10 18:01:58 -0700696 /* The following two methods of card detection might call
697 sdhci_s3c_notify_change() immediately, so they can be called
698 only after sdhci_add_host(). Setup errors are ignored. */
699 if (pdata->cd_type == S3C_SDHCI_CD_EXTERNAL && pdata->ext_cd_init)
700 pdata->ext_cd_init(&sdhci_s3c_notify_change);
701 if (pdata->cd_type == S3C_SDHCI_CD_GPIO &&
702 gpio_is_valid(pdata->ext_cd_gpio))
703 sdhci_s3c_setup_card_detect_gpio(sc);
704
Chander Kashyap2abeb5c2012-09-21 05:42:08 +0000705#ifdef CONFIG_PM_RUNTIME
Seungwon Jeon0aa55c22012-10-30 14:28:36 +0900706 if (pdata->cd_type != S3C_SDHCI_CD_INTERNAL)
707 clk_disable_unprepare(sc->clk_io);
Chander Kashyap2abeb5c2012-09-21 05:42:08 +0000708#endif
Ben Dooks0d1bb412009-06-14 13:52:37 +0100709 return 0;
710
Ben Dooks0d1bb412009-06-14 13:52:37 +0100711 err_req_regs:
Chander Kashyap2abeb5c2012-09-21 05:42:08 +0000712#ifndef CONFIG_PM_RUNTIME
Thomas Abraham0f310a02012-10-03 08:35:43 +0900713 clk_disable_unprepare(sc->clk_bus[sc->cur_clk]);
Chander Kashyap2abeb5c2012-09-21 05:42:08 +0000714#endif
Ben Dooks0d1bb412009-06-14 13:52:37 +0100715
716 err_no_busclks:
Thomas Abraham0f310a02012-10-03 08:35:43 +0900717 clk_disable_unprepare(sc->clk_io);
Ben Dooks0d1bb412009-06-14 13:52:37 +0100718
Tomasz Figab1b8fea2012-11-25 15:40:44 -0500719 err_pdata_io_clk:
Ben Dooks0d1bb412009-06-14 13:52:37 +0100720 sdhci_free_host(host);
721
722 return ret;
723}
724
Bill Pemberton6e0ee712012-11-19 13:26:03 -0500725static int sdhci_s3c_remove(struct platform_device *pdev)
Ben Dooks0d1bb412009-06-14 13:52:37 +0100726{
Marek Szyprowski9d51a6b2010-07-20 13:24:33 -0700727 struct sdhci_host *host = platform_get_drvdata(pdev);
728 struct sdhci_s3c *sc = sdhci_priv(host);
Thomas Abrahamcd1b00e2012-08-23 17:10:09 +0000729 struct s3c_sdhci_platdata *pdata = sc->pdata;
Marek Szyprowski9d51a6b2010-07-20 13:24:33 -0700730
Marek Szyprowski17866e12010-08-10 18:01:58 -0700731 if (pdata->cd_type == S3C_SDHCI_CD_EXTERNAL && pdata->ext_cd_cleanup)
732 pdata->ext_cd_cleanup(&sdhci_s3c_notify_change);
733
734 if (sc->ext_cd_irq)
735 free_irq(sc->ext_cd_irq, sc);
736
Chander Kashyap2abeb5c2012-09-21 05:42:08 +0000737#ifdef CONFIG_PM_RUNTIME
Seungwon Jeon0aa55c22012-10-30 14:28:36 +0900738 if (pdata->cd_type != S3C_SDHCI_CD_INTERNAL)
739 clk_prepare_enable(sc->clk_io);
Chander Kashyap2abeb5c2012-09-21 05:42:08 +0000740#endif
Marek Szyprowski9d51a6b2010-07-20 13:24:33 -0700741 sdhci_remove_host(host, 1);
742
Chander Kashyap387a8cbd2012-09-14 09:08:50 +0000743 pm_runtime_dont_use_autosuspend(&pdev->dev);
Mark Brown9f4e8152012-03-31 23:31:55 -0400744 pm_runtime_disable(&pdev->dev);
745
Chander Kashyap2abeb5c2012-09-21 05:42:08 +0000746#ifndef CONFIG_PM_RUNTIME
Thomas Abraham0f310a02012-10-03 08:35:43 +0900747 clk_disable_unprepare(sc->clk_bus[sc->cur_clk]);
Chander Kashyap2abeb5c2012-09-21 05:42:08 +0000748#endif
Thomas Abraham0f310a02012-10-03 08:35:43 +0900749 clk_disable_unprepare(sc->clk_io);
Marek Szyprowski9d51a6b2010-07-20 13:24:33 -0700750
Marek Szyprowski9d51a6b2010-07-20 13:24:33 -0700751 sdhci_free_host(host);
Marek Szyprowski9d51a6b2010-07-20 13:24:33 -0700752
Ben Dooks0d1bb412009-06-14 13:52:37 +0100753 return 0;
754}
755
Mark Brownd5e9c022012-03-03 00:46:41 +0000756#ifdef CONFIG_PM_SLEEP
Manuel Lauss29495aa2011-11-03 11:09:45 +0100757static int sdhci_s3c_suspend(struct device *dev)
Ben Dooks0d1bb412009-06-14 13:52:37 +0100758{
Manuel Lauss29495aa2011-11-03 11:09:45 +0100759 struct sdhci_host *host = dev_get_drvdata(dev);
Ben Dooks0d1bb412009-06-14 13:52:37 +0100760
Manuel Lauss29495aa2011-11-03 11:09:45 +0100761 return sdhci_suspend_host(host);
Ben Dooks0d1bb412009-06-14 13:52:37 +0100762}
763
Manuel Lauss29495aa2011-11-03 11:09:45 +0100764static int sdhci_s3c_resume(struct device *dev)
Ben Dooks0d1bb412009-06-14 13:52:37 +0100765{
Manuel Lauss29495aa2011-11-03 11:09:45 +0100766 struct sdhci_host *host = dev_get_drvdata(dev);
Ben Dooks0d1bb412009-06-14 13:52:37 +0100767
Wonil Choi65d13512011-06-29 11:38:38 +0900768 return sdhci_resume_host(host);
Ben Dooks0d1bb412009-06-14 13:52:37 +0100769}
Mark Brownd5e9c022012-03-03 00:46:41 +0000770#endif
Ben Dooks0d1bb412009-06-14 13:52:37 +0100771
Mark Brown9f4e8152012-03-31 23:31:55 -0400772#ifdef CONFIG_PM_RUNTIME
773static int sdhci_s3c_runtime_suspend(struct device *dev)
774{
775 struct sdhci_host *host = dev_get_drvdata(dev);
Chander Kashyap2abeb5c2012-09-21 05:42:08 +0000776 struct sdhci_s3c *ourhost = to_s3c(host);
777 struct clk *busclk = ourhost->clk_io;
778 int ret;
Mark Brown9f4e8152012-03-31 23:31:55 -0400779
Chander Kashyap2abeb5c2012-09-21 05:42:08 +0000780 ret = sdhci_runtime_suspend_host(host);
781
Thomas Abraham0f310a02012-10-03 08:35:43 +0900782 clk_disable_unprepare(ourhost->clk_bus[ourhost->cur_clk]);
783 clk_disable_unprepare(busclk);
Chander Kashyap2abeb5c2012-09-21 05:42:08 +0000784 return ret;
Mark Brown9f4e8152012-03-31 23:31:55 -0400785}
786
787static int sdhci_s3c_runtime_resume(struct device *dev)
788{
789 struct sdhci_host *host = dev_get_drvdata(dev);
Chander Kashyap2abeb5c2012-09-21 05:42:08 +0000790 struct sdhci_s3c *ourhost = to_s3c(host);
791 struct clk *busclk = ourhost->clk_io;
792 int ret;
Mark Brown9f4e8152012-03-31 23:31:55 -0400793
Thomas Abraham0f310a02012-10-03 08:35:43 +0900794 clk_prepare_enable(busclk);
795 clk_prepare_enable(ourhost->clk_bus[ourhost->cur_clk]);
Chander Kashyap2abeb5c2012-09-21 05:42:08 +0000796 ret = sdhci_runtime_resume_host(host);
797 return ret;
Mark Brown9f4e8152012-03-31 23:31:55 -0400798}
799#endif
800
Mark Brownd5e9c022012-03-03 00:46:41 +0000801#ifdef CONFIG_PM
Manuel Lauss29495aa2011-11-03 11:09:45 +0100802static const struct dev_pm_ops sdhci_s3c_pmops = {
Mark Brownd5e9c022012-03-03 00:46:41 +0000803 SET_SYSTEM_SLEEP_PM_OPS(sdhci_s3c_suspend, sdhci_s3c_resume)
Mark Brown9f4e8152012-03-31 23:31:55 -0400804 SET_RUNTIME_PM_OPS(sdhci_s3c_runtime_suspend, sdhci_s3c_runtime_resume,
805 NULL)
Manuel Lauss29495aa2011-11-03 11:09:45 +0100806};
807
808#define SDHCI_S3C_PMOPS (&sdhci_s3c_pmops)
809
Ben Dooks0d1bb412009-06-14 13:52:37 +0100810#else
Manuel Lauss29495aa2011-11-03 11:09:45 +0100811#define SDHCI_S3C_PMOPS NULL
Ben Dooks0d1bb412009-06-14 13:52:37 +0100812#endif
813
Thomas Abraham3119936a2012-02-16 22:23:58 +0900814#if defined(CONFIG_CPU_EXYNOS4210) || defined(CONFIG_SOC_EXYNOS4212)
815static struct sdhci_s3c_drv_data exynos4_sdhci_drv_data = {
816 .sdhci_quirks = SDHCI_QUIRK_NONSTANDARD_CLOCK,
817};
818#define EXYNOS4_SDHCI_DRV_DATA ((kernel_ulong_t)&exynos4_sdhci_drv_data)
819#else
820#define EXYNOS4_SDHCI_DRV_DATA ((kernel_ulong_t)NULL)
821#endif
822
823static struct platform_device_id sdhci_s3c_driver_ids[] = {
824 {
825 .name = "s3c-sdhci",
826 .driver_data = (kernel_ulong_t)NULL,
827 }, {
828 .name = "exynos4-sdhci",
829 .driver_data = EXYNOS4_SDHCI_DRV_DATA,
830 },
831 { }
832};
833MODULE_DEVICE_TABLE(platform, sdhci_s3c_driver_ids);
834
Thomas Abrahamcd1b00e2012-08-23 17:10:09 +0000835#ifdef CONFIG_OF
836static const struct of_device_id sdhci_s3c_dt_match[] = {
837 { .compatible = "samsung,s3c6410-sdhci", },
838 { .compatible = "samsung,exynos4210-sdhci",
839 .data = (void *)EXYNOS4_SDHCI_DRV_DATA },
840 {},
841};
842MODULE_DEVICE_TABLE(of, sdhci_s3c_dt_match);
843#endif
844
Ben Dooks0d1bb412009-06-14 13:52:37 +0100845static struct platform_driver sdhci_s3c_driver = {
846 .probe = sdhci_s3c_probe,
Bill Pemberton0433c142012-11-19 13:20:26 -0500847 .remove = sdhci_s3c_remove,
Thomas Abraham3119936a2012-02-16 22:23:58 +0900848 .id_table = sdhci_s3c_driver_ids,
Ben Dooks0d1bb412009-06-14 13:52:37 +0100849 .driver = {
850 .owner = THIS_MODULE,
851 .name = "s3c-sdhci",
Thomas Abrahamcd1b00e2012-08-23 17:10:09 +0000852 .of_match_table = of_match_ptr(sdhci_s3c_dt_match),
Manuel Lauss29495aa2011-11-03 11:09:45 +0100853 .pm = SDHCI_S3C_PMOPS,
Ben Dooks0d1bb412009-06-14 13:52:37 +0100854 },
855};
856
Axel Lind1f81a62011-11-26 12:55:43 +0800857module_platform_driver(sdhci_s3c_driver);
Ben Dooks0d1bb412009-06-14 13:52:37 +0100858
859MODULE_DESCRIPTION("Samsung SDHCI (HSMMC) glue");
860MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>");
861MODULE_LICENSE("GPL v2");
862MODULE_ALIAS("platform:s3c-sdhci");