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Jingchang Lu1f2c5fd2013-05-28 17:12:20 +08001* Clock bindings for Freescale Vybrid VF610 SOC
2
3Required properties:
4- compatible: Should be "fsl,vf610-ccm"
5- reg: Address and length of the register set
6- #clock-cells: Should be <1>
7
8The clock consumer should specify the desired clock by having the clock
9ID in its "clocks" phandle cell. See include/dt-bindings/clock/vf610-clock.h
10for the full list of VF610 clock IDs.
11
12Examples:
13
14clks: ccm@4006b000 {
15 compatible = "fsl,vf610-ccm";
16 reg = <0x4006b000 0x1000>;
17 #clock-cells = <1>;
18};
19
20uart1: serial@40028000 {
21 compatible = "fsl,vf610-uart";
22 reg = <0x40028000 0x1000>;
23 interrupts = <0 62 0x04>;
24 clocks = <&clks VF610_CLK_UART1>;
25 clock-names = "ipg";
26};