Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
Dimitri Sivanich | 76832c2 | 2006-01-06 11:33:41 -0600 | [diff] [blame] | 2 | * Timer device implementation for SGI SN platforms. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3 | * |
| 4 | * This file is subject to the terms and conditions of the GNU General Public |
| 5 | * License. See the file "COPYING" in the main directory of this archive |
| 6 | * for more details. |
| 7 | * |
Dimitri Sivanich | 76832c2 | 2006-01-06 11:33:41 -0600 | [diff] [blame] | 8 | * Copyright (c) 2001-2006 Silicon Graphics, Inc. All rights reserved. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 9 | * |
| 10 | * This driver exports an API that should be supportable by any HPET or IA-PC |
| 11 | * multimedia timer. The code below is currently specific to the SGI Altix |
| 12 | * SHub RTC, however. |
| 13 | * |
| 14 | * 11/01/01 - jbarnes - initial revision |
| 15 | * 9/10/04 - Christoph Lameter - remove interrupt support for kernel inclusion |
| 16 | * 10/1/04 - Christoph Lameter - provide posix clock CLOCK_SGI_CYCLE |
| 17 | * 10/13/04 - Christoph Lameter, Dimitri Sivanich - provide timer interrupt |
| 18 | * support via the posix timer interface |
| 19 | */ |
| 20 | |
| 21 | #include <linux/types.h> |
| 22 | #include <linux/kernel.h> |
| 23 | #include <linux/ioctl.h> |
| 24 | #include <linux/module.h> |
| 25 | #include <linux/init.h> |
| 26 | #include <linux/errno.h> |
| 27 | #include <linux/mm.h> |
| 28 | #include <linux/devfs_fs_kernel.h> |
| 29 | #include <linux/mmtimer.h> |
| 30 | #include <linux/miscdevice.h> |
| 31 | #include <linux/posix-timers.h> |
| 32 | #include <linux/interrupt.h> |
| 33 | |
| 34 | #include <asm/uaccess.h> |
| 35 | #include <asm/sn/addrs.h> |
| 36 | #include <asm/sn/intr.h> |
| 37 | #include <asm/sn/shub_mmr.h> |
| 38 | #include <asm/sn/nodepda.h> |
| 39 | #include <asm/sn/shubio.h> |
| 40 | |
| 41 | MODULE_AUTHOR("Jesse Barnes <jbarnes@sgi.com>"); |
| 42 | MODULE_DESCRIPTION("SGI Altix RTC Timer"); |
| 43 | MODULE_LICENSE("GPL"); |
| 44 | |
| 45 | /* name of the device, usually in /dev */ |
| 46 | #define MMTIMER_NAME "mmtimer" |
| 47 | #define MMTIMER_DESC "SGI Altix RTC Timer" |
Dimitri Sivanich | 76832c2 | 2006-01-06 11:33:41 -0600 | [diff] [blame] | 48 | #define MMTIMER_VERSION "2.1" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 49 | |
| 50 | #define RTC_BITS 55 /* 55 bits for this implementation */ |
| 51 | |
| 52 | extern unsigned long sn_rtc_cycles_per_second; |
| 53 | |
| 54 | #define RTC_COUNTER_ADDR ((long *)LOCAL_MMR_ADDR(SH_RTC)) |
| 55 | |
| 56 | #define rtc_time() (*RTC_COUNTER_ADDR) |
| 57 | |
| 58 | static int mmtimer_ioctl(struct inode *inode, struct file *file, |
| 59 | unsigned int cmd, unsigned long arg); |
| 60 | static int mmtimer_mmap(struct file *file, struct vm_area_struct *vma); |
| 61 | |
| 62 | /* |
| 63 | * Period in femtoseconds (10^-15 s) |
| 64 | */ |
| 65 | static unsigned long mmtimer_femtoperiod = 0; |
| 66 | |
| 67 | static struct file_operations mmtimer_fops = { |
| 68 | .owner = THIS_MODULE, |
| 69 | .mmap = mmtimer_mmap, |
| 70 | .ioctl = mmtimer_ioctl, |
| 71 | }; |
| 72 | |
| 73 | /* |
| 74 | * We only have comparison registers RTC1-4 currently available per |
| 75 | * node. RTC0 is used by SAL. |
| 76 | */ |
| 77 | #define NUM_COMPARATORS 3 |
| 78 | /* Check for an RTC interrupt pending */ |
| 79 | static int inline mmtimer_int_pending(int comparator) |
| 80 | { |
| 81 | if (HUB_L((unsigned long *)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED)) & |
| 82 | SH_EVENT_OCCURRED_RTC1_INT_MASK << comparator) |
| 83 | return 1; |
| 84 | else |
| 85 | return 0; |
| 86 | } |
| 87 | /* Clear the RTC interrupt pending bit */ |
| 88 | static void inline mmtimer_clr_int_pending(int comparator) |
| 89 | { |
| 90 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED_ALIAS), |
| 91 | SH_EVENT_OCCURRED_RTC1_INT_MASK << comparator); |
| 92 | } |
| 93 | |
| 94 | /* Setup timer on comparator RTC1 */ |
| 95 | static void inline mmtimer_setup_int_0(u64 expires) |
| 96 | { |
| 97 | u64 val; |
| 98 | |
| 99 | /* Disable interrupt */ |
| 100 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_ENABLE), 0UL); |
| 101 | |
| 102 | /* Initialize comparator value */ |
| 103 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPB), -1L); |
| 104 | |
| 105 | /* Clear pending bit */ |
| 106 | mmtimer_clr_int_pending(0); |
| 107 | |
| 108 | val = ((u64)SGI_MMTIMER_VECTOR << SH_RTC1_INT_CONFIG_IDX_SHFT) | |
| 109 | ((u64)cpu_physical_id(smp_processor_id()) << |
| 110 | SH_RTC1_INT_CONFIG_PID_SHFT); |
| 111 | |
| 112 | /* Set configuration */ |
| 113 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_CONFIG), val); |
| 114 | |
| 115 | /* Enable RTC interrupts */ |
| 116 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_ENABLE), 1UL); |
| 117 | |
| 118 | /* Initialize comparator value */ |
| 119 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPB), expires); |
| 120 | |
| 121 | |
| 122 | } |
| 123 | |
| 124 | /* Setup timer on comparator RTC2 */ |
| 125 | static void inline mmtimer_setup_int_1(u64 expires) |
| 126 | { |
| 127 | u64 val; |
| 128 | |
| 129 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_ENABLE), 0UL); |
| 130 | |
| 131 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPC), -1L); |
| 132 | |
| 133 | mmtimer_clr_int_pending(1); |
| 134 | |
| 135 | val = ((u64)SGI_MMTIMER_VECTOR << SH_RTC2_INT_CONFIG_IDX_SHFT) | |
| 136 | ((u64)cpu_physical_id(smp_processor_id()) << |
| 137 | SH_RTC2_INT_CONFIG_PID_SHFT); |
| 138 | |
| 139 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_CONFIG), val); |
| 140 | |
| 141 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_ENABLE), 1UL); |
| 142 | |
| 143 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPC), expires); |
| 144 | } |
| 145 | |
| 146 | /* Setup timer on comparator RTC3 */ |
| 147 | static void inline mmtimer_setup_int_2(u64 expires) |
| 148 | { |
| 149 | u64 val; |
| 150 | |
| 151 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_ENABLE), 0UL); |
| 152 | |
| 153 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPD), -1L); |
| 154 | |
| 155 | mmtimer_clr_int_pending(2); |
| 156 | |
| 157 | val = ((u64)SGI_MMTIMER_VECTOR << SH_RTC3_INT_CONFIG_IDX_SHFT) | |
| 158 | ((u64)cpu_physical_id(smp_processor_id()) << |
| 159 | SH_RTC3_INT_CONFIG_PID_SHFT); |
| 160 | |
| 161 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_CONFIG), val); |
| 162 | |
| 163 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_ENABLE), 1UL); |
| 164 | |
| 165 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPD), expires); |
| 166 | } |
| 167 | |
| 168 | /* |
| 169 | * This function must be called with interrupts disabled and preemption off |
| 170 | * in order to insure that the setup succeeds in a deterministic time frame. |
| 171 | * It will check if the interrupt setup succeeded. |
| 172 | */ |
| 173 | static int inline mmtimer_setup(int comparator, unsigned long expires) |
| 174 | { |
| 175 | |
| 176 | switch (comparator) { |
| 177 | case 0: |
| 178 | mmtimer_setup_int_0(expires); |
| 179 | break; |
| 180 | case 1: |
| 181 | mmtimer_setup_int_1(expires); |
| 182 | break; |
| 183 | case 2: |
| 184 | mmtimer_setup_int_2(expires); |
| 185 | break; |
| 186 | } |
| 187 | /* We might've missed our expiration time */ |
| 188 | if (rtc_time() < expires) |
| 189 | return 1; |
| 190 | |
| 191 | /* |
| 192 | * If an interrupt is already pending then its okay |
| 193 | * if not then we failed |
| 194 | */ |
| 195 | return mmtimer_int_pending(comparator); |
| 196 | } |
| 197 | |
| 198 | static int inline mmtimer_disable_int(long nasid, int comparator) |
| 199 | { |
| 200 | switch (comparator) { |
| 201 | case 0: |
| 202 | nasid == -1 ? HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_ENABLE), |
| 203 | 0UL) : REMOTE_HUB_S(nasid, SH_RTC1_INT_ENABLE, 0UL); |
| 204 | break; |
| 205 | case 1: |
| 206 | nasid == -1 ? HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_ENABLE), |
| 207 | 0UL) : REMOTE_HUB_S(nasid, SH_RTC2_INT_ENABLE, 0UL); |
| 208 | break; |
| 209 | case 2: |
| 210 | nasid == -1 ? HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_ENABLE), |
| 211 | 0UL) : REMOTE_HUB_S(nasid, SH_RTC3_INT_ENABLE, 0UL); |
| 212 | break; |
| 213 | default: |
| 214 | return -EFAULT; |
| 215 | } |
| 216 | return 0; |
| 217 | } |
| 218 | |
| 219 | #define TIMER_OFF 0xbadcabLL |
| 220 | |
| 221 | /* There is one of these for each comparator */ |
| 222 | typedef struct mmtimer { |
| 223 | spinlock_t lock ____cacheline_aligned; |
| 224 | struct k_itimer *timer; |
| 225 | int i; |
| 226 | int cpu; |
| 227 | struct tasklet_struct tasklet; |
| 228 | } mmtimer_t; |
| 229 | |
Dimitri Sivanich | 76832c2 | 2006-01-06 11:33:41 -0600 | [diff] [blame] | 230 | static mmtimer_t ** timers; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 231 | |
| 232 | /** |
| 233 | * mmtimer_ioctl - ioctl interface for /dev/mmtimer |
| 234 | * @inode: inode of the device |
| 235 | * @file: file structure for the device |
| 236 | * @cmd: command to execute |
| 237 | * @arg: optional argument to command |
| 238 | * |
| 239 | * Executes the command specified by @cmd. Returns 0 for success, < 0 for |
| 240 | * failure. |
| 241 | * |
| 242 | * Valid commands: |
| 243 | * |
| 244 | * %MMTIMER_GETOFFSET - Should return the offset (relative to the start |
| 245 | * of the page where the registers are mapped) for the counter in question. |
| 246 | * |
| 247 | * %MMTIMER_GETRES - Returns the resolution of the clock in femto (10^-15) |
| 248 | * seconds |
| 249 | * |
| 250 | * %MMTIMER_GETFREQ - Copies the frequency of the clock in Hz to the address |
| 251 | * specified by @arg |
| 252 | * |
| 253 | * %MMTIMER_GETBITS - Returns the number of bits in the clock's counter |
| 254 | * |
| 255 | * %MMTIMER_MMAPAVAIL - Returns 1 if the registers can be mmap'd into userspace |
| 256 | * |
| 257 | * %MMTIMER_GETCOUNTER - Gets the current value in the counter and places it |
| 258 | * in the address specified by @arg. |
| 259 | */ |
| 260 | static int mmtimer_ioctl(struct inode *inode, struct file *file, |
| 261 | unsigned int cmd, unsigned long arg) |
| 262 | { |
| 263 | int ret = 0; |
| 264 | |
| 265 | switch (cmd) { |
| 266 | case MMTIMER_GETOFFSET: /* offset of the counter */ |
| 267 | /* |
| 268 | * SN RTC registers are on their own 64k page |
| 269 | */ |
| 270 | if(PAGE_SIZE <= (1 << 16)) |
| 271 | ret = (((long)RTC_COUNTER_ADDR) & (PAGE_SIZE-1)) / 8; |
| 272 | else |
| 273 | ret = -ENOSYS; |
| 274 | break; |
| 275 | |
| 276 | case MMTIMER_GETRES: /* resolution of the clock in 10^-15 s */ |
| 277 | if(copy_to_user((unsigned long __user *)arg, |
| 278 | &mmtimer_femtoperiod, sizeof(unsigned long))) |
| 279 | return -EFAULT; |
| 280 | break; |
| 281 | |
| 282 | case MMTIMER_GETFREQ: /* frequency in Hz */ |
| 283 | if(copy_to_user((unsigned long __user *)arg, |
| 284 | &sn_rtc_cycles_per_second, |
| 285 | sizeof(unsigned long))) |
| 286 | return -EFAULT; |
| 287 | ret = 0; |
| 288 | break; |
| 289 | |
| 290 | case MMTIMER_GETBITS: /* number of bits in the clock */ |
| 291 | ret = RTC_BITS; |
| 292 | break; |
| 293 | |
| 294 | case MMTIMER_MMAPAVAIL: /* can we mmap the clock into userspace? */ |
| 295 | ret = (PAGE_SIZE <= (1 << 16)) ? 1 : 0; |
| 296 | break; |
| 297 | |
| 298 | case MMTIMER_GETCOUNTER: |
| 299 | if(copy_to_user((unsigned long __user *)arg, |
| 300 | RTC_COUNTER_ADDR, sizeof(unsigned long))) |
| 301 | return -EFAULT; |
| 302 | break; |
| 303 | default: |
| 304 | ret = -ENOSYS; |
| 305 | break; |
| 306 | } |
| 307 | |
| 308 | return ret; |
| 309 | } |
| 310 | |
| 311 | /** |
| 312 | * mmtimer_mmap - maps the clock's registers into userspace |
| 313 | * @file: file structure for the device |
| 314 | * @vma: VMA to map the registers into |
| 315 | * |
| 316 | * Calls remap_pfn_range() to map the clock's registers into |
| 317 | * the calling process' address space. |
| 318 | */ |
| 319 | static int mmtimer_mmap(struct file *file, struct vm_area_struct *vma) |
| 320 | { |
| 321 | unsigned long mmtimer_addr; |
| 322 | |
| 323 | if (vma->vm_end - vma->vm_start != PAGE_SIZE) |
| 324 | return -EINVAL; |
| 325 | |
| 326 | if (vma->vm_flags & VM_WRITE) |
| 327 | return -EPERM; |
| 328 | |
| 329 | if (PAGE_SIZE > (1 << 16)) |
| 330 | return -ENOSYS; |
| 331 | |
| 332 | vma->vm_flags |= (VM_IO | VM_SHM | VM_LOCKED ); |
| 333 | vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); |
| 334 | |
| 335 | mmtimer_addr = __pa(RTC_COUNTER_ADDR); |
| 336 | mmtimer_addr &= ~(PAGE_SIZE - 1); |
| 337 | mmtimer_addr &= 0xfffffffffffffffUL; |
| 338 | |
| 339 | if (remap_pfn_range(vma, vma->vm_start, mmtimer_addr >> PAGE_SHIFT, |
| 340 | PAGE_SIZE, vma->vm_page_prot)) { |
| 341 | printk(KERN_ERR "remap_pfn_range failed in mmtimer.c\n"); |
| 342 | return -EAGAIN; |
| 343 | } |
| 344 | |
| 345 | return 0; |
| 346 | } |
| 347 | |
| 348 | static struct miscdevice mmtimer_miscdev = { |
| 349 | SGI_MMTIMER, |
| 350 | MMTIMER_NAME, |
| 351 | &mmtimer_fops |
| 352 | }; |
| 353 | |
| 354 | static struct timespec sgi_clock_offset; |
| 355 | static int sgi_clock_period; |
| 356 | |
| 357 | /* |
| 358 | * Posix Timer Interface |
| 359 | */ |
| 360 | |
| 361 | static struct timespec sgi_clock_offset; |
| 362 | static int sgi_clock_period; |
| 363 | |
| 364 | static int sgi_clock_get(clockid_t clockid, struct timespec *tp) |
| 365 | { |
| 366 | u64 nsec; |
| 367 | |
| 368 | nsec = rtc_time() * sgi_clock_period |
| 369 | + sgi_clock_offset.tv_nsec; |
| 370 | tp->tv_sec = div_long_long_rem(nsec, NSEC_PER_SEC, &tp->tv_nsec) |
| 371 | + sgi_clock_offset.tv_sec; |
| 372 | return 0; |
| 373 | }; |
| 374 | |
| 375 | static int sgi_clock_set(clockid_t clockid, struct timespec *tp) |
| 376 | { |
| 377 | |
| 378 | u64 nsec; |
| 379 | u64 rem; |
| 380 | |
| 381 | nsec = rtc_time() * sgi_clock_period; |
| 382 | |
| 383 | sgi_clock_offset.tv_sec = tp->tv_sec - div_long_long_rem(nsec, NSEC_PER_SEC, &rem); |
| 384 | |
| 385 | if (rem <= tp->tv_nsec) |
| 386 | sgi_clock_offset.tv_nsec = tp->tv_sec - rem; |
| 387 | else { |
| 388 | sgi_clock_offset.tv_nsec = tp->tv_sec + NSEC_PER_SEC - rem; |
| 389 | sgi_clock_offset.tv_sec--; |
| 390 | } |
| 391 | return 0; |
| 392 | } |
| 393 | |
| 394 | /* |
| 395 | * Schedule the next periodic interrupt. This function will attempt |
| 396 | * to schedule a periodic interrupt later if necessary. If the scheduling |
| 397 | * of an interrupt fails then the time to skip is lengthened |
| 398 | * exponentially in order to ensure that the next interrupt |
| 399 | * can be properly scheduled.. |
| 400 | */ |
| 401 | static int inline reschedule_periodic_timer(mmtimer_t *x) |
| 402 | { |
| 403 | int n; |
| 404 | struct k_itimer *t = x->timer; |
| 405 | |
| 406 | t->it.mmtimer.clock = x->i; |
| 407 | t->it_overrun--; |
| 408 | |
| 409 | n = 0; |
| 410 | do { |
| 411 | |
| 412 | t->it.mmtimer.expires += t->it.mmtimer.incr << n; |
| 413 | t->it_overrun += 1 << n; |
| 414 | n++; |
| 415 | if (n > 20) |
| 416 | return 1; |
| 417 | |
| 418 | } while (!mmtimer_setup(x->i, t->it.mmtimer.expires)); |
| 419 | |
| 420 | return 0; |
| 421 | } |
| 422 | |
| 423 | /** |
| 424 | * mmtimer_interrupt - timer interrupt handler |
| 425 | * @irq: irq received |
| 426 | * @dev_id: device the irq came from |
| 427 | * @regs: register state upon receipt of the interrupt |
| 428 | * |
| 429 | * Called when one of the comarators matches the counter, This |
| 430 | * routine will send signals to processes that have requested |
| 431 | * them. |
| 432 | * |
| 433 | * This interrupt is run in an interrupt context |
| 434 | * by the SHUB. It is therefore safe to locally access SHub |
| 435 | * registers. |
| 436 | */ |
| 437 | static irqreturn_t |
| 438 | mmtimer_interrupt(int irq, void *dev_id, struct pt_regs *regs) |
| 439 | { |
| 440 | int i; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 441 | unsigned long expires = 0; |
| 442 | int result = IRQ_NONE; |
Dimitri Sivanich | 76832c2 | 2006-01-06 11:33:41 -0600 | [diff] [blame] | 443 | unsigned indx = cpu_to_node(smp_processor_id()); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 444 | |
| 445 | /* |
| 446 | * Do this once for each comparison register |
| 447 | */ |
| 448 | for (i = 0; i < NUM_COMPARATORS; i++) { |
Dimitri Sivanich | 76832c2 | 2006-01-06 11:33:41 -0600 | [diff] [blame] | 449 | mmtimer_t *base = timers[indx] + i; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 450 | /* Make sure this doesn't get reused before tasklet_sched */ |
Dimitri Sivanich | 76832c2 | 2006-01-06 11:33:41 -0600 | [diff] [blame] | 451 | spin_lock(&base->lock); |
| 452 | if (base->cpu == smp_processor_id()) { |
| 453 | if (base->timer) |
| 454 | expires = base->timer->it.mmtimer.expires; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 455 | /* expires test won't work with shared irqs */ |
| 456 | if ((mmtimer_int_pending(i) > 0) || |
| 457 | (expires && (expires < rtc_time()))) { |
| 458 | mmtimer_clr_int_pending(i); |
Dimitri Sivanich | 76832c2 | 2006-01-06 11:33:41 -0600 | [diff] [blame] | 459 | tasklet_schedule(&base->tasklet); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 460 | result = IRQ_HANDLED; |
| 461 | } |
| 462 | } |
Dimitri Sivanich | 76832c2 | 2006-01-06 11:33:41 -0600 | [diff] [blame] | 463 | spin_unlock(&base->lock); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 464 | expires = 0; |
| 465 | } |
| 466 | return result; |
| 467 | } |
| 468 | |
| 469 | void mmtimer_tasklet(unsigned long data) { |
| 470 | mmtimer_t *x = (mmtimer_t *)data; |
| 471 | struct k_itimer *t = x->timer; |
| 472 | unsigned long flags; |
| 473 | |
| 474 | if (t == NULL) |
| 475 | return; |
| 476 | |
| 477 | /* Send signal and deal with periodic signals */ |
| 478 | spin_lock_irqsave(&t->it_lock, flags); |
| 479 | spin_lock(&x->lock); |
| 480 | /* If timer was deleted between interrupt and here, leave */ |
| 481 | if (t != x->timer) |
| 482 | goto out; |
| 483 | t->it_overrun = 0; |
| 484 | |
Christoph Lameter | 8d38ead | 2005-04-16 15:23:53 -0700 | [diff] [blame] | 485 | if (posix_timer_event(t, 0) != 0) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 486 | |
| 487 | // printk(KERN_WARNING "mmtimer: cannot deliver signal.\n"); |
| 488 | |
| 489 | t->it_overrun++; |
| 490 | } |
| 491 | if(t->it.mmtimer.incr) { |
| 492 | /* Periodic timer */ |
| 493 | if (reschedule_periodic_timer(x)) { |
| 494 | printk(KERN_WARNING "mmtimer: unable to reschedule\n"); |
| 495 | x->timer = NULL; |
| 496 | } |
| 497 | } else { |
| 498 | /* Ensure we don't false trigger in mmtimer_interrupt */ |
| 499 | t->it.mmtimer.expires = 0; |
| 500 | } |
| 501 | t->it_overrun_last = t->it_overrun; |
| 502 | out: |
| 503 | spin_unlock(&x->lock); |
| 504 | spin_unlock_irqrestore(&t->it_lock, flags); |
| 505 | } |
| 506 | |
| 507 | static int sgi_timer_create(struct k_itimer *timer) |
| 508 | { |
| 509 | /* Insure that a newly created timer is off */ |
| 510 | timer->it.mmtimer.clock = TIMER_OFF; |
| 511 | return 0; |
| 512 | } |
| 513 | |
| 514 | /* This does not really delete a timer. It just insures |
| 515 | * that the timer is not active |
| 516 | * |
| 517 | * Assumption: it_lock is already held with irq's disabled |
| 518 | */ |
| 519 | static int sgi_timer_del(struct k_itimer *timr) |
| 520 | { |
| 521 | int i = timr->it.mmtimer.clock; |
| 522 | cnodeid_t nodeid = timr->it.mmtimer.node; |
Dimitri Sivanich | 76832c2 | 2006-01-06 11:33:41 -0600 | [diff] [blame] | 523 | mmtimer_t *t = timers[nodeid] + i; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 524 | unsigned long irqflags; |
| 525 | |
| 526 | if (i != TIMER_OFF) { |
| 527 | spin_lock_irqsave(&t->lock, irqflags); |
| 528 | mmtimer_disable_int(cnodeid_to_nasid(nodeid),i); |
| 529 | t->timer = NULL; |
| 530 | timr->it.mmtimer.clock = TIMER_OFF; |
| 531 | timr->it.mmtimer.expires = 0; |
| 532 | spin_unlock_irqrestore(&t->lock, irqflags); |
| 533 | } |
| 534 | return 0; |
| 535 | } |
| 536 | |
| 537 | #define timespec_to_ns(x) ((x).tv_nsec + (x).tv_sec * NSEC_PER_SEC) |
| 538 | #define ns_to_timespec(ts, nsec) (ts).tv_sec = div_long_long_rem(nsec, NSEC_PER_SEC, &(ts).tv_nsec) |
| 539 | |
| 540 | /* Assumption: it_lock is already held with irq's disabled */ |
| 541 | static void sgi_timer_get(struct k_itimer *timr, struct itimerspec *cur_setting) |
| 542 | { |
| 543 | |
| 544 | if (timr->it.mmtimer.clock == TIMER_OFF) { |
| 545 | cur_setting->it_interval.tv_nsec = 0; |
| 546 | cur_setting->it_interval.tv_sec = 0; |
| 547 | cur_setting->it_value.tv_nsec = 0; |
| 548 | cur_setting->it_value.tv_sec =0; |
| 549 | return; |
| 550 | } |
| 551 | |
| 552 | ns_to_timespec(cur_setting->it_interval, timr->it.mmtimer.incr * sgi_clock_period); |
| 553 | ns_to_timespec(cur_setting->it_value, (timr->it.mmtimer.expires - rtc_time())* sgi_clock_period); |
| 554 | return; |
| 555 | } |
| 556 | |
| 557 | |
| 558 | static int sgi_timer_set(struct k_itimer *timr, int flags, |
| 559 | struct itimerspec * new_setting, |
| 560 | struct itimerspec * old_setting) |
| 561 | { |
| 562 | |
| 563 | int i; |
| 564 | unsigned long when, period, irqflags; |
| 565 | int err = 0; |
| 566 | cnodeid_t nodeid; |
| 567 | mmtimer_t *base; |
| 568 | |
| 569 | if (old_setting) |
| 570 | sgi_timer_get(timr, old_setting); |
| 571 | |
| 572 | sgi_timer_del(timr); |
| 573 | when = timespec_to_ns(new_setting->it_value); |
| 574 | period = timespec_to_ns(new_setting->it_interval); |
| 575 | |
| 576 | if (when == 0) |
| 577 | /* Clear timer */ |
| 578 | return 0; |
| 579 | |
| 580 | if (flags & TIMER_ABSTIME) { |
| 581 | struct timespec n; |
| 582 | unsigned long now; |
| 583 | |
| 584 | getnstimeofday(&n); |
| 585 | now = timespec_to_ns(n); |
| 586 | if (when > now) |
| 587 | when -= now; |
| 588 | else |
| 589 | /* Fire the timer immediately */ |
| 590 | when = 0; |
| 591 | } |
| 592 | |
| 593 | /* |
| 594 | * Convert to sgi clock period. Need to keep rtc_time() as near as possible |
| 595 | * to getnstimeofday() in order to be as faithful as possible to the time |
| 596 | * specified. |
| 597 | */ |
| 598 | when = (when + sgi_clock_period - 1) / sgi_clock_period + rtc_time(); |
| 599 | period = (period + sgi_clock_period - 1) / sgi_clock_period; |
| 600 | |
| 601 | /* |
| 602 | * We are allocating a local SHub comparator. If we would be moved to another |
| 603 | * cpu then another SHub may be local to us. Prohibit that by switching off |
| 604 | * preemption. |
| 605 | */ |
| 606 | preempt_disable(); |
| 607 | |
Tony Luck | 55642d3 | 2005-09-15 17:00:10 -0700 | [diff] [blame] | 608 | nodeid = cpu_to_node(smp_processor_id()); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 609 | retry: |
| 610 | /* Don't use an allocated timer, or a deleted one that's pending */ |
| 611 | for(i = 0; i< NUM_COMPARATORS; i++) { |
Dimitri Sivanich | 76832c2 | 2006-01-06 11:33:41 -0600 | [diff] [blame] | 612 | base = timers[nodeid] + i; |
| 613 | if (!base->timer && !base->tasklet.state) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 614 | break; |
| 615 | } |
| 616 | } |
| 617 | |
| 618 | if (i == NUM_COMPARATORS) { |
| 619 | preempt_enable(); |
| 620 | return -EBUSY; |
| 621 | } |
| 622 | |
Dimitri Sivanich | 76832c2 | 2006-01-06 11:33:41 -0600 | [diff] [blame] | 623 | spin_lock_irqsave(&base->lock, irqflags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 624 | |
Dimitri Sivanich | 76832c2 | 2006-01-06 11:33:41 -0600 | [diff] [blame] | 625 | if (base->timer || base->tasklet.state != 0) { |
| 626 | spin_unlock_irqrestore(&base->lock, irqflags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 627 | goto retry; |
| 628 | } |
Dimitri Sivanich | 76832c2 | 2006-01-06 11:33:41 -0600 | [diff] [blame] | 629 | base->timer = timr; |
| 630 | base->cpu = smp_processor_id(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 631 | |
| 632 | timr->it.mmtimer.clock = i; |
| 633 | timr->it.mmtimer.node = nodeid; |
| 634 | timr->it.mmtimer.incr = period; |
| 635 | timr->it.mmtimer.expires = when; |
| 636 | |
| 637 | if (period == 0) { |
| 638 | if (!mmtimer_setup(i, when)) { |
| 639 | mmtimer_disable_int(-1, i); |
| 640 | posix_timer_event(timr, 0); |
| 641 | timr->it.mmtimer.expires = 0; |
| 642 | } |
| 643 | } else { |
| 644 | timr->it.mmtimer.expires -= period; |
Dimitri Sivanich | 76832c2 | 2006-01-06 11:33:41 -0600 | [diff] [blame] | 645 | if (reschedule_periodic_timer(base)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 646 | err = -EINVAL; |
| 647 | } |
| 648 | |
Dimitri Sivanich | 76832c2 | 2006-01-06 11:33:41 -0600 | [diff] [blame] | 649 | spin_unlock_irqrestore(&base->lock, irqflags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 650 | |
| 651 | preempt_enable(); |
| 652 | |
| 653 | return err; |
| 654 | } |
| 655 | |
| 656 | static struct k_clock sgi_clock = { |
| 657 | .res = 0, |
| 658 | .clock_set = sgi_clock_set, |
| 659 | .clock_get = sgi_clock_get, |
| 660 | .timer_create = sgi_timer_create, |
| 661 | .nsleep = do_posix_clock_nonanosleep, |
| 662 | .timer_set = sgi_timer_set, |
| 663 | .timer_del = sgi_timer_del, |
| 664 | .timer_get = sgi_timer_get |
| 665 | }; |
| 666 | |
| 667 | /** |
| 668 | * mmtimer_init - device initialization routine |
| 669 | * |
| 670 | * Does initial setup for the mmtimer device. |
| 671 | */ |
| 672 | static int __init mmtimer_init(void) |
| 673 | { |
| 674 | unsigned i; |
Dimitri Sivanich | 76832c2 | 2006-01-06 11:33:41 -0600 | [diff] [blame] | 675 | cnodeid_t node, maxn = -1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 676 | |
| 677 | if (!ia64_platform_is("sn2")) |
| 678 | return -1; |
| 679 | |
| 680 | /* |
| 681 | * Sanity check the cycles/sec variable |
| 682 | */ |
| 683 | if (sn_rtc_cycles_per_second < 100000) { |
| 684 | printk(KERN_ERR "%s: unable to determine clock frequency\n", |
| 685 | MMTIMER_NAME); |
| 686 | return -1; |
| 687 | } |
| 688 | |
| 689 | mmtimer_femtoperiod = ((unsigned long)1E15 + sn_rtc_cycles_per_second / |
| 690 | 2) / sn_rtc_cycles_per_second; |
| 691 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 692 | if (request_irq(SGI_MMTIMER_VECTOR, mmtimer_interrupt, SA_PERCPU_IRQ, MMTIMER_NAME, NULL)) { |
| 693 | printk(KERN_WARNING "%s: unable to allocate interrupt.", |
| 694 | MMTIMER_NAME); |
| 695 | return -1; |
| 696 | } |
| 697 | |
| 698 | strcpy(mmtimer_miscdev.devfs_name, MMTIMER_NAME); |
| 699 | if (misc_register(&mmtimer_miscdev)) { |
| 700 | printk(KERN_ERR "%s: failed to register device\n", |
| 701 | MMTIMER_NAME); |
| 702 | return -1; |
| 703 | } |
| 704 | |
Dimitri Sivanich | 76832c2 | 2006-01-06 11:33:41 -0600 | [diff] [blame] | 705 | /* Get max numbered node, calculate slots needed */ |
| 706 | for_each_online_node(node) { |
| 707 | maxn = node; |
| 708 | } |
| 709 | maxn++; |
| 710 | |
| 711 | /* Allocate list of node ptrs to mmtimer_t's */ |
| 712 | timers = kmalloc(sizeof(mmtimer_t *)*maxn, GFP_KERNEL); |
| 713 | if (timers == NULL) { |
| 714 | printk(KERN_ERR "%s: failed to allocate memory for device\n", |
| 715 | MMTIMER_NAME); |
| 716 | return -1; |
| 717 | } |
| 718 | |
| 719 | /* Allocate mmtimer_t's for each online node */ |
| 720 | for_each_online_node(node) { |
| 721 | timers[node] = kmalloc_node(sizeof(mmtimer_t)*NUM_COMPARATORS, GFP_KERNEL, node); |
| 722 | if (timers[node] == NULL) { |
| 723 | printk(KERN_ERR "%s: failed to allocate memory for device\n", |
| 724 | MMTIMER_NAME); |
| 725 | return -1; |
| 726 | } |
| 727 | for (i=0; i< NUM_COMPARATORS; i++) { |
| 728 | mmtimer_t * base = timers[node] + i; |
| 729 | |
| 730 | spin_lock_init(&base->lock); |
| 731 | base->timer = NULL; |
| 732 | base->cpu = 0; |
| 733 | base->i = i; |
| 734 | tasklet_init(&base->tasklet, mmtimer_tasklet, |
| 735 | (unsigned long) (base)); |
| 736 | } |
| 737 | } |
| 738 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 739 | sgi_clock_period = sgi_clock.res = NSEC_PER_SEC / sn_rtc_cycles_per_second; |
| 740 | register_posix_clock(CLOCK_SGI_CYCLE, &sgi_clock); |
| 741 | |
| 742 | printk(KERN_INFO "%s: v%s, %ld MHz\n", MMTIMER_DESC, MMTIMER_VERSION, |
| 743 | sn_rtc_cycles_per_second/(unsigned long)1E6); |
| 744 | |
| 745 | return 0; |
| 746 | } |
| 747 | |
| 748 | module_init(mmtimer_init); |
| 749 | |