David Howells | b920de1 | 2008-02-08 04:19:31 -0800 | [diff] [blame] | 1 | /* Boot entry point for MN10300 kernel |
| 2 | * |
| 3 | * Copyright (C) 2005 Red Hat, Inc. All Rights Reserved. |
| 4 | * Written by David Howells (dhowells@redhat.com) |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU General Public Licence |
| 8 | * as published by the Free Software Foundation; either version |
| 9 | * 2 of the Licence, or (at your option) any later version. |
| 10 | */ |
| 11 | |
Tim Abbott | 9760f8f | 2009-04-25 22:11:04 -0400 | [diff] [blame] | 12 | #include <linux/init.h> |
David Howells | b920de1 | 2008-02-08 04:19:31 -0800 | [diff] [blame] | 13 | #include <linux/threads.h> |
| 14 | #include <linux/linkage.h> |
| 15 | #include <linux/serial_reg.h> |
| 16 | #include <asm/thread_info.h> |
| 17 | #include <asm/page.h> |
| 18 | #include <asm/pgtable.h> |
| 19 | #include <asm/frame.inc> |
| 20 | #include <asm/param.h> |
David Howells | 2f2a213 | 2009-04-10 14:33:48 +0100 | [diff] [blame] | 21 | #include <unit/serial.h> |
David Howells | b920de1 | 2008-02-08 04:19:31 -0800 | [diff] [blame] | 22 | |
Tim Abbott | 9760f8f | 2009-04-25 22:11:04 -0400 | [diff] [blame] | 23 | __HEAD |
David Howells | b920de1 | 2008-02-08 04:19:31 -0800 | [diff] [blame] | 24 | |
| 25 | ############################################################################### |
| 26 | # |
| 27 | # bootloader entry point |
| 28 | # |
| 29 | ############################################################################### |
| 30 | .globl _start |
| 31 | .type _start,@function |
| 32 | _start: |
| 33 | # save commandline pointer |
| 34 | mov d0,a3 |
| 35 | |
| 36 | # preload the PGD pointer register |
| 37 | mov swapper_pg_dir,d0 |
| 38 | mov d0,(PTBR) |
| 39 | |
| 40 | # turn on the TLBs |
| 41 | mov MMUCTR_IIV|MMUCTR_DIV,d0 |
| 42 | mov d0,(MMUCTR) |
| 43 | mov MMUCTR_ITE|MMUCTR_DTE|MMUCTR_CE,d0 |
| 44 | mov d0,(MMUCTR) |
| 45 | |
| 46 | # turn on AM33v2 exception handling mode and set the trap table base |
| 47 | movhu (CPUP),d0 |
| 48 | or CPUP_EXM_AM33V2,d0 |
| 49 | movhu d0,(CPUP) |
| 50 | mov CONFIG_INTERRUPT_VECTOR_BASE,d0 |
| 51 | mov d0,(TBR) |
| 52 | |
| 53 | # invalidate and enable both of the caches |
| 54 | mov CHCTR,a0 |
| 55 | clr d0 |
| 56 | movhu d0,(a0) # turn off first |
| 57 | mov CHCTR_ICINV|CHCTR_DCINV,d0 |
| 58 | movhu d0,(a0) |
| 59 | setlb |
| 60 | mov (a0),d0 |
| 61 | btst CHCTR_ICBUSY|CHCTR_DCBUSY,d0 # wait till not busy |
| 62 | lne |
| 63 | |
| 64 | #ifndef CONFIG_MN10300_CACHE_DISABLED |
| 65 | #ifdef CONFIG_MN10300_CACHE_WBACK |
| 66 | #ifndef CONFIG_MN10300_CACHE_WBACK_NOWRALLOC |
| 67 | mov CHCTR_ICEN|CHCTR_DCEN|CHCTR_DCWTMD_WRBACK,d0 |
| 68 | #else |
| 69 | mov CHCTR_ICEN|CHCTR_DCEN|CHCTR_DCWTMD_WRBACK|CHCTR_DCALMD,d0 |
| 70 | #endif /* CACHE_DISABLED */ |
| 71 | #else |
| 72 | mov CHCTR_ICEN|CHCTR_DCEN|CHCTR_DCWTMD_WRTHROUGH,d0 |
| 73 | #endif /* WBACK */ |
| 74 | movhu d0,(a0) # enable |
| 75 | #endif /* NOWRALLOC */ |
| 76 | |
| 77 | # turn on RTS on the debug serial port if applicable |
| 78 | #ifdef CONFIG_MN10300_UNIT_ASB2305 |
| 79 | bset UART_MCR_RTS,(ASB2305_DEBUG_MCR) |
| 80 | #endif |
| 81 | |
| 82 | # clear the BSS area |
| 83 | mov __bss_start,a0 |
| 84 | mov __bss_stop,a1 |
| 85 | clr d0 |
| 86 | bssclear: |
| 87 | cmp a1,a0 |
| 88 | bge bssclear_end |
| 89 | mov d0,(a0) |
| 90 | inc4 a0 |
| 91 | bra bssclear |
| 92 | bssclear_end: |
| 93 | |
| 94 | # retrieve the parameters (including command line) before we overwrite |
| 95 | # them |
| 96 | cmp 0xabadcafe,d1 |
| 97 | bne __no_parameters |
| 98 | |
| 99 | __copy_parameters: |
| 100 | mov redboot_command_line,a0 |
| 101 | mov a0,a1 |
| 102 | add COMMAND_LINE_SIZE,a1 |
| 103 | 1: |
| 104 | movbu (a3),d0 |
| 105 | inc a3 |
| 106 | movbu d0,(a0) |
| 107 | inc a0 |
| 108 | cmp a1,a0 |
| 109 | blt 1b |
| 110 | |
| 111 | mov redboot_platform_name,a0 |
| 112 | mov a0,a1 |
| 113 | add COMMAND_LINE_SIZE,a1 |
| 114 | mov d2,a3 |
| 115 | 1: |
| 116 | movbu (a3),d0 |
| 117 | inc a3 |
| 118 | movbu d0,(a0) |
| 119 | inc a0 |
| 120 | cmp a1,a0 |
| 121 | blt 1b |
| 122 | |
| 123 | __no_parameters: |
| 124 | |
| 125 | # set up the registers with recognisable rubbish in them |
| 126 | mov init_thread_union+THREAD_SIZE-12,sp |
| 127 | |
| 128 | mov 0xea01eaea,d0 |
| 129 | mov d0,(4,sp) # EPSW save area |
| 130 | mov 0xea02eaea,d0 |
| 131 | mov d0,(8,sp) # PC save area |
| 132 | |
| 133 | mov 0xeb0060ed,d0 |
| 134 | mov d0,mdr |
| 135 | mov 0xeb0061ed,d0 |
| 136 | mov d0,mdrq |
| 137 | mov 0xeb0062ed,d0 |
| 138 | mov d0,mcrh |
| 139 | mov 0xeb0063ed,d0 |
| 140 | mov d0,mcrl |
| 141 | mov 0xeb0064ed,d0 |
| 142 | mov d0,mcvf |
| 143 | mov 0xed0065ed,a3 |
| 144 | mov a3,usp |
| 145 | |
| 146 | mov 0xed00e0ed,e0 |
| 147 | mov 0xed00e1ed,e1 |
| 148 | mov 0xed00e2ed,e2 |
| 149 | mov 0xed00e3ed,e3 |
| 150 | mov 0xed00e4ed,e4 |
| 151 | mov 0xed00e5ed,e5 |
| 152 | mov 0xed00e6ed,e6 |
| 153 | mov 0xed00e7ed,e7 |
| 154 | |
| 155 | mov 0xed00d0ed,d0 |
| 156 | mov 0xed00d1ed,d1 |
| 157 | mov 0xed00d2ed,d2 |
| 158 | mov 0xed00d3ed,d3 |
| 159 | mov 0xed00a0ed,a0 |
| 160 | mov 0xed00a1ed,a1 |
| 161 | mov 0xed00a2ed,a2 |
| 162 | mov 0,a3 |
| 163 | |
| 164 | # set up the initial kernel stack |
| 165 | SAVE_ALL |
| 166 | mov 0xffffffff,d0 |
| 167 | mov d0,(REG_ORIG_D0,fp) |
| 168 | |
| 169 | # put different recognisable rubbish in the regs |
| 170 | mov 0xfb0060ed,d0 |
| 171 | mov d0,mdr |
| 172 | mov 0xfb0061ed,d0 |
| 173 | mov d0,mdrq |
| 174 | mov 0xfb0062ed,d0 |
| 175 | mov d0,mcrh |
| 176 | mov 0xfb0063ed,d0 |
| 177 | mov d0,mcrl |
| 178 | mov 0xfb0064ed,d0 |
| 179 | mov d0,mcvf |
| 180 | mov 0xfd0065ed,a0 |
| 181 | mov a0,usp |
| 182 | |
| 183 | mov 0xfd00e0ed,e0 |
| 184 | mov 0xfd00e1ed,e1 |
| 185 | mov 0xfd00e2ed,e2 |
| 186 | mov 0xfd00e3ed,e3 |
| 187 | mov 0xfd00e4ed,e4 |
| 188 | mov 0xfd00e5ed,e5 |
| 189 | mov 0xfd00e6ed,e6 |
| 190 | mov 0xfd00e7ed,e7 |
| 191 | |
| 192 | mov 0xfd00d0ed,d0 |
| 193 | mov 0xfd00d1ed,d1 |
| 194 | mov 0xfd00d2ed,d2 |
| 195 | mov 0xfd00d3ed,d3 |
| 196 | mov 0xfd00a0ed,a0 |
| 197 | mov 0xfd00a1ed,a1 |
| 198 | mov 0xfd00a2ed,a2 |
| 199 | |
| 200 | # we may be holding current in E2 |
| 201 | #ifdef CONFIG_MN10300_CURRENT_IN_E2 |
| 202 | mov init_task,e2 |
| 203 | #endif |
| 204 | |
| 205 | # initialise the processor and the unit |
| 206 | call processor_init[],0 |
| 207 | call unit_init[],0 |
| 208 | |
| 209 | #ifdef CONFIG_GDBSTUB |
| 210 | call gdbstub_init[],0 |
| 211 | |
| 212 | #ifdef CONFIG_GDBSTUB_IMMEDIATE |
| 213 | .globl __gdbstub_pause |
| 214 | __gdbstub_pause: |
| 215 | bra __gdbstub_pause |
| 216 | #endif |
| 217 | #endif |
| 218 | |
| 219 | jmp start_kernel |
| 220 | .size _start, _start-. |
| 221 | ENTRY(__head_end) |
| 222 | |
| 223 | /* |
| 224 | * This is initialized to disallow all access to the low 2G region |
| 225 | * - the high 2G region is managed directly by the MMU |
| 226 | * - range 0x70000000-0x7C000000 are initialised for use by VMALLOC |
| 227 | */ |
| 228 | .section .bss |
| 229 | .balign PAGE_SIZE |
| 230 | ENTRY(swapper_pg_dir) |
| 231 | .space PTRS_PER_PGD*4 |
| 232 | |
| 233 | /* |
| 234 | * The page tables are initialized to only 8MB here - the final page |
| 235 | * tables are set up later depending on memory size. |
| 236 | */ |
| 237 | |
| 238 | .balign PAGE_SIZE |
| 239 | ENTRY(empty_zero_page) |
| 240 | .space PAGE_SIZE |
| 241 | |
| 242 | .balign PAGE_SIZE |
| 243 | ENTRY(empty_bad_page) |
| 244 | .space PAGE_SIZE |
| 245 | |
| 246 | .balign PAGE_SIZE |
| 247 | ENTRY(empty_bad_pte_table) |
| 248 | .space PAGE_SIZE |
| 249 | |
| 250 | .balign PAGE_SIZE |
| 251 | ENTRY(large_page_table) |
| 252 | .space PAGE_SIZE |
| 253 | |
| 254 | .balign PAGE_SIZE |
| 255 | ENTRY(kernel_vmalloc_ptes) |
| 256 | .space ((VMALLOC_END-VMALLOC_START)/PAGE_SIZE)*4 |