Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 1 | /* |
| 2 | * linux/kernel/irq/chip.c |
| 3 | * |
| 4 | * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar |
| 5 | * Copyright (C) 2005-2006, Thomas Gleixner, Russell King |
| 6 | * |
| 7 | * This file contains the core interrupt handling code, for irq-chip |
| 8 | * based architectures. |
| 9 | * |
| 10 | * Detailed information is available in Documentation/DocBook/genericirq |
| 11 | */ |
| 12 | |
| 13 | #include <linux/irq.h> |
| 14 | #include <linux/module.h> |
| 15 | #include <linux/interrupt.h> |
| 16 | #include <linux/kernel_stat.h> |
| 17 | |
| 18 | #include "internals.h" |
| 19 | |
| 20 | /** |
Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 21 | * dynamic_irq_init - initialize a dynamically allocated irq |
| 22 | * @irq: irq number to initialize |
| 23 | */ |
| 24 | void dynamic_irq_init(unsigned int irq) |
| 25 | { |
| 26 | struct irq_desc *desc; |
| 27 | unsigned long flags; |
| 28 | |
| 29 | if (irq >= NR_IRQS) { |
| 30 | printk(KERN_ERR "Trying to initialize invalid IRQ%d\n", irq); |
| 31 | WARN_ON(1); |
| 32 | return; |
| 33 | } |
| 34 | |
| 35 | /* Ensure we don't have left over values from a previous use of this irq */ |
| 36 | desc = irq_desc + irq; |
| 37 | spin_lock_irqsave(&desc->lock, flags); |
| 38 | desc->status = IRQ_DISABLED; |
| 39 | desc->chip = &no_irq_chip; |
| 40 | desc->handle_irq = handle_bad_irq; |
| 41 | desc->depth = 1; |
| 42 | desc->handler_data = NULL; |
| 43 | desc->chip_data = NULL; |
| 44 | desc->action = NULL; |
| 45 | desc->irq_count = 0; |
| 46 | desc->irqs_unhandled = 0; |
| 47 | #ifdef CONFIG_SMP |
| 48 | desc->affinity = CPU_MASK_ALL; |
| 49 | #endif |
| 50 | spin_unlock_irqrestore(&desc->lock, flags); |
| 51 | } |
| 52 | |
| 53 | /** |
| 54 | * dynamic_irq_cleanup - cleanup a dynamically allocated irq |
| 55 | * @irq: irq number to initialize |
| 56 | */ |
| 57 | void dynamic_irq_cleanup(unsigned int irq) |
| 58 | { |
| 59 | struct irq_desc *desc; |
| 60 | unsigned long flags; |
| 61 | |
| 62 | if (irq >= NR_IRQS) { |
| 63 | printk(KERN_ERR "Trying to cleanup invalid IRQ%d\n", irq); |
| 64 | WARN_ON(1); |
| 65 | return; |
| 66 | } |
| 67 | |
| 68 | desc = irq_desc + irq; |
| 69 | spin_lock_irqsave(&desc->lock, flags); |
Eric W. Biederman | 1f80025 | 2006-10-04 02:16:56 -0700 | [diff] [blame] | 70 | if (desc->action) { |
| 71 | spin_unlock_irqrestore(&desc->lock, flags); |
| 72 | printk(KERN_ERR "Destroying IRQ%d without calling free_irq\n", |
| 73 | irq); |
| 74 | WARN_ON(1); |
| 75 | return; |
| 76 | } |
Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 77 | desc->handle_irq = handle_bad_irq; |
| 78 | desc->chip = &no_irq_chip; |
| 79 | spin_unlock_irqrestore(&desc->lock, flags); |
| 80 | } |
| 81 | |
| 82 | |
| 83 | /** |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 84 | * set_irq_chip - set the irq chip for an irq |
| 85 | * @irq: irq number |
| 86 | * @chip: pointer to irq chip description structure |
| 87 | */ |
| 88 | int set_irq_chip(unsigned int irq, struct irq_chip *chip) |
| 89 | { |
| 90 | struct irq_desc *desc; |
| 91 | unsigned long flags; |
| 92 | |
| 93 | if (irq >= NR_IRQS) { |
| 94 | printk(KERN_ERR "Trying to install chip for IRQ%d\n", irq); |
| 95 | WARN_ON(1); |
| 96 | return -EINVAL; |
| 97 | } |
| 98 | |
| 99 | if (!chip) |
| 100 | chip = &no_irq_chip; |
| 101 | |
| 102 | desc = irq_desc + irq; |
| 103 | spin_lock_irqsave(&desc->lock, flags); |
| 104 | irq_chip_set_defaults(chip); |
| 105 | desc->chip = chip; |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 106 | spin_unlock_irqrestore(&desc->lock, flags); |
| 107 | |
| 108 | return 0; |
| 109 | } |
| 110 | EXPORT_SYMBOL(set_irq_chip); |
| 111 | |
| 112 | /** |
| 113 | * set_irq_type - set the irq type for an irq |
| 114 | * @irq: irq number |
| 115 | * @type: interrupt type - see include/linux/interrupt.h |
| 116 | */ |
| 117 | int set_irq_type(unsigned int irq, unsigned int type) |
| 118 | { |
| 119 | struct irq_desc *desc; |
| 120 | unsigned long flags; |
| 121 | int ret = -ENXIO; |
| 122 | |
| 123 | if (irq >= NR_IRQS) { |
| 124 | printk(KERN_ERR "Trying to set irq type for IRQ%d\n", irq); |
| 125 | return -ENODEV; |
| 126 | } |
| 127 | |
| 128 | desc = irq_desc + irq; |
| 129 | if (desc->chip->set_type) { |
| 130 | spin_lock_irqsave(&desc->lock, flags); |
| 131 | ret = desc->chip->set_type(irq, type); |
| 132 | spin_unlock_irqrestore(&desc->lock, flags); |
| 133 | } |
| 134 | return ret; |
| 135 | } |
| 136 | EXPORT_SYMBOL(set_irq_type); |
| 137 | |
| 138 | /** |
| 139 | * set_irq_data - set irq type data for an irq |
| 140 | * @irq: Interrupt number |
| 141 | * @data: Pointer to interrupt specific data |
| 142 | * |
| 143 | * Set the hardware irq controller data for an irq |
| 144 | */ |
| 145 | int set_irq_data(unsigned int irq, void *data) |
| 146 | { |
| 147 | struct irq_desc *desc; |
| 148 | unsigned long flags; |
| 149 | |
| 150 | if (irq >= NR_IRQS) { |
| 151 | printk(KERN_ERR |
| 152 | "Trying to install controller data for IRQ%d\n", irq); |
| 153 | return -EINVAL; |
| 154 | } |
| 155 | |
| 156 | desc = irq_desc + irq; |
| 157 | spin_lock_irqsave(&desc->lock, flags); |
| 158 | desc->handler_data = data; |
| 159 | spin_unlock_irqrestore(&desc->lock, flags); |
| 160 | return 0; |
| 161 | } |
| 162 | EXPORT_SYMBOL(set_irq_data); |
| 163 | |
| 164 | /** |
| 165 | * set_irq_chip_data - set irq chip data for an irq |
| 166 | * @irq: Interrupt number |
| 167 | * @data: Pointer to chip specific data |
| 168 | * |
| 169 | * Set the hardware irq chip data for an irq |
| 170 | */ |
| 171 | int set_irq_chip_data(unsigned int irq, void *data) |
| 172 | { |
| 173 | struct irq_desc *desc = irq_desc + irq; |
| 174 | unsigned long flags; |
| 175 | |
| 176 | if (irq >= NR_IRQS || !desc->chip) { |
| 177 | printk(KERN_ERR "BUG: bad set_irq_chip_data(IRQ#%d)\n", irq); |
| 178 | return -EINVAL; |
| 179 | } |
| 180 | |
| 181 | spin_lock_irqsave(&desc->lock, flags); |
| 182 | desc->chip_data = data; |
| 183 | spin_unlock_irqrestore(&desc->lock, flags); |
| 184 | |
| 185 | return 0; |
| 186 | } |
| 187 | EXPORT_SYMBOL(set_irq_chip_data); |
| 188 | |
| 189 | /* |
| 190 | * default enable function |
| 191 | */ |
| 192 | static void default_enable(unsigned int irq) |
| 193 | { |
| 194 | struct irq_desc *desc = irq_desc + irq; |
| 195 | |
| 196 | desc->chip->unmask(irq); |
| 197 | desc->status &= ~IRQ_MASKED; |
| 198 | } |
| 199 | |
| 200 | /* |
| 201 | * default disable function |
| 202 | */ |
| 203 | static void default_disable(unsigned int irq) |
| 204 | { |
| 205 | struct irq_desc *desc = irq_desc + irq; |
| 206 | |
| 207 | if (!(desc->status & IRQ_DELAYED_DISABLE)) |
Yoichi Yuasa | 2ff6fd8 | 2006-09-29 01:59:21 -0700 | [diff] [blame] | 208 | desc->chip->mask(irq); |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 209 | } |
| 210 | |
| 211 | /* |
| 212 | * default startup function |
| 213 | */ |
| 214 | static unsigned int default_startup(unsigned int irq) |
| 215 | { |
| 216 | irq_desc[irq].chip->enable(irq); |
| 217 | |
| 218 | return 0; |
| 219 | } |
| 220 | |
| 221 | /* |
| 222 | * Fixup enable/disable function pointers |
| 223 | */ |
| 224 | void irq_chip_set_defaults(struct irq_chip *chip) |
| 225 | { |
| 226 | if (!chip->enable) |
| 227 | chip->enable = default_enable; |
| 228 | if (!chip->disable) |
| 229 | chip->disable = default_disable; |
| 230 | if (!chip->startup) |
| 231 | chip->startup = default_startup; |
| 232 | if (!chip->shutdown) |
| 233 | chip->shutdown = chip->disable; |
| 234 | if (!chip->name) |
| 235 | chip->name = chip->typename; |
| 236 | } |
| 237 | |
| 238 | static inline void mask_ack_irq(struct irq_desc *desc, int irq) |
| 239 | { |
| 240 | if (desc->chip->mask_ack) |
| 241 | desc->chip->mask_ack(irq); |
| 242 | else { |
| 243 | desc->chip->mask(irq); |
| 244 | desc->chip->ack(irq); |
| 245 | } |
| 246 | } |
| 247 | |
| 248 | /** |
| 249 | * handle_simple_irq - Simple and software-decoded IRQs. |
| 250 | * @irq: the interrupt number |
| 251 | * @desc: the interrupt description structure for this irq |
| 252 | * @regs: pointer to a register structure |
| 253 | * |
| 254 | * Simple interrupts are either sent from a demultiplexing interrupt |
| 255 | * handler or come from hardware, where no interrupt hardware control |
| 256 | * is necessary. |
| 257 | * |
| 258 | * Note: The caller is expected to handle the ack, clear, mask and |
| 259 | * unmask issues if necessary. |
| 260 | */ |
| 261 | void fastcall |
| 262 | handle_simple_irq(unsigned int irq, struct irq_desc *desc, struct pt_regs *regs) |
| 263 | { |
| 264 | struct irqaction *action; |
| 265 | irqreturn_t action_ret; |
| 266 | const unsigned int cpu = smp_processor_id(); |
| 267 | |
| 268 | spin_lock(&desc->lock); |
| 269 | |
| 270 | if (unlikely(desc->status & IRQ_INPROGRESS)) |
| 271 | goto out_unlock; |
| 272 | desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); |
| 273 | kstat_cpu(cpu).irqs[irq]++; |
| 274 | |
| 275 | action = desc->action; |
| 276 | if (unlikely(!action || (desc->status & IRQ_DISABLED))) |
| 277 | goto out_unlock; |
| 278 | |
| 279 | desc->status |= IRQ_INPROGRESS; |
| 280 | spin_unlock(&desc->lock); |
| 281 | |
| 282 | action_ret = handle_IRQ_event(irq, regs, action); |
| 283 | if (!noirqdebug) |
| 284 | note_interrupt(irq, desc, action_ret, regs); |
| 285 | |
| 286 | spin_lock(&desc->lock); |
| 287 | desc->status &= ~IRQ_INPROGRESS; |
| 288 | out_unlock: |
| 289 | spin_unlock(&desc->lock); |
| 290 | } |
| 291 | |
| 292 | /** |
| 293 | * handle_level_irq - Level type irq handler |
| 294 | * @irq: the interrupt number |
| 295 | * @desc: the interrupt description structure for this irq |
| 296 | * @regs: pointer to a register structure |
| 297 | * |
| 298 | * Level type interrupts are active as long as the hardware line has |
| 299 | * the active level. This may require to mask the interrupt and unmask |
| 300 | * it after the associated handler has acknowledged the device, so the |
| 301 | * interrupt line is back to inactive. |
| 302 | */ |
| 303 | void fastcall |
| 304 | handle_level_irq(unsigned int irq, struct irq_desc *desc, struct pt_regs *regs) |
| 305 | { |
| 306 | unsigned int cpu = smp_processor_id(); |
| 307 | struct irqaction *action; |
| 308 | irqreturn_t action_ret; |
| 309 | |
| 310 | spin_lock(&desc->lock); |
| 311 | mask_ack_irq(desc, irq); |
| 312 | |
| 313 | if (unlikely(desc->status & IRQ_INPROGRESS)) |
Ingo Molnar | 86998aa | 2006-09-19 11:14:34 +0200 | [diff] [blame] | 314 | goto out_unlock; |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 315 | desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); |
| 316 | kstat_cpu(cpu).irqs[irq]++; |
| 317 | |
| 318 | /* |
| 319 | * If its disabled or no action available |
| 320 | * keep it masked and get out of here |
| 321 | */ |
| 322 | action = desc->action; |
Benjamin Herrenschmidt | 5a43a06 | 2006-07-03 19:54:59 +1000 | [diff] [blame] | 323 | if (unlikely(!action || (desc->status & IRQ_DISABLED))) { |
| 324 | desc->status |= IRQ_PENDING; |
Ingo Molnar | 86998aa | 2006-09-19 11:14:34 +0200 | [diff] [blame] | 325 | goto out_unlock; |
Benjamin Herrenschmidt | 5a43a06 | 2006-07-03 19:54:59 +1000 | [diff] [blame] | 326 | } |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 327 | |
| 328 | desc->status |= IRQ_INPROGRESS; |
Benjamin Herrenschmidt | 5a43a06 | 2006-07-03 19:54:59 +1000 | [diff] [blame] | 329 | desc->status &= ~IRQ_PENDING; |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 330 | spin_unlock(&desc->lock); |
| 331 | |
| 332 | action_ret = handle_IRQ_event(irq, regs, action); |
| 333 | if (!noirqdebug) |
| 334 | note_interrupt(irq, desc, action_ret, regs); |
| 335 | |
| 336 | spin_lock(&desc->lock); |
| 337 | desc->status &= ~IRQ_INPROGRESS; |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 338 | if (!(desc->status & IRQ_DISABLED) && desc->chip->unmask) |
| 339 | desc->chip->unmask(irq); |
Ingo Molnar | 86998aa | 2006-09-19 11:14:34 +0200 | [diff] [blame] | 340 | out_unlock: |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 341 | spin_unlock(&desc->lock); |
| 342 | } |
| 343 | |
| 344 | /** |
Ingo Molnar | 47c2a3a | 2006-06-29 02:25:03 -0700 | [diff] [blame] | 345 | * handle_fasteoi_irq - irq handler for transparent controllers |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 346 | * @irq: the interrupt number |
| 347 | * @desc: the interrupt description structure for this irq |
| 348 | * @regs: pointer to a register structure |
| 349 | * |
Ingo Molnar | 47c2a3a | 2006-06-29 02:25:03 -0700 | [diff] [blame] | 350 | * Only a single callback will be issued to the chip: an ->eoi() |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 351 | * call when the interrupt has been serviced. This enables support |
| 352 | * for modern forms of interrupt handlers, which handle the flow |
| 353 | * details in hardware, transparently. |
| 354 | */ |
| 355 | void fastcall |
Ingo Molnar | 47c2a3a | 2006-06-29 02:25:03 -0700 | [diff] [blame] | 356 | handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc, |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 357 | struct pt_regs *regs) |
| 358 | { |
| 359 | unsigned int cpu = smp_processor_id(); |
| 360 | struct irqaction *action; |
| 361 | irqreturn_t action_ret; |
| 362 | |
| 363 | spin_lock(&desc->lock); |
| 364 | |
| 365 | if (unlikely(desc->status & IRQ_INPROGRESS)) |
| 366 | goto out; |
| 367 | |
| 368 | desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); |
| 369 | kstat_cpu(cpu).irqs[irq]++; |
| 370 | |
| 371 | /* |
| 372 | * If its disabled or no action available |
| 373 | * keep it masked and get out of here |
| 374 | */ |
| 375 | action = desc->action; |
Benjamin Herrenschmidt | 98bb244 | 2006-06-29 02:25:01 -0700 | [diff] [blame] | 376 | if (unlikely(!action || (desc->status & IRQ_DISABLED))) { |
| 377 | desc->status |= IRQ_PENDING; |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 378 | goto out; |
Benjamin Herrenschmidt | 98bb244 | 2006-06-29 02:25:01 -0700 | [diff] [blame] | 379 | } |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 380 | |
| 381 | desc->status |= IRQ_INPROGRESS; |
Benjamin Herrenschmidt | 98bb244 | 2006-06-29 02:25:01 -0700 | [diff] [blame] | 382 | desc->status &= ~IRQ_PENDING; |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 383 | spin_unlock(&desc->lock); |
| 384 | |
| 385 | action_ret = handle_IRQ_event(irq, regs, action); |
| 386 | if (!noirqdebug) |
| 387 | note_interrupt(irq, desc, action_ret, regs); |
| 388 | |
| 389 | spin_lock(&desc->lock); |
| 390 | desc->status &= ~IRQ_INPROGRESS; |
| 391 | out: |
Ingo Molnar | 47c2a3a | 2006-06-29 02:25:03 -0700 | [diff] [blame] | 392 | desc->chip->eoi(irq); |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 393 | |
| 394 | spin_unlock(&desc->lock); |
| 395 | } |
| 396 | |
| 397 | /** |
| 398 | * handle_edge_irq - edge type IRQ handler |
| 399 | * @irq: the interrupt number |
| 400 | * @desc: the interrupt description structure for this irq |
| 401 | * @regs: pointer to a register structure |
| 402 | * |
| 403 | * Interrupt occures on the falling and/or rising edge of a hardware |
| 404 | * signal. The occurence is latched into the irq controller hardware |
| 405 | * and must be acked in order to be reenabled. After the ack another |
| 406 | * interrupt can happen on the same source even before the first one |
| 407 | * is handled by the assosiacted event handler. If this happens it |
| 408 | * might be necessary to disable (mask) the interrupt depending on the |
| 409 | * controller hardware. This requires to reenable the interrupt inside |
| 410 | * of the loop which handles the interrupts which have arrived while |
| 411 | * the handler was running. If all pending interrupts are handled, the |
| 412 | * loop is left. |
| 413 | */ |
| 414 | void fastcall |
| 415 | handle_edge_irq(unsigned int irq, struct irq_desc *desc, struct pt_regs *regs) |
| 416 | { |
| 417 | const unsigned int cpu = smp_processor_id(); |
| 418 | |
| 419 | spin_lock(&desc->lock); |
| 420 | |
| 421 | desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); |
| 422 | |
| 423 | /* |
| 424 | * If we're currently running this IRQ, or its disabled, |
| 425 | * we shouldn't process the IRQ. Mark it pending, handle |
| 426 | * the necessary masking and go out |
| 427 | */ |
| 428 | if (unlikely((desc->status & (IRQ_INPROGRESS | IRQ_DISABLED)) || |
| 429 | !desc->action)) { |
| 430 | desc->status |= (IRQ_PENDING | IRQ_MASKED); |
| 431 | mask_ack_irq(desc, irq); |
| 432 | goto out_unlock; |
| 433 | } |
| 434 | |
| 435 | kstat_cpu(cpu).irqs[irq]++; |
| 436 | |
| 437 | /* Start handling the irq */ |
| 438 | desc->chip->ack(irq); |
| 439 | |
| 440 | /* Mark the IRQ currently in progress.*/ |
| 441 | desc->status |= IRQ_INPROGRESS; |
| 442 | |
| 443 | do { |
| 444 | struct irqaction *action = desc->action; |
| 445 | irqreturn_t action_ret; |
| 446 | |
| 447 | if (unlikely(!action)) { |
| 448 | desc->chip->mask(irq); |
| 449 | goto out_unlock; |
| 450 | } |
| 451 | |
| 452 | /* |
| 453 | * When another irq arrived while we were handling |
| 454 | * one, we could have masked the irq. |
| 455 | * Renable it, if it was not disabled in meantime. |
| 456 | */ |
| 457 | if (unlikely((desc->status & |
| 458 | (IRQ_PENDING | IRQ_MASKED | IRQ_DISABLED)) == |
| 459 | (IRQ_PENDING | IRQ_MASKED))) { |
| 460 | desc->chip->unmask(irq); |
| 461 | desc->status &= ~IRQ_MASKED; |
| 462 | } |
| 463 | |
| 464 | desc->status &= ~IRQ_PENDING; |
| 465 | spin_unlock(&desc->lock); |
| 466 | action_ret = handle_IRQ_event(irq, regs, action); |
| 467 | if (!noirqdebug) |
| 468 | note_interrupt(irq, desc, action_ret, regs); |
| 469 | spin_lock(&desc->lock); |
| 470 | |
| 471 | } while ((desc->status & (IRQ_PENDING | IRQ_DISABLED)) == IRQ_PENDING); |
| 472 | |
| 473 | desc->status &= ~IRQ_INPROGRESS; |
| 474 | out_unlock: |
| 475 | spin_unlock(&desc->lock); |
| 476 | } |
| 477 | |
| 478 | #ifdef CONFIG_SMP |
| 479 | /** |
| 480 | * handle_percpu_IRQ - Per CPU local irq handler |
| 481 | * @irq: the interrupt number |
| 482 | * @desc: the interrupt description structure for this irq |
| 483 | * @regs: pointer to a register structure |
| 484 | * |
| 485 | * Per CPU interrupts on SMP machines without locking requirements |
| 486 | */ |
| 487 | void fastcall |
| 488 | handle_percpu_irq(unsigned int irq, struct irq_desc *desc, struct pt_regs *regs) |
| 489 | { |
| 490 | irqreturn_t action_ret; |
| 491 | |
| 492 | kstat_this_cpu.irqs[irq]++; |
| 493 | |
| 494 | if (desc->chip->ack) |
| 495 | desc->chip->ack(irq); |
| 496 | |
| 497 | action_ret = handle_IRQ_event(irq, regs, desc->action); |
| 498 | if (!noirqdebug) |
| 499 | note_interrupt(irq, desc, action_ret, regs); |
| 500 | |
| 501 | if (desc->chip->eoi) |
| 502 | desc->chip->eoi(irq); |
| 503 | } |
| 504 | |
| 505 | #endif /* CONFIG_SMP */ |
| 506 | |
| 507 | void |
David Howells | 57a58a9 | 2006-10-05 13:06:34 +0100 | [diff] [blame^] | 508 | __set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained) |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 509 | { |
| 510 | struct irq_desc *desc; |
| 511 | unsigned long flags; |
| 512 | |
| 513 | if (irq >= NR_IRQS) { |
| 514 | printk(KERN_ERR |
| 515 | "Trying to install type control for IRQ%d\n", irq); |
| 516 | return; |
| 517 | } |
| 518 | |
| 519 | desc = irq_desc + irq; |
| 520 | |
| 521 | if (!handle) |
| 522 | handle = handle_bad_irq; |
| 523 | |
Thomas Gleixner | f8b5473 | 2006-07-01 22:30:08 +0100 | [diff] [blame] | 524 | if (desc->chip == &no_irq_chip) { |
| 525 | printk(KERN_WARNING "Trying to install %sinterrupt handler " |
| 526 | "for IRQ%d\n", is_chained ? "chained " : " ", irq); |
| 527 | /* |
| 528 | * Some ARM implementations install a handler for really dumb |
| 529 | * interrupt hardware without setting an irq_chip. This worked |
| 530 | * with the ARM no_irq_chip but the check in setup_irq would |
| 531 | * prevent us to setup the interrupt at all. Switch it to |
| 532 | * dummy_irq_chip for easy transition. |
| 533 | */ |
| 534 | desc->chip = &dummy_irq_chip; |
| 535 | } |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 536 | |
| 537 | spin_lock_irqsave(&desc->lock, flags); |
| 538 | |
| 539 | /* Uninstall? */ |
| 540 | if (handle == handle_bad_irq) { |
| 541 | if (desc->chip != &no_irq_chip) { |
| 542 | desc->chip->mask(irq); |
| 543 | desc->chip->ack(irq); |
| 544 | } |
| 545 | desc->status |= IRQ_DISABLED; |
| 546 | desc->depth = 1; |
| 547 | } |
| 548 | desc->handle_irq = handle; |
| 549 | |
| 550 | if (handle != handle_bad_irq && is_chained) { |
| 551 | desc->status &= ~IRQ_DISABLED; |
| 552 | desc->status |= IRQ_NOREQUEST | IRQ_NOPROBE; |
| 553 | desc->depth = 0; |
| 554 | desc->chip->unmask(irq); |
| 555 | } |
| 556 | spin_unlock_irqrestore(&desc->lock, flags); |
| 557 | } |
| 558 | |
| 559 | void |
| 560 | set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip, |
David Howells | 57a58a9 | 2006-10-05 13:06:34 +0100 | [diff] [blame^] | 561 | irq_flow_handler_t handle) |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 562 | { |
| 563 | set_irq_chip(irq, chip); |
| 564 | __set_irq_handler(irq, handle, 0); |
| 565 | } |
| 566 | |
| 567 | /* |
| 568 | * Get a descriptive string for the highlevel handler, for |
| 569 | * /proc/interrupts output: |
| 570 | */ |
| 571 | const char * |
David Howells | 57a58a9 | 2006-10-05 13:06:34 +0100 | [diff] [blame^] | 572 | handle_irq_name(irq_flow_handler_t handle) |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 573 | { |
| 574 | if (handle == handle_level_irq) |
Ingo Molnar | 47c2a3a | 2006-06-29 02:25:03 -0700 | [diff] [blame] | 575 | return "level "; |
| 576 | if (handle == handle_fasteoi_irq) |
| 577 | return "fasteoi"; |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 578 | if (handle == handle_edge_irq) |
Ingo Molnar | 47c2a3a | 2006-06-29 02:25:03 -0700 | [diff] [blame] | 579 | return "edge "; |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 580 | if (handle == handle_simple_irq) |
Ingo Molnar | 47c2a3a | 2006-06-29 02:25:03 -0700 | [diff] [blame] | 581 | return "simple "; |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 582 | #ifdef CONFIG_SMP |
| 583 | if (handle == handle_percpu_irq) |
Ingo Molnar | 47c2a3a | 2006-06-29 02:25:03 -0700 | [diff] [blame] | 584 | return "percpu "; |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 585 | #endif |
| 586 | if (handle == handle_bad_irq) |
Ingo Molnar | 47c2a3a | 2006-06-29 02:25:03 -0700 | [diff] [blame] | 587 | return "bad "; |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 588 | |
| 589 | return NULL; |
| 590 | } |