Paul Mundt | d183913 | 2007-11-20 18:27:20 +0900 | [diff] [blame] | 1 | /* |
| 2 | * arch/sh/kernel/cpu/sh5/probe.c |
| 3 | * |
| 4 | * CPU Subtype Probing for SH-5. |
| 5 | * |
| 6 | * Copyright (C) 2000, 2001 Paolo Alberelli |
| 7 | * Copyright (C) 2003 - 2007 Paul Mundt |
| 8 | * |
| 9 | * This file is subject to the terms and conditions of the GNU General Public |
| 10 | * License. See the file "COPYING" in the main directory of this archive |
| 11 | * for more details. |
| 12 | */ |
| 13 | #include <linux/init.h> |
| 14 | #include <linux/io.h> |
| 15 | #include <linux/string.h> |
| 16 | #include <asm/processor.h> |
| 17 | #include <asm/cache.h> |
Paul Mundt | 2a6b814 | 2008-04-25 13:05:17 +0900 | [diff] [blame] | 18 | #include <asm/tlb.h> |
Paul Mundt | d183913 | 2007-11-20 18:27:20 +0900 | [diff] [blame] | 19 | |
Paul Mundt | a9079ca | 2010-04-21 12:01:06 +0900 | [diff] [blame] | 20 | void __cpuinit cpu_probe(void) |
Paul Mundt | d183913 | 2007-11-20 18:27:20 +0900 | [diff] [blame] | 21 | { |
| 22 | unsigned long long cir; |
| 23 | |
Paul Mundt | 38350e0 | 2008-02-13 20:14:10 +0900 | [diff] [blame] | 24 | /* |
| 25 | * Do peeks in real mode to avoid having to set up a mapping for |
| 26 | * the WPC registers. On SH5-101 cut2, such a mapping would be |
| 27 | * exposed to an address translation erratum which would make it |
| 28 | * hard to set up correctly. |
| 29 | */ |
Paul Mundt | d183913 | 2007-11-20 18:27:20 +0900 | [diff] [blame] | 30 | cir = peek_real_address_q(0x0d000008); |
Paul Mundt | 38350e0 | 2008-02-13 20:14:10 +0900 | [diff] [blame] | 31 | if ((cir & 0xffff) == 0x5103) |
Paul Mundt | d183913 | 2007-11-20 18:27:20 +0900 | [diff] [blame] | 32 | boot_cpu_data.type = CPU_SH5_103; |
Paul Mundt | 38350e0 | 2008-02-13 20:14:10 +0900 | [diff] [blame] | 33 | else if (((cir >> 32) & 0xffff) == 0x51e2) |
Paul Mundt | d183913 | 2007-11-20 18:27:20 +0900 | [diff] [blame] | 34 | /* CPU.VCR aliased at CIR address on SH5-101 */ |
| 35 | boot_cpu_data.type = CPU_SH5_101; |
Paul Mundt | d183913 | 2007-11-20 18:27:20 +0900 | [diff] [blame] | 36 | |
Paul Mundt | e82da21 | 2009-08-15 10:48:13 +0900 | [diff] [blame] | 37 | boot_cpu_data.family = CPU_FAMILY_SH5; |
| 38 | |
Paul Mundt | d183913 | 2007-11-20 18:27:20 +0900 | [diff] [blame] | 39 | /* |
| 40 | * First, setup some sane values for the I-cache. |
| 41 | */ |
| 42 | boot_cpu_data.icache.ways = 4; |
| 43 | boot_cpu_data.icache.sets = 256; |
| 44 | boot_cpu_data.icache.linesz = L1_CACHE_BYTES; |
Paul Mundt | 38350e0 | 2008-02-13 20:14:10 +0900 | [diff] [blame] | 45 | boot_cpu_data.icache.way_incr = (1 << 13); |
Paul Mundt | d183913 | 2007-11-20 18:27:20 +0900 | [diff] [blame] | 46 | boot_cpu_data.icache.entry_shift = 5; |
Paul Mundt | 38350e0 | 2008-02-13 20:14:10 +0900 | [diff] [blame] | 47 | boot_cpu_data.icache.way_size = boot_cpu_data.icache.sets * |
| 48 | boot_cpu_data.icache.linesz; |
| 49 | boot_cpu_data.icache.entry_mask = 0x1fe0; |
Paul Mundt | d183913 | 2007-11-20 18:27:20 +0900 | [diff] [blame] | 50 | boot_cpu_data.icache.flags = 0; |
| 51 | |
Paul Mundt | 38350e0 | 2008-02-13 20:14:10 +0900 | [diff] [blame] | 52 | /* |
| 53 | * Next, setup some sane values for the D-cache. |
| 54 | * |
| 55 | * On the SH5, these are pretty consistent with the I-cache settings, |
| 56 | * so we just copy over the existing definitions.. these can be fixed |
| 57 | * up later, especially if we add runtime CPU probing. |
| 58 | * |
| 59 | * Though in the meantime it saves us from having to duplicate all of |
| 60 | * the above definitions.. |
| 61 | */ |
| 62 | boot_cpu_data.dcache = boot_cpu_data.icache; |
| 63 | |
| 64 | /* |
| 65 | * Setup any cache-related flags here |
| 66 | */ |
| 67 | #if defined(CONFIG_CACHE_WRITETHROUGH) |
| 68 | set_bit(SH_CACHE_MODE_WT, &(boot_cpu_data.dcache.flags)); |
| 69 | #elif defined(CONFIG_CACHE_WRITEBACK) |
| 70 | set_bit(SH_CACHE_MODE_WB, &(boot_cpu_data.dcache.flags)); |
| 71 | #endif |
Paul Mundt | d183913 | 2007-11-20 18:27:20 +0900 | [diff] [blame] | 72 | |
Paul Mundt | 2a6b814 | 2008-04-25 13:05:17 +0900 | [diff] [blame] | 73 | /* Setup some I/D TLB defaults */ |
| 74 | sh64_tlb_init(); |
Paul Mundt | d183913 | 2007-11-20 18:27:20 +0900 | [diff] [blame] | 75 | } |