blob: 56221bc7c8cd095208af6f8a591678df5f327e84 [file] [log] [blame]
Jiri Slabyfa1c1142007-08-12 17:33:16 +02001/*-
2 * Copyright (c) 2002-2007 Sam Leffler, Errno Consulting
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer,
10 * without modification.
11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
13 * redistribution must be conditioned upon including a substantially
14 * similar Disclaimer requirement for further binary redistribution.
15 * 3. Neither the names of the above-listed copyright holders nor the names
16 * of any contributors may be used to endorse or promote products derived
17 * from this software without specific prior written permission.
18 *
19 * Alternatively, this software may be distributed under the terms of the
20 * GNU General Public License ("GPL") version 2 as published by the Free
21 * Software Foundation.
22 *
23 * NO WARRANTY
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
26 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
27 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
28 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
29 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
32 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
34 * THE POSSIBILITY OF SUCH DAMAGES.
35 *
36 */
37
38/*
Adam Buchbinder6070d812009-12-04 15:47:01 -050039 * Definitions for the Atheros Wireless LAN controller driver.
Jiri Slabyfa1c1142007-08-12 17:33:16 +020040 */
41#ifndef _DEV_ATH_ATHVAR_H
42#define _DEV_ATH_ATHVAR_H
43
44#include <linux/interrupt.h>
45#include <linux/list.h>
46#include <linux/wireless.h>
47#include <linux/if_ether.h>
Bob Copeland3a078872008-06-25 22:35:28 -040048#include <linux/leds.h>
Tobias Doerffele6a3b612009-06-09 17:33:27 +020049#include <linux/rfkill.h>
Jiri Slabyfa1c1142007-08-12 17:33:16 +020050
51#include "ath5k.h"
52#include "debug.h"
Bruno Randolf2111ac02010-04-02 18:44:08 +090053#include "ani.h"
Luis R. Rodriguez608b88c2009-08-17 18:07:23 -070054
55#include "../regd.h"
Luis R. Rodriguezaeb63cf2009-08-12 09:57:00 -070056#include "../ath.h"
Jiri Slabyfa1c1142007-08-12 17:33:16 +020057
58#define ATH_RXBUF 40 /* number of RX buffers */
59#define ATH_TXBUF 200 /* number of TX buffers */
60#define ATH_BCBUF 1 /* number of beacon buffers */
61
62struct ath5k_buf {
63 struct list_head list;
Jiri Slabyfa1c1142007-08-12 17:33:16 +020064 struct ath5k_desc *desc; /* virtual addr of desc */
65 dma_addr_t daddr; /* physical addr of desc */
66 struct sk_buff *skb; /* skbuff for buf */
67 dma_addr_t skbaddr;/* physical addr of skb data */
Jiri Slabyfa1c1142007-08-12 17:33:16 +020068};
69
70/*
71 * Data transmit queue state. One of these exists for each
72 * hardware transmit queue. Packets sent to us from above
73 * are assigned to queues based on their priority. Not all
74 * devices support a complete set of hardware transmit queues.
75 * For those devices the array sc_ac2q will map multiple
76 * priorities to fewer hardware queues (typically all to one
77 * hardware queue).
78 */
79struct ath5k_txq {
80 unsigned int qnum; /* hardware q number */
81 u32 *link; /* link ptr in last TX desc */
82 struct list_head q; /* transmit queue */
83 spinlock_t lock; /* lock on q and link */
84 bool setup;
85};
86
Bob Copeland3a078872008-06-25 22:35:28 -040087#define ATH5K_LED_MAX_NAME_LEN 31
88
89/*
90 * State for LED triggers
91 */
92struct ath5k_led
93{
94 char name[ATH5K_LED_MAX_NAME_LEN + 1]; /* name of the LED in sysfs */
95 struct ath5k_softc *sc; /* driver state */
96 struct led_classdev led_dev; /* led classdev */
97};
98
Tobias Doerffele6a3b612009-06-09 17:33:27 +020099/* Rfkill */
100struct ath5k_rfkill {
101 /* GPIO PIN for rfkill */
102 u16 gpio;
103 /* polarity of rfkill GPIO PIN */
104 bool polarity;
105 /* RFKILL toggle tasklet */
106 struct tasklet_struct toggleq;
107};
Bob Copeland3a078872008-06-25 22:35:28 -0400108
Bruno Randolf495391d2010-03-25 14:49:36 +0900109/* statistics */
Bruno Randolf604eead2010-03-09 16:55:17 +0900110struct ath5k_statistics {
Bruno Randolf495391d2010-03-25 14:49:36 +0900111 /* antenna use */
Bruno Randolf604eead2010-03-09 16:55:17 +0900112 unsigned int antenna_rx[5]; /* frames count per antenna RX */
113 unsigned int antenna_tx[5]; /* frames count per antenna TX */
Bruno Randolf495391d2010-03-25 14:49:36 +0900114
115 /* frame errors */
Bruno Randolf76443952010-03-09 16:56:00 +0900116 unsigned int rx_all_count; /* all RX frames, including errors */
117 unsigned int tx_all_count; /* all TX frames, including errors */
118 unsigned int rxerr_crc;
119 unsigned int rxerr_phy;
Bruno Randolfda351112010-03-25 14:49:42 +0900120 unsigned int rxerr_phy_code[32];
Bruno Randolf76443952010-03-09 16:56:00 +0900121 unsigned int rxerr_fifo;
122 unsigned int rxerr_decrypt;
123 unsigned int rxerr_mic;
124 unsigned int rxerr_proc;
125 unsigned int rxerr_jumbo;
126 unsigned int txerr_retry;
127 unsigned int txerr_fifo;
128 unsigned int txerr_filt;
Bruno Randolf495391d2010-03-25 14:49:36 +0900129
130 /* MIB counters */
131 unsigned int ack_fail;
132 unsigned int rts_fail;
133 unsigned int rts_ok;
134 unsigned int fcs_error;
135 unsigned int beacons;
Bruno Randolf2111ac02010-04-02 18:44:08 +0900136
137 unsigned int mib_intr;
Bruno Randolf87d77c42010-04-12 16:38:52 +0900138 unsigned int rxorn_intr;
Bruno Randolf604eead2010-03-09 16:55:17 +0900139};
140
Jiri Slabyfa1c1142007-08-12 17:33:16 +0200141#if CHAN_DEBUG
142#define ATH_CHAN_MAX (26+26+26+200+200)
143#else
Luis R. Rodriguezd8ee3982008-02-03 21:51:04 -0500144#define ATH_CHAN_MAX (14+14+14+252+20)
Jiri Slabyfa1c1142007-08-12 17:33:16 +0200145#endif
146
147/* Software Carrier, keeps track of the driver state
148 * associated with an instance of a device */
149struct ath5k_softc {
150 struct pci_dev *pdev; /* for dma mapping */
151 void __iomem *iobase; /* address of the device */
152 struct mutex lock; /* dev-level lock */
Jiri Slabyfa1c1142007-08-12 17:33:16 +0200153 struct ieee80211_hw *hw; /* IEEE 802.11 common */
Luis R. Rodriguezd8ee3982008-02-03 21:51:04 -0500154 struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS];
Jiri Slabyfa1c1142007-08-12 17:33:16 +0200155 struct ieee80211_channel channels[ATH_CHAN_MAX];
Bruno Randolf63266a62008-07-30 17:12:58 +0200156 struct ieee80211_rate rates[IEEE80211_NUM_BANDS][AR5K_MAX_RATES];
Bob Copelandb7266042009-03-02 21:55:18 -0500157 s8 rate_idx[IEEE80211_NUM_BANDS][AR5K_MAX_RATES];
Johannes Berg05c914f2008-09-11 00:01:58 +0200158 enum nl80211_iftype opmode;
Jiri Slabyfa1c1142007-08-12 17:33:16 +0200159 struct ath5k_hw *ah; /* Atheros HW */
160
Luis R. Rodriguezd8ee3982008-02-03 21:51:04 -0500161 struct ieee80211_supported_band *curband;
162
Luis R. Rodriguezb4461972008-02-04 10:03:54 -0500163#ifdef CONFIG_ATH5K_DEBUG
Jiri Slabyfa1c1142007-08-12 17:33:16 +0200164 struct ath5k_dbg_info debug; /* debug info */
Luis R. Rodriguezb4461972008-02-04 10:03:54 -0500165#endif /* CONFIG_ATH5K_DEBUG */
Jiri Slabyfa1c1142007-08-12 17:33:16 +0200166
167 struct ath5k_buf *bufptr; /* allocated buffer ptr */
168 struct ath5k_desc *desc; /* TX/RX descriptors */
169 dma_addr_t desc_daddr; /* DMA (physical) address */
170 size_t desc_len; /* size of TX/RX descriptors */
Jiri Slabyfa1c1142007-08-12 17:33:16 +0200171
Bob Copeland8bdd5b92008-10-16 11:02:06 -0400172 DECLARE_BITMAP(status, 5);
Jiri Slabyfa1c1142007-08-12 17:33:16 +0200173#define ATH_STAT_INVALID 0 /* disable hardware accesses */
174#define ATH_STAT_MRRETRY 1 /* multi-rate retry support */
175#define ATH_STAT_PROMISC 2
Bob Copeland3a078872008-06-25 22:35:28 -0400176#define ATH_STAT_LEDSOFT 3 /* enable LED gpio status */
Bob Copeland8bdd5b92008-10-16 11:02:06 -0400177#define ATH_STAT_STARTED 4 /* opened & irqs enabled */
Jiri Slabyfa1c1142007-08-12 17:33:16 +0200178
179 unsigned int filter_flags; /* HW flags, AR5K_RX_FILTER_* */
180 unsigned int curmode; /* current phy mode */
181 struct ieee80211_channel *curchan; /* current h/w channel */
182
Johannes Berg32bfd352007-12-19 01:31:26 +0100183 struct ieee80211_vif *vif;
Jiri Slabyfa1c1142007-08-12 17:33:16 +0200184
Jiri Slabyfa1c1142007-08-12 17:33:16 +0200185 enum ath5k_int imask; /* interrupt mask copy */
186
Jiri Slabyfa1c1142007-08-12 17:33:16 +0200187 u8 bssidmask[ETH_ALEN];
188
189 unsigned int led_pin, /* GPIO pin for driving LED */
Bob Copeland5ef40172009-01-22 08:44:19 -0500190 led_on; /* pin setting for LED on */
Jiri Slabyfa1c1142007-08-12 17:33:16 +0200191
192 struct tasklet_struct restq; /* reset tasklet */
193
194 unsigned int rxbufsize; /* rx size based on mtu */
195 struct list_head rxbuf; /* receive buffer */
196 spinlock_t rxbuflock;
197 u32 *rxlink; /* link ptr in last RX desc */
198 struct tasklet_struct rxtq; /* rx intr tasklet */
Bob Copeland3a078872008-06-25 22:35:28 -0400199 struct ath5k_led rx_led; /* rx led */
Jiri Slabyfa1c1142007-08-12 17:33:16 +0200200
201 struct list_head txbuf; /* transmit buffer */
202 spinlock_t txbuflock;
203 unsigned int txbuf_len; /* buf count in txbuf list */
Bob Copelandcec8db22009-07-04 12:59:51 -0400204 struct ath5k_txq txqs[AR5K_NUM_TX_QUEUES]; /* tx queues */
205 struct ath5k_txq *txq; /* main tx queue */
Jiri Slabyfa1c1142007-08-12 17:33:16 +0200206 struct tasklet_struct txtq; /* tx intr tasklet */
Bob Copeland3a078872008-06-25 22:35:28 -0400207 struct ath5k_led tx_led; /* tx led */
Jiri Slabyfa1c1142007-08-12 17:33:16 +0200208
Tobias Doerffele6a3b612009-06-09 17:33:27 +0200209 struct ath5k_rfkill rf_kill;
Tobias Doerffele6a3b612009-06-09 17:33:27 +0200210
Nick Kossifidis6e220662009-08-10 03:31:31 +0300211 struct tasklet_struct calib; /* calibration tasklet */
212
Jiri Slaby00482972008-08-18 21:45:27 +0200213 spinlock_t block; /* protects beacon */
Bob Copelandacf3c1a2009-02-15 12:06:11 -0500214 struct tasklet_struct beacontq; /* beacon intr tasklet */
Jiri Slabyfa1c1142007-08-12 17:33:16 +0200215 struct ath5k_buf *bbuf; /* beacon buffer */
216 unsigned int bhalq, /* SW q for outgoing beacons */
217 bmisscount, /* missed beacon transmits */
Bruno Randolfe535c1a2008-01-18 21:51:40 +0900218 bintval, /* beacon interval in TU */
Jiri Slabyfa1c1142007-08-12 17:33:16 +0200219 bsent;
Bruno Randolf036cd1e2008-01-19 18:18:21 +0900220 unsigned int nexttbtt; /* next beacon time in TU */
Bob Copelandcec8db22009-07-04 12:59:51 -0400221 struct ath5k_txq *cabq; /* content after beacon */
Jiri Slabyfa1c1142007-08-12 17:33:16 +0200222
Luis R. Rodriguezd8ee3982008-02-03 21:51:04 -0500223 int power_level; /* Requested tx power in dbm */
Thadeu Lima de Souza Cascardo94e2bd62009-10-16 15:20:49 +0200224 bool assoc; /* associate state */
Bob Copeland21800492009-07-04 12:59:52 -0400225 bool enable_beacon; /* true if beacons are on */
Bruno Randolf604eead2010-03-09 16:55:17 +0900226
227 struct ath5k_statistics stats;
Bruno Randolf2111ac02010-04-02 18:44:08 +0900228
229 struct ath5k_ani_state ani_state;
230 struct tasklet_struct ani_tasklet; /* ANI calibration */
Jiri Slabyfa1c1142007-08-12 17:33:16 +0200231};
232
233#define ath5k_hw_hasbssidmask(_ah) \
234 (ath5k_hw_get_capability(_ah, AR5K_CAP_BSSIDMASK, 0, NULL) == 0)
235#define ath5k_hw_hasveol(_ah) \
236 (ath5k_hw_get_capability(_ah, AR5K_CAP_VEOL, 0, NULL) == 0)
237
Jiri Slabyfa1c1142007-08-12 17:33:16 +0200238#endif