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Linus Torvalds1da177e2005-04-16 15:20:36 -07001#ifndef __ASM_CPU_SH4_DMA_H
2#define __ASM_CPU_SH4_DMA_H
3
Manuel Lauss9f8a5e32007-01-25 15:22:11 +09004/* SH7751/7760/7780 DMA IRQ sources */
Manuel Lauss9f8a5e32007-01-25 15:22:11 +09005
Paul Mundt0d831772006-01-16 22:14:09 -08006#ifdef CONFIG_CPU_SH4A
Paul Mundt5283ecb2006-09-27 15:59:17 +09007
Nobuhiro Iwamatsu71b973a2009-03-10 17:26:49 +09008#include <cpu/dma-sh4a.h>
Guennadi Liakhovetski8b1935e2010-02-11 16:50:14 +00009
Nobuhiro Iwamatsu71b973a2009-03-10 17:26:49 +090010#else /* CONFIG_CPU_SH4A */
11/*
12 * SH7750/SH7751/SH7760
13 */
14#define DMTE0_IRQ 34
15#define DMTE4_IRQ 44
16#define DMTE6_IRQ 46
17#define DMAE0_IRQ 38
Linus Torvalds1da177e2005-04-16 15:20:36 -070018
Nobuhiro Iwamatsu71b973a2009-03-10 17:26:49 +090019#define SH_DMAC_BASE0 0xffa00000
20#define SH_DMAC_BASE1 0xffa00070
Paul Mundt0d831772006-01-16 22:14:09 -080021/* Definitions for the SuperH DMAC */
Nobuhiro Iwamatsu71b973a2009-03-10 17:26:49 +090022#define TM_BURST 0x00000080
Paul Mundt0d831772006-01-16 22:14:09 -080023#define TS_8 0x00000010
24#define TS_16 0x00000020
25#define TS_32 0x00000030
26#define TS_64 0x00000000
27
Paul Mundt0d831772006-01-16 22:14:09 -080028#define DMAOR_COD 0x00000008
29
Paul Mundt5283ecb2006-09-27 15:59:17 +090030#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -070031
32#endif /* __ASM_CPU_SH4_DMA_H */