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googlers / maze / linux / 2ba14a017a4ba8d2266316f481d4ad7400073d18 / . / include / asm-arm / arch-ixp4xx / nslu2.h
blob: 850fdc5b45da21eda6f6a3ad9d03a7a06b9d738a [file] [log] [blame]
Alessandro Zummoa7918f32005-11-10 14:05:04 +0000[diff] [blame]1/*
2 * include/asm-arm/arch-ixp4xx/nslu2.h
3 *
4 * NSLU2 platform specific definitions
5 *
6 * Author: Mark Rakes <mrakes AT mac.com>
7 * Maintainers: http://www.nslu2-linux.org
8 *
9 * based on ixdp425.h:
10 * Copyright 2004 (c) MontaVista, Software, Inc.
11 *
Michael-Luke Jonescc50a0d2007-05-23 22:41:53 +0100[diff] [blame]12 * This file is licensed under the terms of the GNU General Public
Alessandro Zummoa7918f32005-11-10 14:05:04 +0000[diff] [blame]13 * License version 2. This program is licensed "as is" without any
14 * warranty of any kind, whether express or implied.
15 */
16
17#ifndef __ASM_ARCH_HARDWARE_H__
18#error "Do not include this directly, instead #include <asm/hardware.h>"
19#endif
20
Alessandro Zummoa7918f32005-11-10 14:05:04 +0000[diff] [blame]21#define NSLU2_SDA_PIN 7
22#define NSLU2_SCL_PIN 6
23
24/*
25 * NSLU2 PCI IRQs
26 */
27#define NSLU2_PCI_MAX_DEV 3
28#define NSLU2_PCI_IRQ_LINES 3
29
30
31/* PCI controller GPIO to IRQ pin mappings */
32#define NSLU2_PCI_INTA_PIN 11
33#define NSLU2_PCI_INTB_PIN 10
34#define NSLU2_PCI_INTC_PIN 9
35#define NSLU2_PCI_INTD_PIN 8
36
Alessandro Zummoa7918f32005-11-10 14:05:04 +0000[diff] [blame]37/* NSLU2 Timer */
38#define NSLU2_FREQ 66000000
Alessandro Zummoa7918f32005-11-10 14:05:04 +0000[diff] [blame]39
40/* Buttons */
41
Michael-Luke Jonescc50a0d2007-05-23 22:41:53 +0100[diff] [blame]42#define NSLU2_PB_GPIO 5
43#define NSLU2_PO_GPIO 8 /* power off */
44#define NSLU2_RB_GPIO 12
Alessandro Zummoa7918f32005-11-10 14:05:04 +0000[diff] [blame]45
46#define NSLU2_PB_IRQ IRQ_IXP4XX_GPIO5
47#define NSLU2_RB_IRQ IRQ_IXP4XX_GPIO12
48
49#define NSLU2_PB_BM (1L << NSLU2_PB_GPIO)
50#define NSLU2_PO_BM (1L << NSLU2_PO_GPIO)
51#define NSLU2_RB_BM (1L << NSLU2_RB_GPIO)
52
53/* Buzzer */
54
55#define NSLU2_GPIO_BUZZ 4
56#define NSLU2_BZ_BM (1L << NSLU2_GPIO_BUZZ)
Rod Whitbya47d08e2006-12-06 00:33:12 +0100[diff] [blame]57
Alessandro Zummoa7918f32005-11-10 14:05:04 +0000[diff] [blame]58/* LEDs */
59
Michael-Luke Jonescc50a0d2007-05-23 22:41:53 +0100[diff] [blame]60#define NSLU2_LED_RED_GPIO 0
61#define NSLU2_LED_GRN_GPIO 1
Alessandro Zummoa7918f32005-11-10 14:05:04 +0000[diff] [blame]62
Michael-Luke Jonescc50a0d2007-05-23 22:41:53 +0100[diff] [blame]63#define NSLU2_LED_RED_BM (1L << NSLU2_LED_RED_GPIO)
64#define NSLU2_LED_GRN_BM (1L << NSLU2_LED_GRN_GPIO)
Alessandro Zummoa7918f32005-11-10 14:05:04 +0000[diff] [blame]65
Michael-Luke Jonescc50a0d2007-05-23 22:41:53 +0100[diff] [blame]66#define NSLU2_LED_DISK1_GPIO 3
67#define NSLU2_LED_DISK2_GPIO 2
Alessandro Zummoa7918f32005-11-10 14:05:04 +0000[diff] [blame]68
Michael-Luke Jonescc50a0d2007-05-23 22:41:53 +0100[diff] [blame]69#define NSLU2_LED_DISK1_BM (1L << NSLU2_LED_DISK1_GPIO)
70#define NSLU2_LED_DISK2_BM (1L << NSLU2_LED_DISK2_GPIO)
Alessandro Zummoa7918f32005-11-10 14:05:04 +0000[diff] [blame]71
72