blob: 1e6f80870679506482ef7d2714621e8ad4df4d08 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * linux/arch/x86_64/kernel/head.S -- start in 32bit and switch to 64bit
3 *
4 * Copyright (C) 2000 Andrea Arcangeli <andrea@suse.de> SuSE
5 * Copyright (C) 2000 Pavel Machek <pavel@suse.cz>
6 * Copyright (C) 2000 Karsten Keil <kkeil@suse.de>
7 * Copyright (C) 2001,2002 Andi Kleen <ak@suse.de>
Linus Torvalds1da177e2005-04-16 15:20:36 -07008 */
9
10
11#include <linux/linkage.h>
12#include <linux/threads.h>
Siddha, Suresh Bf6c2e332005-11-05 17:25:53 +010013#include <linux/init.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070014#include <asm/desc.h>
15#include <asm/segment.h>
16#include <asm/page.h>
17#include <asm/msr.h>
18#include <asm/cache.h>
19
20/* we are not able to switch in one step to the final KERNEL ADRESS SPACE
21 * because we need identity-mapped pages on setup so define __START_KERNEL to
22 * 0x100000 for this stage
23 *
24 */
25
26 .text
Arjan van de Veneaeae0c2006-03-25 16:30:28 +010027 .section .bootstrap.text
Linus Torvalds1da177e2005-04-16 15:20:36 -070028 .code32
29 .globl startup_32
30/* %bx: 1 if coming from smp trampoline on secondary cpu */
31startup_32:
32
33 /*
34 * At this point the CPU runs in 32bit protected mode (CS.D = 1) with
35 * paging disabled and the point of this file is to switch to 64bit
36 * long mode with a kernel mapping for kerneland to jump into the
37 * kernel virtual addresses.
38 * There is no stack until we set one up.
39 */
40
41 /* Initialize the %ds segment register */
42 movl $__KERNEL_DS,%eax
43 movl %eax,%ds
44
45 /* Load new GDT with the 64bit segments using 32bit descriptor */
46 lgdt pGDT32 - __START_KERNEL_map
47
48 /* If the CPU doesn't support CPUID this will double fault.
49 * Unfortunately it is hard to check for CPUID without a stack.
50 */
51
52 /* Check if extended functions are implemented */
53 movl $0x80000000, %eax
54 cpuid
55 cmpl $0x80000000, %eax
56 jbe no_long_mode
57 /* Check if long mode is implemented */
58 mov $0x80000001, %eax
59 cpuid
60 btl $29, %edx
61 jnc no_long_mode
62
63 /*
64 * Prepare for entering 64bits mode
65 */
66
67 /* Enable PAE mode */
68 xorl %eax, %eax
69 btsl $5, %eax
70 movl %eax, %cr4
71
72 /* Setup early boot stage 4 level pagetables */
Siddha, Suresh Bf6c2e332005-11-05 17:25:53 +010073 movl $(boot_level4_pgt - __START_KERNEL_map), %eax
Linus Torvalds1da177e2005-04-16 15:20:36 -070074 movl %eax, %cr3
75
76 /* Setup EFER (Extended Feature Enable Register) */
77 movl $MSR_EFER, %ecx
78 rdmsr
79
80 /* Enable Long Mode */
81 btsl $_EFER_LME, %eax
82
83 /* Make changes effective */
84 wrmsr
85
86 xorl %eax, %eax
87 btsl $31, %eax /* Enable paging and in turn activate Long Mode */
88 btsl $0, %eax /* Enable protected mode */
89 /* Make changes effective */
90 movl %eax, %cr0
91 /*
92 * At this point we're in long mode but in 32bit compatibility mode
93 * with EFER.LME = 1, CS.L = 0, CS.D = 1 (and in turn
94 * EFER.LMA = 1). Now we want to jump in 64bit mode, to do that we use
95 * the new gdt/idt that has __KERNEL_CS with CS.L = 1.
96 */
97 ljmp $__KERNEL_CS, $(startup_64 - __START_KERNEL_map)
98
99 .code64
100 .org 0x100
101 .globl startup_64
102startup_64:
103 /* We come here either from startup_32
104 * or directly from a 64bit bootloader.
105 * Since we may have come directly from a bootloader we
106 * reload the page tables here.
107 */
108
109 /* Enable PAE mode and PGE */
110 xorq %rax, %rax
111 btsq $5, %rax
112 btsq $7, %rax
113 movq %rax, %cr4
114
115 /* Setup early boot stage 4 level pagetables. */
Siddha, Suresh Bf6c2e332005-11-05 17:25:53 +0100116 movq $(boot_level4_pgt - __START_KERNEL_map), %rax
Linus Torvalds1da177e2005-04-16 15:20:36 -0700117 movq %rax, %cr3
118
119 /* Check if nx is implemented */
120 movl $0x80000001, %eax
121 cpuid
122 movl %edx,%edi
123
124 /* Setup EFER (Extended Feature Enable Register) */
125 movl $MSR_EFER, %ecx
126 rdmsr
127
128 /* Enable System Call */
129 btsl $_EFER_SCE, %eax
130
131 /* No Execute supported? */
132 btl $20,%edi
133 jnc 1f
134 btsl $_EFER_NX, %eax
1351:
136 /* Make changes effective */
137 wrmsr
138
139 /* Setup cr0 */
Andi Kleen3829ee62005-07-28 21:15:48 -0700140#define CR0_PM 1 /* protected mode */
141#define CR0_MP (1<<1)
142#define CR0_ET (1<<4)
143#define CR0_NE (1<<5)
144#define CR0_WP (1<<16)
145#define CR0_AM (1<<18)
146#define CR0_PAGING (1<<31)
147 movl $CR0_PM|CR0_MP|CR0_ET|CR0_NE|CR0_WP|CR0_AM|CR0_PAGING,%eax
Linus Torvalds1da177e2005-04-16 15:20:36 -0700148 /* Make changes effective */
149 movq %rax, %cr0
150
151 /* Setup a boot time stack */
152 movq init_rsp(%rip),%rsp
153
154 /* zero EFLAGS after setting rsp */
155 pushq $0
156 popfq
157
158 /*
159 * We must switch to a new descriptor in kernel space for the GDT
160 * because soon the kernel won't have access anymore to the userspace
161 * addresses where we're currently running on. We have to do that here
162 * because in 32bit we couldn't load a 64bit linear address.
163 */
164 lgdt cpu_gdt_descr
165
166 /*
167 * Setup up a dummy PDA. this is just for some early bootup code
168 * that does in_interrupt()
169 */
170 movl $MSR_GS_BASE,%ecx
171 movq $empty_zero_page,%rax
172 movq %rax,%rdx
173 shrq $32,%rdx
174 wrmsr
175
176 /* set up data segments. actually 0 would do too */
177 movl $__KERNEL_DS,%eax
178 movl %eax,%ds
179 movl %eax,%ss
180 movl %eax,%es
181
182 /* esi is pointer to real mode structure with interesting info.
183 pass it to C */
184 movl %esi, %edi
185
186 /* Finally jump to run C code and to be on real kernel address
187 * Since we are running on identity-mapped space we have to jump
Eric W. Biederman26374c72006-09-26 10:52:38 +0200188 * to the full 64bit address, this is only possible as indirect
189 * jump. In addition we need to ensure %cs is set so we make this
190 * a far return.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700191 */
192 movq initial_code(%rip),%rax
Eric W. Biederman26374c72006-09-26 10:52:38 +0200193 pushq $0 # fake return address to stop unwinder
194 pushq $__KERNEL_CS # set correct cs
195 pushq %rax # target address in negative space
196 lretq
Linus Torvalds1da177e2005-04-16 15:20:36 -0700197
Jan Beuliche57113b2006-03-25 16:30:01 +0100198 /* SMP bootup changes these two */
199 .align 8
Linus Torvalds1da177e2005-04-16 15:20:36 -0700200 .globl initial_code
201initial_code:
202 .quad x86_64_start_kernel
203 .globl init_rsp
204init_rsp:
205 .quad init_thread_union+THREAD_SIZE-8
206
207ENTRY(early_idt_handler)
Andi Kleenb9575912005-04-16 15:25:00 -0700208 cmpl $2,early_recursion_flag(%rip)
209 jz 1f
210 incl early_recursion_flag(%rip)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700211 xorl %eax,%eax
212 movq 8(%rsp),%rsi # get rip
213 movq (%rsp),%rdx
214 movq %cr2,%rcx
215 leaq early_idt_msg(%rip),%rdi
216 call early_printk
Andi Kleenb9575912005-04-16 15:25:00 -0700217 cmpl $2,early_recursion_flag(%rip)
218 jz 1f
219 call dump_stack
Andi Kleen6574ffd2006-02-16 23:42:10 +0100220#ifdef CONFIG_KALLSYMS
221 leaq early_idt_ripmsg(%rip),%rdi
222 movq 8(%rsp),%rsi # get rip again
223 call __print_symbol
224#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -07002251: hlt
226 jmp 1b
Andi Kleenb9575912005-04-16 15:25:00 -0700227early_recursion_flag:
228 .long 0
Linus Torvalds1da177e2005-04-16 15:20:36 -0700229
230early_idt_msg:
231 .asciz "PANIC: early exception rip %lx error %lx cr2 %lx\n"
Andi Kleen6574ffd2006-02-16 23:42:10 +0100232early_idt_ripmsg:
233 .asciz "RIP %s\n"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700234
235.code32
236ENTRY(no_long_mode)
237 /* This isn't an x86-64 CPU so hang */
2381:
239 jmp 1b
240
241.org 0xf00
242 .globl pGDT32
243pGDT32:
Jan Beuliche57113b2006-03-25 16:30:01 +0100244 .word gdt_end-cpu_gdt_table-1
Linus Torvalds1da177e2005-04-16 15:20:36 -0700245 .long cpu_gdt_table-__START_KERNEL_map
246
247.org 0xf10
248ljumpvector:
249 .long startup_64-__START_KERNEL_map
250 .word __KERNEL_CS
251
252ENTRY(stext)
253ENTRY(_stext)
254
Jan Beulichf0cf5d12006-01-17 07:03:32 +0100255 $page = 0
256#define NEXT_PAGE(name) \
257 $page = $page + 1; \
258 .org $page * 0x1000; \
259 phys_/**/name = $page * 0x1000 + __PHYSICAL_START; \
260ENTRY(name)
261
262NEXT_PAGE(init_level4_pgt)
Siddha, Suresh Bf6c2e332005-11-05 17:25:53 +0100263 /* This gets initialized in x86_64_start_kernel */
264 .fill 512,8,0
Linus Torvalds1da177e2005-04-16 15:20:36 -0700265
Jan Beulichf0cf5d12006-01-17 07:03:32 +0100266NEXT_PAGE(level3_ident_pgt)
267 .quad phys_level2_ident_pgt | 0x007
Linus Torvalds1da177e2005-04-16 15:20:36 -0700268 .fill 511,8,0
269
Jan Beulichf0cf5d12006-01-17 07:03:32 +0100270NEXT_PAGE(level3_kernel_pgt)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700271 .fill 510,8,0
272 /* (2^48-(2*1024*1024*1024)-((2^39)*511))/(2^30) = 510 */
Jan Beulichf0cf5d12006-01-17 07:03:32 +0100273 .quad phys_level2_kernel_pgt | 0x007
Linus Torvalds1da177e2005-04-16 15:20:36 -0700274 .fill 1,8,0
275
Jan Beulichf0cf5d12006-01-17 07:03:32 +0100276NEXT_PAGE(level2_ident_pgt)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700277 /* 40MB for bootup. */
Jan Beulichf0cf5d12006-01-17 07:03:32 +0100278 i = 0
279 .rept 20
280 .quad i << 21 | 0x083
281 i = i + 1
282 .endr
Linus Torvalds1da177e2005-04-16 15:20:36 -0700283 /* Temporary mappings for the super early allocator in arch/x86_64/mm/init.c */
284 .globl temp_boot_pmds
285temp_boot_pmds:
286 .fill 492,8,0
287
Jan Beulichf0cf5d12006-01-17 07:03:32 +0100288NEXT_PAGE(level2_kernel_pgt)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700289 /* 40MB kernel mapping. The kernel code cannot be bigger than that.
290 When you change this change KERNEL_TEXT_SIZE in page.h too. */
291 /* (2^48-(2*1024*1024*1024)-((2^39)*511)-((2^30)*510)) = 0 */
Jan Beulichf0cf5d12006-01-17 07:03:32 +0100292 i = 0
293 .rept 20
294 .quad i << 21 | 0x183
295 i = i + 1
296 .endr
Linus Torvalds1da177e2005-04-16 15:20:36 -0700297 /* Module mapping starts here */
298 .fill 492,8,0
299
Jan Beulichf0cf5d12006-01-17 07:03:32 +0100300NEXT_PAGE(level3_physmem_pgt)
301 .quad phys_level2_kernel_pgt | 0x007 /* so that __va works even before pagetable_init */
302 .fill 511,8,0
Linus Torvalds1da177e2005-04-16 15:20:36 -0700303
Jan Beulichf0cf5d12006-01-17 07:03:32 +0100304#undef NEXT_PAGE
Linus Torvalds1da177e2005-04-16 15:20:36 -0700305
Jan Beulichf0cf5d12006-01-17 07:03:32 +0100306 .data
Linus Torvalds1da177e2005-04-16 15:20:36 -0700307
Linus Torvalds1da177e2005-04-16 15:20:36 -0700308#ifdef CONFIG_ACPI_SLEEP
Jan Beulichf0cf5d12006-01-17 07:03:32 +0100309 .align PAGE_SIZE
Linus Torvalds1da177e2005-04-16 15:20:36 -0700310ENTRY(wakeup_level4_pgt)
Jan Beulichf0cf5d12006-01-17 07:03:32 +0100311 .quad phys_level3_ident_pgt | 0x007
Linus Torvalds1da177e2005-04-16 15:20:36 -0700312 .fill 255,8,0
Jan Beulichf0cf5d12006-01-17 07:03:32 +0100313 .quad phys_level3_physmem_pgt | 0x007
Linus Torvalds1da177e2005-04-16 15:20:36 -0700314 .fill 254,8,0
315 /* (2^48-(2*1024*1024*1024))/(2^39) = 511 */
Jan Beulichf0cf5d12006-01-17 07:03:32 +0100316 .quad phys_level3_kernel_pgt | 0x007
Linus Torvalds1da177e2005-04-16 15:20:36 -0700317#endif
318
Siddha, Suresh Bf6c2e332005-11-05 17:25:53 +0100319#ifndef CONFIG_HOTPLUG_CPU
320 __INITDATA
321#endif
322 /*
323 * This default setting generates an ident mapping at address 0x100000
324 * and a mapping for the kernel that precisely maps virtual address
325 * 0xffffffff80000000 to physical address 0x000000. (always using
326 * 2Mbyte large pages provided by PAE mode)
327 */
328 .align PAGE_SIZE
329ENTRY(boot_level4_pgt)
Jan Beulichf0cf5d12006-01-17 07:03:32 +0100330 .quad phys_level3_ident_pgt | 0x007
Siddha, Suresh Bf6c2e332005-11-05 17:25:53 +0100331 .fill 255,8,0
Jan Beulichf0cf5d12006-01-17 07:03:32 +0100332 .quad phys_level3_physmem_pgt | 0x007
Siddha, Suresh Bf6c2e332005-11-05 17:25:53 +0100333 .fill 254,8,0
334 /* (2^48-(2*1024*1024*1024))/(2^39) = 511 */
Jan Beulichf0cf5d12006-01-17 07:03:32 +0100335 .quad phys_level3_kernel_pgt | 0x007
Siddha, Suresh Bf6c2e332005-11-05 17:25:53 +0100336
Linus Torvalds1da177e2005-04-16 15:20:36 -0700337 .data
338
339 .align 16
340 .globl cpu_gdt_descr
341cpu_gdt_descr:
Jan Beuliche57113b2006-03-25 16:30:01 +0100342 .word gdt_end-cpu_gdt_table-1
Linus Torvalds1da177e2005-04-16 15:20:36 -0700343gdt:
344 .quad cpu_gdt_table
345#ifdef CONFIG_SMP
346 .rept NR_CPUS-1
347 .word 0
348 .quad 0
349 .endr
350#endif
351
352/* We need valid kernel segments for data and code in long mode too
353 * IRET will check the segment types kkeil 2000/10/28
354 * Also sysret mandates a special GDT layout
355 */
356
Jan Beuliche57113b2006-03-25 16:30:01 +0100357 .section .data.page_aligned, "aw"
358 .align PAGE_SIZE
Linus Torvalds1da177e2005-04-16 15:20:36 -0700359
360/* The TLS descriptors are currently at a different place compared to i386.
361 Hopefully nobody expects them at a fixed place (Wine?) */
362
363ENTRY(cpu_gdt_table)
364 .quad 0x0000000000000000 /* NULL descriptor */
Andi Kleencdc4b9c2006-01-11 22:46:24 +0100365 .quad 0x0 /* unused */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700366 .quad 0x00af9a000000ffff /* __KERNEL_CS */
367 .quad 0x00cf92000000ffff /* __KERNEL_DS */
368 .quad 0x00cffa000000ffff /* __USER32_CS */
369 .quad 0x00cff2000000ffff /* __USER_DS, __USER32_DS */
370 .quad 0x00affa000000ffff /* __USER_CS */
371 .quad 0x00cf9a000000ffff /* __KERNEL32_CS */
372 .quad 0,0 /* TSS */
373 .quad 0,0 /* LDT */
374 .quad 0,0,0 /* three TLS descriptors */
Vojtech Pavlikc08c8202006-09-26 10:52:28 +0200375 .quad 0x0000f40000000000 /* node/CPU stored in limit */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700376gdt_end:
377 /* asm/segment.h:GDT_ENTRIES must match this */
378 /* This should be a multiple of the cache line size */
Ravikiran G Thirumalaic11efdf2006-01-11 22:43:57 +0100379 /* GDTs of other CPUs are now dynamically allocated */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700380
Ravikiran G Thirumalaic11efdf2006-01-11 22:43:57 +0100381 /* zero the remaining page */
382 .fill PAGE_SIZE / 8 - GDT_ENTRIES,8,0
383
Jan Beuliche57113b2006-03-25 16:30:01 +0100384 .section .bss, "aw", @nobits
385 .align L1_CACHE_BYTES
386ENTRY(idt_table)
387 .skip 256 * 16
Linus Torvalds1da177e2005-04-16 15:20:36 -0700388
Jan Beuliche57113b2006-03-25 16:30:01 +0100389 .section .bss.page_aligned, "aw", @nobits
390 .align PAGE_SIZE
391ENTRY(empty_zero_page)
392 .skip PAGE_SIZE