Dave Airlie | 312fec1 | 2012-02-29 13:40:04 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2012 Red Hat Inc. |
| 3 | * Parts based on xf86-video-ast |
| 4 | * Copyright (c) 2005 ASPEED Technology Inc. |
| 5 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 7 | * copy of this software and associated documentation files (the |
| 8 | * "Software"), to deal in the Software without restriction, including |
| 9 | * without limitation the rights to use, copy, modify, merge, publish, |
| 10 | * distribute, sub license, and/or sell copies of the Software, and to |
| 11 | * permit persons to whom the Software is furnished to do so, subject to |
| 12 | * the following conditions: |
| 13 | * |
| 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 16 | * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL |
| 17 | * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, |
| 18 | * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR |
| 19 | * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE |
| 20 | * USE OR OTHER DEALINGS IN THE SOFTWARE. |
| 21 | * |
| 22 | * The above copyright notice and this permission notice (including the |
| 23 | * next paragraph) shall be included in all copies or substantial portions |
| 24 | * of the Software. |
| 25 | * |
| 26 | */ |
| 27 | /* |
| 28 | * Authors: Dave Airlie <airlied@redhat.com> |
| 29 | */ |
| 30 | #include <linux/export.h> |
| 31 | #include "drmP.h" |
| 32 | #include "drm_crtc.h" |
| 33 | #include "drm_crtc_helper.h" |
| 34 | #include "ast_drv.h" |
| 35 | |
| 36 | #include "ast_tables.h" |
| 37 | |
| 38 | static struct ast_i2c_chan *ast_i2c_create(struct drm_device *dev); |
| 39 | static void ast_i2c_destroy(struct ast_i2c_chan *i2c); |
| 40 | static int ast_cursor_set(struct drm_crtc *crtc, |
| 41 | struct drm_file *file_priv, |
| 42 | uint32_t handle, |
| 43 | uint32_t width, |
| 44 | uint32_t height); |
| 45 | static int ast_cursor_move(struct drm_crtc *crtc, |
| 46 | int x, int y); |
| 47 | |
| 48 | static inline void ast_load_palette_index(struct ast_private *ast, |
| 49 | u8 index, u8 red, u8 green, |
| 50 | u8 blue) |
| 51 | { |
| 52 | ast_io_write8(ast, AST_IO_DAC_INDEX_WRITE, index); |
| 53 | ast_io_read8(ast, AST_IO_SEQ_PORT); |
| 54 | ast_io_write8(ast, AST_IO_DAC_DATA, red); |
| 55 | ast_io_read8(ast, AST_IO_SEQ_PORT); |
| 56 | ast_io_write8(ast, AST_IO_DAC_DATA, green); |
| 57 | ast_io_read8(ast, AST_IO_SEQ_PORT); |
| 58 | ast_io_write8(ast, AST_IO_DAC_DATA, blue); |
| 59 | ast_io_read8(ast, AST_IO_SEQ_PORT); |
| 60 | } |
| 61 | |
| 62 | static void ast_crtc_load_lut(struct drm_crtc *crtc) |
| 63 | { |
| 64 | struct ast_private *ast = crtc->dev->dev_private; |
| 65 | struct ast_crtc *ast_crtc = to_ast_crtc(crtc); |
| 66 | int i; |
| 67 | |
| 68 | if (!crtc->enabled) |
| 69 | return; |
| 70 | |
| 71 | for (i = 0; i < 256; i++) |
| 72 | ast_load_palette_index(ast, i, ast_crtc->lut_r[i], |
| 73 | ast_crtc->lut_g[i], ast_crtc->lut_b[i]); |
| 74 | } |
| 75 | |
| 76 | static bool ast_get_vbios_mode_info(struct drm_crtc *crtc, struct drm_display_mode *mode, |
| 77 | struct drm_display_mode *adjusted_mode, |
| 78 | struct ast_vbios_mode_info *vbios_mode) |
| 79 | { |
| 80 | struct ast_private *ast = crtc->dev->dev_private; |
| 81 | u32 refresh_rate_index = 0, mode_id, color_index, refresh_rate; |
| 82 | u32 hborder, vborder; |
| 83 | |
| 84 | switch (crtc->fb->bits_per_pixel) { |
| 85 | case 8: |
| 86 | vbios_mode->std_table = &vbios_stdtable[VGAModeIndex]; |
| 87 | color_index = VGAModeIndex - 1; |
| 88 | break; |
| 89 | case 16: |
| 90 | vbios_mode->std_table = &vbios_stdtable[HiCModeIndex]; |
| 91 | color_index = HiCModeIndex; |
| 92 | break; |
| 93 | case 24: |
| 94 | case 32: |
| 95 | vbios_mode->std_table = &vbios_stdtable[TrueCModeIndex]; |
| 96 | color_index = TrueCModeIndex; |
| 97 | break; |
| 98 | default: |
| 99 | return false; |
| 100 | } |
| 101 | |
| 102 | switch (crtc->mode.crtc_hdisplay) { |
| 103 | case 640: |
| 104 | vbios_mode->enh_table = &res_640x480[refresh_rate_index]; |
| 105 | break; |
| 106 | case 800: |
| 107 | vbios_mode->enh_table = &res_800x600[refresh_rate_index]; |
| 108 | break; |
| 109 | case 1024: |
| 110 | vbios_mode->enh_table = &res_1024x768[refresh_rate_index]; |
| 111 | break; |
| 112 | case 1280: |
| 113 | if (crtc->mode.crtc_vdisplay == 800) |
| 114 | vbios_mode->enh_table = &res_1280x800[refresh_rate_index]; |
| 115 | else |
| 116 | vbios_mode->enh_table = &res_1280x1024[refresh_rate_index]; |
| 117 | break; |
| 118 | case 1440: |
| 119 | vbios_mode->enh_table = &res_1440x900[refresh_rate_index]; |
| 120 | break; |
| 121 | case 1600: |
| 122 | vbios_mode->enh_table = &res_1600x1200[refresh_rate_index]; |
| 123 | break; |
| 124 | case 1680: |
| 125 | vbios_mode->enh_table = &res_1680x1050[refresh_rate_index]; |
| 126 | break; |
| 127 | case 1920: |
| 128 | if (crtc->mode.crtc_vdisplay == 1080) |
| 129 | vbios_mode->enh_table = &res_1920x1080[refresh_rate_index]; |
| 130 | else |
| 131 | vbios_mode->enh_table = &res_1920x1200[refresh_rate_index]; |
| 132 | break; |
| 133 | default: |
| 134 | return false; |
| 135 | } |
| 136 | |
| 137 | refresh_rate = drm_mode_vrefresh(mode); |
| 138 | while (vbios_mode->enh_table->refresh_rate < refresh_rate) { |
| 139 | vbios_mode->enh_table++; |
| 140 | if ((vbios_mode->enh_table->refresh_rate > refresh_rate) || |
| 141 | (vbios_mode->enh_table->refresh_rate == 0xff)) { |
| 142 | vbios_mode->enh_table--; |
| 143 | break; |
| 144 | } |
| 145 | } |
| 146 | |
| 147 | hborder = (vbios_mode->enh_table->flags & HBorder) ? 8 : 0; |
| 148 | vborder = (vbios_mode->enh_table->flags & VBorder) ? 8 : 0; |
| 149 | |
| 150 | adjusted_mode->crtc_htotal = vbios_mode->enh_table->ht; |
| 151 | adjusted_mode->crtc_hblank_start = vbios_mode->enh_table->hde + hborder; |
| 152 | adjusted_mode->crtc_hblank_end = vbios_mode->enh_table->ht - hborder; |
| 153 | adjusted_mode->crtc_hsync_start = vbios_mode->enh_table->hde + hborder + |
| 154 | vbios_mode->enh_table->hfp; |
| 155 | adjusted_mode->crtc_hsync_end = (vbios_mode->enh_table->hde + hborder + |
| 156 | vbios_mode->enh_table->hfp + |
| 157 | vbios_mode->enh_table->hsync); |
| 158 | |
| 159 | adjusted_mode->crtc_vtotal = vbios_mode->enh_table->vt; |
| 160 | adjusted_mode->crtc_vblank_start = vbios_mode->enh_table->vde + vborder; |
| 161 | adjusted_mode->crtc_vblank_end = vbios_mode->enh_table->vt - vborder; |
| 162 | adjusted_mode->crtc_vsync_start = vbios_mode->enh_table->vde + vborder + |
| 163 | vbios_mode->enh_table->vfp; |
| 164 | adjusted_mode->crtc_vsync_end = (vbios_mode->enh_table->vde + vborder + |
| 165 | vbios_mode->enh_table->vfp + |
| 166 | vbios_mode->enh_table->vsync); |
| 167 | |
| 168 | refresh_rate_index = vbios_mode->enh_table->refresh_rate_index; |
| 169 | mode_id = vbios_mode->enh_table->mode_id; |
| 170 | |
| 171 | if (ast->chip == AST1180) { |
| 172 | /* TODO 1180 */ |
| 173 | } else { |
| 174 | ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8c, (u8)((color_index & 0xf) << 4)); |
| 175 | ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8d, refresh_rate_index & 0xff); |
| 176 | ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8e, mode_id & 0xff); |
| 177 | |
| 178 | ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x91, 0xa8); |
| 179 | ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x92, crtc->fb->bits_per_pixel); |
| 180 | ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x93, adjusted_mode->clock / 1000); |
| 181 | ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x94, adjusted_mode->crtc_hdisplay); |
| 182 | ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x95, adjusted_mode->crtc_hdisplay >> 8); |
| 183 | |
| 184 | ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x96, adjusted_mode->crtc_vdisplay); |
| 185 | ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x97, adjusted_mode->crtc_vdisplay >> 8); |
| 186 | } |
| 187 | |
| 188 | return true; |
| 189 | |
| 190 | |
| 191 | } |
| 192 | static void ast_set_std_reg(struct drm_crtc *crtc, struct drm_display_mode *mode, |
| 193 | struct ast_vbios_mode_info *vbios_mode) |
| 194 | { |
| 195 | struct ast_private *ast = crtc->dev->dev_private; |
| 196 | struct ast_vbios_stdtable *stdtable; |
| 197 | u32 i; |
| 198 | u8 jreg; |
| 199 | |
| 200 | stdtable = vbios_mode->std_table; |
| 201 | |
| 202 | jreg = stdtable->misc; |
| 203 | ast_io_write8(ast, AST_IO_MISC_PORT_WRITE, jreg); |
| 204 | |
| 205 | /* Set SEQ */ |
| 206 | ast_set_index_reg(ast, AST_IO_SEQ_PORT, 0x00, 0x03); |
| 207 | for (i = 0; i < 4; i++) { |
| 208 | jreg = stdtable->seq[i]; |
| 209 | if (!i) |
| 210 | jreg |= 0x20; |
| 211 | ast_set_index_reg(ast, AST_IO_SEQ_PORT, (i + 1) , jreg); |
| 212 | } |
| 213 | |
| 214 | /* Set CRTC */ |
| 215 | ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x7f, 0x00); |
| 216 | for (i = 0; i < 25; i++) |
| 217 | ast_set_index_reg(ast, AST_IO_CRTC_PORT, i, stdtable->crtc[i]); |
| 218 | |
| 219 | /* set AR */ |
| 220 | jreg = ast_io_read8(ast, AST_IO_INPUT_STATUS1_READ); |
| 221 | for (i = 0; i < 20; i++) { |
| 222 | jreg = stdtable->ar[i]; |
| 223 | ast_io_write8(ast, AST_IO_AR_PORT_WRITE, (u8)i); |
| 224 | ast_io_write8(ast, AST_IO_AR_PORT_WRITE, jreg); |
| 225 | } |
| 226 | ast_io_write8(ast, AST_IO_AR_PORT_WRITE, 0x14); |
| 227 | ast_io_write8(ast, AST_IO_AR_PORT_WRITE, 0x00); |
| 228 | |
| 229 | jreg = ast_io_read8(ast, AST_IO_INPUT_STATUS1_READ); |
| 230 | ast_io_write8(ast, AST_IO_AR_PORT_WRITE, 0x20); |
| 231 | |
| 232 | /* Set GR */ |
| 233 | for (i = 0; i < 9; i++) |
| 234 | ast_set_index_reg(ast, AST_IO_GR_PORT, i, stdtable->gr[i]); |
| 235 | } |
| 236 | |
| 237 | static void ast_set_crtc_reg(struct drm_crtc *crtc, struct drm_display_mode *mode, |
| 238 | struct ast_vbios_mode_info *vbios_mode) |
| 239 | { |
| 240 | struct ast_private *ast = crtc->dev->dev_private; |
| 241 | u8 jreg05 = 0, jreg07 = 0, jreg09 = 0, jregAC = 0, jregAD = 0, jregAE = 0; |
| 242 | u16 temp; |
| 243 | |
| 244 | ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x7f, 0x00); |
| 245 | |
| 246 | temp = (mode->crtc_htotal >> 3) - 5; |
| 247 | if (temp & 0x100) |
| 248 | jregAC |= 0x01; /* HT D[8] */ |
| 249 | ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x00, 0x00, temp); |
| 250 | |
| 251 | temp = (mode->crtc_hdisplay >> 3) - 1; |
| 252 | if (temp & 0x100) |
| 253 | jregAC |= 0x04; /* HDE D[8] */ |
| 254 | ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x01, 0x00, temp); |
| 255 | |
| 256 | temp = (mode->crtc_hblank_start >> 3) - 1; |
| 257 | if (temp & 0x100) |
| 258 | jregAC |= 0x10; /* HBS D[8] */ |
| 259 | ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x02, 0x00, temp); |
| 260 | |
| 261 | temp = ((mode->crtc_hblank_end >> 3) - 1) & 0x7f; |
| 262 | if (temp & 0x20) |
| 263 | jreg05 |= 0x80; /* HBE D[5] */ |
| 264 | if (temp & 0x40) |
| 265 | jregAD |= 0x01; /* HBE D[5] */ |
| 266 | ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x03, 0xE0, (temp & 0x1f)); |
| 267 | |
| 268 | temp = (mode->crtc_hsync_start >> 3) - 1; |
| 269 | if (temp & 0x100) |
| 270 | jregAC |= 0x40; /* HRS D[5] */ |
| 271 | ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x04, 0x00, temp); |
| 272 | |
| 273 | temp = ((mode->crtc_hsync_end >> 3) - 1) & 0x3f; |
| 274 | if (temp & 0x20) |
| 275 | jregAD |= 0x04; /* HRE D[5] */ |
| 276 | ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x05, 0x60, (u8)((temp & 0x1f) | jreg05)); |
| 277 | |
| 278 | ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAC, 0x00, jregAC); |
| 279 | ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAD, 0x00, jregAD); |
| 280 | |
| 281 | /* vert timings */ |
| 282 | temp = (mode->crtc_vtotal) - 2; |
| 283 | if (temp & 0x100) |
| 284 | jreg07 |= 0x01; |
| 285 | if (temp & 0x200) |
| 286 | jreg07 |= 0x20; |
| 287 | if (temp & 0x400) |
| 288 | jregAE |= 0x01; |
| 289 | ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x06, 0x00, temp); |
| 290 | |
| 291 | temp = (mode->crtc_vsync_start) - 1; |
| 292 | if (temp & 0x100) |
| 293 | jreg07 |= 0x04; |
| 294 | if (temp & 0x200) |
| 295 | jreg07 |= 0x80; |
| 296 | if (temp & 0x400) |
| 297 | jregAE |= 0x08; |
| 298 | ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x10, 0x00, temp); |
| 299 | |
| 300 | temp = (mode->crtc_vsync_end - 1) & 0x3f; |
| 301 | if (temp & 0x10) |
| 302 | jregAE |= 0x20; |
| 303 | if (temp & 0x20) |
| 304 | jregAE |= 0x40; |
| 305 | ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x70, temp & 0xf); |
| 306 | |
| 307 | temp = mode->crtc_vdisplay - 1; |
| 308 | if (temp & 0x100) |
| 309 | jreg07 |= 0x02; |
| 310 | if (temp & 0x200) |
| 311 | jreg07 |= 0x40; |
| 312 | if (temp & 0x400) |
| 313 | jregAE |= 0x02; |
| 314 | ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x12, 0x00, temp); |
| 315 | |
| 316 | temp = mode->crtc_vblank_start - 1; |
| 317 | if (temp & 0x100) |
| 318 | jreg07 |= 0x08; |
| 319 | if (temp & 0x200) |
| 320 | jreg09 |= 0x20; |
| 321 | if (temp & 0x400) |
| 322 | jregAE |= 0x04; |
| 323 | ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x15, 0x00, temp); |
| 324 | |
| 325 | temp = mode->crtc_vblank_end - 1; |
| 326 | if (temp & 0x100) |
| 327 | jregAE |= 0x10; |
| 328 | ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x16, 0x00, temp); |
| 329 | |
| 330 | ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x07, 0x00, jreg07); |
| 331 | ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x09, 0xdf, jreg09); |
| 332 | ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAE, 0x00, (jregAE | 0x80)); |
| 333 | |
| 334 | ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x7f, 0x80); |
| 335 | } |
| 336 | |
| 337 | static void ast_set_offset_reg(struct drm_crtc *crtc) |
| 338 | { |
| 339 | struct ast_private *ast = crtc->dev->dev_private; |
| 340 | |
| 341 | u16 offset; |
| 342 | |
| 343 | offset = crtc->fb->pitches[0] >> 3; |
| 344 | ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x13, (offset & 0xff)); |
| 345 | ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xb0, (offset >> 8) & 0x3f); |
| 346 | } |
| 347 | |
| 348 | static void ast_set_dclk_reg(struct drm_device *dev, struct drm_display_mode *mode, |
| 349 | struct ast_vbios_mode_info *vbios_mode) |
| 350 | { |
| 351 | struct ast_private *ast = dev->dev_private; |
| 352 | struct ast_vbios_dclk_info *clk_info; |
| 353 | |
| 354 | clk_info = &dclk_table[vbios_mode->enh_table->dclk_index]; |
| 355 | |
| 356 | ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xc0, 0x00, clk_info->param1); |
| 357 | ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xc1, 0x00, clk_info->param2); |
| 358 | ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xbb, 0x0f, |
| 359 | (clk_info->param3 & 0x80) | ((clk_info->param3 & 0x3) << 4)); |
| 360 | } |
| 361 | |
| 362 | static void ast_set_ext_reg(struct drm_crtc *crtc, struct drm_display_mode *mode, |
| 363 | struct ast_vbios_mode_info *vbios_mode) |
| 364 | { |
| 365 | struct ast_private *ast = crtc->dev->dev_private; |
| 366 | u8 jregA0 = 0, jregA3 = 0, jregA8 = 0; |
| 367 | |
| 368 | switch (crtc->fb->bits_per_pixel) { |
| 369 | case 8: |
| 370 | jregA0 = 0x70; |
| 371 | jregA3 = 0x01; |
| 372 | jregA8 = 0x00; |
| 373 | break; |
| 374 | case 15: |
| 375 | case 16: |
| 376 | jregA0 = 0x70; |
| 377 | jregA3 = 0x04; |
| 378 | jregA8 = 0x02; |
| 379 | break; |
| 380 | case 32: |
| 381 | jregA0 = 0x70; |
| 382 | jregA3 = 0x08; |
| 383 | jregA8 = 0x02; |
| 384 | break; |
| 385 | } |
| 386 | |
| 387 | ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa0, 0x8f, jregA0); |
| 388 | ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa3, 0xf0, jregA3); |
| 389 | ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa8, 0xfd, jregA8); |
| 390 | |
| 391 | /* Set Threshold */ |
| 392 | if (ast->chip == AST2300) { |
| 393 | ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x78); |
| 394 | ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x60); |
| 395 | } else if (ast->chip == AST2100 || |
| 396 | ast->chip == AST1100 || |
| 397 | ast->chip == AST2200 || |
| 398 | ast->chip == AST2150) { |
| 399 | ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x3f); |
| 400 | ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x2f); |
| 401 | } else { |
| 402 | ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x2f); |
| 403 | ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x1f); |
| 404 | } |
| 405 | } |
| 406 | |
| 407 | void ast_set_sync_reg(struct drm_device *dev, struct drm_display_mode *mode, |
| 408 | struct ast_vbios_mode_info *vbios_mode) |
| 409 | { |
| 410 | struct ast_private *ast = dev->dev_private; |
| 411 | u8 jreg; |
| 412 | |
| 413 | jreg = ast_io_read8(ast, AST_IO_MISC_PORT_READ); |
| 414 | jreg |= (vbios_mode->enh_table->flags & SyncNN); |
| 415 | ast_io_write8(ast, AST_IO_MISC_PORT_WRITE, jreg); |
| 416 | } |
| 417 | |
| 418 | bool ast_set_dac_reg(struct drm_crtc *crtc, struct drm_display_mode *mode, |
| 419 | struct ast_vbios_mode_info *vbios_mode) |
| 420 | { |
| 421 | switch (crtc->fb->bits_per_pixel) { |
| 422 | case 8: |
| 423 | break; |
| 424 | default: |
| 425 | return false; |
| 426 | } |
| 427 | return true; |
| 428 | } |
| 429 | |
| 430 | void ast_set_start_address_crt1(struct drm_crtc *crtc, unsigned offset) |
| 431 | { |
| 432 | struct ast_private *ast = crtc->dev->dev_private; |
| 433 | u32 addr; |
| 434 | |
| 435 | addr = offset >> 2; |
| 436 | ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x0d, (u8)(addr & 0xff)); |
| 437 | ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x0c, (u8)((addr >> 8) & 0xff)); |
| 438 | ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xaf, (u8)((addr >> 16) & 0xff)); |
| 439 | |
| 440 | } |
| 441 | |
| 442 | static void ast_crtc_dpms(struct drm_crtc *crtc, int mode) |
| 443 | { |
| 444 | struct ast_private *ast = crtc->dev->dev_private; |
| 445 | |
| 446 | if (ast->chip == AST1180) |
| 447 | return; |
| 448 | |
| 449 | switch (mode) { |
| 450 | case DRM_MODE_DPMS_ON: |
| 451 | case DRM_MODE_DPMS_STANDBY: |
| 452 | case DRM_MODE_DPMS_SUSPEND: |
| 453 | ast_set_index_reg_mask(ast, AST_IO_SEQ_PORT, 0x1, 0xdf, 0); |
| 454 | ast_crtc_load_lut(crtc); |
| 455 | break; |
| 456 | case DRM_MODE_DPMS_OFF: |
| 457 | ast_set_index_reg_mask(ast, AST_IO_SEQ_PORT, 0x1, 0xdf, 0x20); |
| 458 | break; |
| 459 | } |
| 460 | } |
| 461 | |
| 462 | static bool ast_crtc_mode_fixup(struct drm_crtc *crtc, |
| 463 | struct drm_display_mode *mode, |
| 464 | struct drm_display_mode *adjusted_mode) |
| 465 | { |
| 466 | return true; |
| 467 | } |
| 468 | |
| 469 | /* ast is different - we will force move buffers out of VRAM */ |
| 470 | static int ast_crtc_do_set_base(struct drm_crtc *crtc, |
| 471 | struct drm_framebuffer *fb, |
| 472 | int x, int y, int atomic) |
| 473 | { |
| 474 | struct ast_private *ast = crtc->dev->dev_private; |
| 475 | struct drm_gem_object *obj; |
| 476 | struct ast_framebuffer *ast_fb; |
| 477 | struct ast_bo *bo; |
| 478 | int ret; |
| 479 | u64 gpu_addr; |
| 480 | |
| 481 | /* push the previous fb to system ram */ |
| 482 | if (!atomic && fb) { |
| 483 | ast_fb = to_ast_framebuffer(fb); |
| 484 | obj = ast_fb->obj; |
| 485 | bo = gem_to_ast_bo(obj); |
| 486 | ret = ast_bo_reserve(bo, false); |
| 487 | if (ret) |
| 488 | return ret; |
| 489 | ast_bo_push_sysram(bo); |
| 490 | ast_bo_unreserve(bo); |
| 491 | } |
| 492 | |
| 493 | ast_fb = to_ast_framebuffer(crtc->fb); |
| 494 | obj = ast_fb->obj; |
| 495 | bo = gem_to_ast_bo(obj); |
| 496 | |
| 497 | ret = ast_bo_reserve(bo, false); |
| 498 | if (ret) |
| 499 | return ret; |
| 500 | |
| 501 | ret = ast_bo_pin(bo, TTM_PL_FLAG_VRAM, &gpu_addr); |
| 502 | if (ret) { |
| 503 | ast_bo_unreserve(bo); |
| 504 | return ret; |
| 505 | } |
| 506 | |
| 507 | if (&ast->fbdev->afb == ast_fb) { |
| 508 | /* if pushing console in kmap it */ |
| 509 | ret = ttm_bo_kmap(&bo->bo, 0, bo->bo.num_pages, &bo->kmap); |
| 510 | if (ret) |
| 511 | DRM_ERROR("failed to kmap fbcon\n"); |
| 512 | } |
| 513 | ast_bo_unreserve(bo); |
| 514 | |
| 515 | ast_set_start_address_crt1(crtc, (u32)gpu_addr); |
| 516 | |
| 517 | return 0; |
| 518 | } |
| 519 | |
| 520 | static int ast_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y, |
| 521 | struct drm_framebuffer *old_fb) |
| 522 | { |
| 523 | return ast_crtc_do_set_base(crtc, old_fb, x, y, 0); |
| 524 | } |
| 525 | |
| 526 | static int ast_crtc_mode_set(struct drm_crtc *crtc, |
| 527 | struct drm_display_mode *mode, |
| 528 | struct drm_display_mode *adjusted_mode, |
| 529 | int x, int y, |
| 530 | struct drm_framebuffer *old_fb) |
| 531 | { |
| 532 | struct drm_device *dev = crtc->dev; |
| 533 | struct ast_private *ast = crtc->dev->dev_private; |
| 534 | struct ast_vbios_mode_info vbios_mode; |
| 535 | bool ret; |
| 536 | if (ast->chip == AST1180) { |
| 537 | DRM_ERROR("AST 1180 modesetting not supported\n"); |
| 538 | return -EINVAL; |
| 539 | } |
| 540 | |
| 541 | ret = ast_get_vbios_mode_info(crtc, mode, adjusted_mode, &vbios_mode); |
| 542 | if (ret == false) |
| 543 | return -EINVAL; |
| 544 | ast_open_key(ast); |
| 545 | |
| 546 | ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa1, 0xff, 0x04); |
| 547 | |
| 548 | ast_set_std_reg(crtc, adjusted_mode, &vbios_mode); |
| 549 | ast_set_crtc_reg(crtc, adjusted_mode, &vbios_mode); |
| 550 | ast_set_offset_reg(crtc); |
| 551 | ast_set_dclk_reg(dev, adjusted_mode, &vbios_mode); |
| 552 | ast_set_ext_reg(crtc, adjusted_mode, &vbios_mode); |
| 553 | ast_set_sync_reg(dev, adjusted_mode, &vbios_mode); |
| 554 | ast_set_dac_reg(crtc, adjusted_mode, &vbios_mode); |
| 555 | |
| 556 | ast_crtc_mode_set_base(crtc, x, y, old_fb); |
| 557 | |
| 558 | return 0; |
| 559 | } |
| 560 | |
| 561 | static void ast_crtc_disable(struct drm_crtc *crtc) |
| 562 | { |
| 563 | |
| 564 | } |
| 565 | |
| 566 | static void ast_crtc_prepare(struct drm_crtc *crtc) |
| 567 | { |
| 568 | |
| 569 | } |
| 570 | |
| 571 | static void ast_crtc_commit(struct drm_crtc *crtc) |
| 572 | { |
| 573 | struct ast_private *ast = crtc->dev->dev_private; |
| 574 | ast_set_index_reg_mask(ast, AST_IO_SEQ_PORT, 0x1, 0xdf, 0); |
| 575 | } |
| 576 | |
| 577 | |
| 578 | static const struct drm_crtc_helper_funcs ast_crtc_helper_funcs = { |
| 579 | .dpms = ast_crtc_dpms, |
| 580 | .mode_fixup = ast_crtc_mode_fixup, |
| 581 | .mode_set = ast_crtc_mode_set, |
| 582 | .mode_set_base = ast_crtc_mode_set_base, |
| 583 | .disable = ast_crtc_disable, |
| 584 | .load_lut = ast_crtc_load_lut, |
| 585 | .disable = ast_crtc_disable, |
| 586 | .prepare = ast_crtc_prepare, |
| 587 | .commit = ast_crtc_commit, |
| 588 | |
| 589 | }; |
| 590 | |
| 591 | static void ast_crtc_reset(struct drm_crtc *crtc) |
| 592 | { |
| 593 | |
| 594 | } |
| 595 | |
| 596 | static void ast_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green, |
| 597 | u16 *blue, uint32_t start, uint32_t size) |
| 598 | { |
| 599 | struct ast_crtc *ast_crtc = to_ast_crtc(crtc); |
| 600 | int end = (start + size > 256) ? 256 : start + size, i; |
| 601 | |
| 602 | /* userspace palettes are always correct as is */ |
| 603 | for (i = start; i < end; i++) { |
| 604 | ast_crtc->lut_r[i] = red[i] >> 8; |
| 605 | ast_crtc->lut_g[i] = green[i] >> 8; |
| 606 | ast_crtc->lut_b[i] = blue[i] >> 8; |
| 607 | } |
| 608 | ast_crtc_load_lut(crtc); |
| 609 | } |
| 610 | |
| 611 | |
| 612 | static void ast_crtc_destroy(struct drm_crtc *crtc) |
| 613 | { |
| 614 | drm_crtc_cleanup(crtc); |
| 615 | kfree(crtc); |
| 616 | } |
| 617 | |
| 618 | static const struct drm_crtc_funcs ast_crtc_funcs = { |
| 619 | .cursor_set = ast_cursor_set, |
| 620 | .cursor_move = ast_cursor_move, |
| 621 | .reset = ast_crtc_reset, |
| 622 | .set_config = drm_crtc_helper_set_config, |
| 623 | .gamma_set = ast_crtc_gamma_set, |
| 624 | .destroy = ast_crtc_destroy, |
| 625 | }; |
| 626 | |
| 627 | int ast_crtc_init(struct drm_device *dev) |
| 628 | { |
| 629 | struct ast_crtc *crtc; |
| 630 | int i; |
| 631 | |
| 632 | crtc = kzalloc(sizeof(struct ast_crtc), GFP_KERNEL); |
| 633 | if (!crtc) |
| 634 | return -ENOMEM; |
| 635 | |
| 636 | drm_crtc_init(dev, &crtc->base, &ast_crtc_funcs); |
| 637 | drm_mode_crtc_set_gamma_size(&crtc->base, 256); |
| 638 | drm_crtc_helper_add(&crtc->base, &ast_crtc_helper_funcs); |
| 639 | |
| 640 | for (i = 0; i < 256; i++) { |
| 641 | crtc->lut_r[i] = i; |
| 642 | crtc->lut_g[i] = i; |
| 643 | crtc->lut_b[i] = i; |
| 644 | } |
| 645 | return 0; |
| 646 | } |
| 647 | |
| 648 | static void ast_encoder_destroy(struct drm_encoder *encoder) |
| 649 | { |
| 650 | drm_encoder_cleanup(encoder); |
| 651 | kfree(encoder); |
| 652 | } |
| 653 | |
| 654 | |
| 655 | static struct drm_encoder *ast_best_single_encoder(struct drm_connector *connector) |
| 656 | { |
| 657 | int enc_id = connector->encoder_ids[0]; |
| 658 | struct drm_mode_object *obj; |
| 659 | struct drm_encoder *encoder; |
| 660 | |
| 661 | /* pick the encoder ids */ |
| 662 | if (enc_id) { |
| 663 | obj = drm_mode_object_find(connector->dev, enc_id, DRM_MODE_OBJECT_ENCODER); |
| 664 | if (!obj) |
| 665 | return NULL; |
| 666 | encoder = obj_to_encoder(obj); |
| 667 | return encoder; |
| 668 | } |
| 669 | return NULL; |
| 670 | } |
| 671 | |
| 672 | |
| 673 | static const struct drm_encoder_funcs ast_enc_funcs = { |
| 674 | .destroy = ast_encoder_destroy, |
| 675 | }; |
| 676 | |
| 677 | static void ast_encoder_dpms(struct drm_encoder *encoder, int mode) |
| 678 | { |
| 679 | |
| 680 | } |
| 681 | |
| 682 | static bool ast_mode_fixup(struct drm_encoder *encoder, |
| 683 | struct drm_display_mode *mode, |
| 684 | struct drm_display_mode *adjusted_mode) |
| 685 | { |
| 686 | return true; |
| 687 | } |
| 688 | |
| 689 | static void ast_encoder_mode_set(struct drm_encoder *encoder, |
| 690 | struct drm_display_mode *mode, |
| 691 | struct drm_display_mode *adjusted_mode) |
| 692 | { |
| 693 | } |
| 694 | |
| 695 | static void ast_encoder_prepare(struct drm_encoder *encoder) |
| 696 | { |
| 697 | |
| 698 | } |
| 699 | |
| 700 | static void ast_encoder_commit(struct drm_encoder *encoder) |
| 701 | { |
| 702 | |
| 703 | } |
| 704 | |
| 705 | |
| 706 | static const struct drm_encoder_helper_funcs ast_enc_helper_funcs = { |
| 707 | .dpms = ast_encoder_dpms, |
| 708 | .mode_fixup = ast_mode_fixup, |
| 709 | .prepare = ast_encoder_prepare, |
| 710 | .commit = ast_encoder_commit, |
| 711 | .mode_set = ast_encoder_mode_set, |
| 712 | }; |
| 713 | |
| 714 | int ast_encoder_init(struct drm_device *dev) |
| 715 | { |
| 716 | struct ast_encoder *ast_encoder; |
| 717 | |
| 718 | ast_encoder = kzalloc(sizeof(struct ast_encoder), GFP_KERNEL); |
| 719 | if (!ast_encoder) |
| 720 | return -ENOMEM; |
| 721 | |
| 722 | drm_encoder_init(dev, &ast_encoder->base, &ast_enc_funcs, |
| 723 | DRM_MODE_ENCODER_DAC); |
| 724 | drm_encoder_helper_add(&ast_encoder->base, &ast_enc_helper_funcs); |
| 725 | |
| 726 | ast_encoder->base.possible_crtcs = 1; |
| 727 | return 0; |
| 728 | } |
| 729 | |
| 730 | static int ast_get_modes(struct drm_connector *connector) |
| 731 | { |
| 732 | struct ast_connector *ast_connector = to_ast_connector(connector); |
| 733 | struct edid *edid; |
| 734 | int ret; |
| 735 | |
| 736 | edid = drm_get_edid(connector, &ast_connector->i2c->adapter); |
| 737 | if (edid) { |
| 738 | drm_mode_connector_update_edid_property(&ast_connector->base, edid); |
| 739 | ret = drm_add_edid_modes(connector, edid); |
| 740 | return ret; |
| 741 | } else |
| 742 | drm_mode_connector_update_edid_property(&ast_connector->base, NULL); |
| 743 | return 0; |
| 744 | } |
| 745 | |
| 746 | static int ast_mode_valid(struct drm_connector *connector, |
| 747 | struct drm_display_mode *mode) |
| 748 | { |
| 749 | return MODE_OK; |
| 750 | } |
| 751 | |
| 752 | static void ast_connector_destroy(struct drm_connector *connector) |
| 753 | { |
| 754 | struct ast_connector *ast_connector = to_ast_connector(connector); |
| 755 | ast_i2c_destroy(ast_connector->i2c); |
| 756 | drm_sysfs_connector_remove(connector); |
| 757 | drm_connector_cleanup(connector); |
| 758 | kfree(connector); |
| 759 | } |
| 760 | |
| 761 | static enum drm_connector_status |
| 762 | ast_connector_detect(struct drm_connector *connector, bool force) |
| 763 | { |
| 764 | return connector_status_connected; |
| 765 | } |
| 766 | |
| 767 | static const struct drm_connector_helper_funcs ast_connector_helper_funcs = { |
| 768 | .mode_valid = ast_mode_valid, |
| 769 | .get_modes = ast_get_modes, |
| 770 | .best_encoder = ast_best_single_encoder, |
| 771 | }; |
| 772 | |
| 773 | static const struct drm_connector_funcs ast_connector_funcs = { |
| 774 | .dpms = drm_helper_connector_dpms, |
| 775 | .detect = ast_connector_detect, |
| 776 | .fill_modes = drm_helper_probe_single_connector_modes, |
| 777 | .destroy = ast_connector_destroy, |
| 778 | }; |
| 779 | |
| 780 | int ast_connector_init(struct drm_device *dev) |
| 781 | { |
| 782 | struct ast_connector *ast_connector; |
| 783 | struct drm_connector *connector; |
| 784 | struct drm_encoder *encoder; |
| 785 | |
| 786 | ast_connector = kzalloc(sizeof(struct ast_connector), GFP_KERNEL); |
| 787 | if (!ast_connector) |
| 788 | return -ENOMEM; |
| 789 | |
| 790 | connector = &ast_connector->base; |
| 791 | drm_connector_init(dev, connector, &ast_connector_funcs, DRM_MODE_CONNECTOR_VGA); |
| 792 | |
| 793 | drm_connector_helper_add(connector, &ast_connector_helper_funcs); |
| 794 | |
| 795 | connector->interlace_allowed = 0; |
| 796 | connector->doublescan_allowed = 0; |
| 797 | |
| 798 | drm_sysfs_connector_add(connector); |
| 799 | |
| 800 | connector->polled = DRM_CONNECTOR_POLL_CONNECT; |
| 801 | |
| 802 | encoder = list_first_entry(&dev->mode_config.encoder_list, struct drm_encoder, head); |
| 803 | drm_mode_connector_attach_encoder(connector, encoder); |
| 804 | |
| 805 | ast_connector->i2c = ast_i2c_create(dev); |
| 806 | if (!ast_connector->i2c) |
| 807 | DRM_ERROR("failed to add ddc bus for connector\n"); |
| 808 | |
| 809 | return 0; |
| 810 | } |
| 811 | |
| 812 | /* allocate cursor cache and pin at start of VRAM */ |
| 813 | int ast_cursor_init(struct drm_device *dev) |
| 814 | { |
| 815 | struct ast_private *ast = dev->dev_private; |
| 816 | int size; |
| 817 | int ret; |
| 818 | struct drm_gem_object *obj; |
| 819 | struct ast_bo *bo; |
| 820 | uint64_t gpu_addr; |
| 821 | |
| 822 | size = (AST_HWC_SIZE + AST_HWC_SIGNATURE_SIZE) * AST_DEFAULT_HWC_NUM; |
| 823 | |
| 824 | ret = ast_gem_create(dev, size, true, &obj); |
| 825 | if (ret) |
| 826 | return ret; |
| 827 | bo = gem_to_ast_bo(obj); |
| 828 | ret = ast_bo_reserve(bo, false); |
| 829 | if (unlikely(ret != 0)) |
| 830 | goto fail; |
| 831 | |
| 832 | ret = ast_bo_pin(bo, TTM_PL_FLAG_VRAM, &gpu_addr); |
| 833 | ast_bo_unreserve(bo); |
| 834 | if (ret) |
| 835 | goto fail; |
| 836 | |
| 837 | /* kmap the object */ |
| 838 | ret = ttm_bo_kmap(&bo->bo, 0, bo->bo.num_pages, &ast->cache_kmap); |
| 839 | if (ret) |
| 840 | goto fail; |
| 841 | |
| 842 | ast->cursor_cache = obj; |
| 843 | ast->cursor_cache_gpu_addr = gpu_addr; |
| 844 | DRM_ERROR("pinned cursor cache at %llx\n", ast->cursor_cache_gpu_addr); |
| 845 | return 0; |
| 846 | fail: |
| 847 | return ret; |
| 848 | } |
| 849 | |
| 850 | void ast_cursor_fini(struct drm_device *dev) |
| 851 | { |
| 852 | struct ast_private *ast = dev->dev_private; |
| 853 | ttm_bo_kunmap(&ast->cache_kmap); |
| 854 | drm_gem_object_unreference_unlocked(ast->cursor_cache); |
| 855 | } |
| 856 | |
| 857 | int ast_mode_init(struct drm_device *dev) |
| 858 | { |
| 859 | ast_cursor_init(dev); |
| 860 | ast_crtc_init(dev); |
| 861 | ast_encoder_init(dev); |
| 862 | ast_connector_init(dev); |
| 863 | return 0; |
| 864 | } |
| 865 | |
| 866 | void ast_mode_fini(struct drm_device *dev) |
| 867 | { |
| 868 | ast_cursor_fini(dev); |
| 869 | } |
| 870 | |
| 871 | static int get_clock(void *i2c_priv) |
| 872 | { |
| 873 | struct ast_i2c_chan *i2c = i2c_priv; |
| 874 | struct ast_private *ast = i2c->dev->dev_private; |
| 875 | uint32_t val; |
| 876 | |
| 877 | val = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x10) >> 4; |
| 878 | return val & 1 ? 1 : 0; |
| 879 | } |
| 880 | |
| 881 | static int get_data(void *i2c_priv) |
| 882 | { |
| 883 | struct ast_i2c_chan *i2c = i2c_priv; |
| 884 | struct ast_private *ast = i2c->dev->dev_private; |
| 885 | uint32_t val; |
| 886 | |
| 887 | val = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x20) >> 5; |
| 888 | return val & 1 ? 1 : 0; |
| 889 | } |
| 890 | |
| 891 | static void set_clock(void *i2c_priv, int clock) |
| 892 | { |
| 893 | struct ast_i2c_chan *i2c = i2c_priv; |
| 894 | struct ast_private *ast = i2c->dev->dev_private; |
| 895 | int i; |
| 896 | u8 ujcrb7, jtemp; |
| 897 | |
| 898 | for (i = 0; i < 0x10000; i++) { |
| 899 | ujcrb7 = ((clock & 0x01) ? 0 : 1); |
| 900 | ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0xfe, ujcrb7); |
| 901 | jtemp = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x01); |
| 902 | if (ujcrb7 == jtemp) |
| 903 | break; |
| 904 | } |
| 905 | } |
| 906 | |
| 907 | static void set_data(void *i2c_priv, int data) |
| 908 | { |
| 909 | struct ast_i2c_chan *i2c = i2c_priv; |
| 910 | struct ast_private *ast = i2c->dev->dev_private; |
| 911 | int i; |
| 912 | u8 ujcrb7, jtemp; |
| 913 | |
| 914 | for (i = 0; i < 0x10000; i++) { |
| 915 | ujcrb7 = ((data & 0x01) ? 0 : 1) << 2; |
| 916 | ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0xfb, ujcrb7); |
| 917 | jtemp = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x04); |
| 918 | if (ujcrb7 == jtemp) |
| 919 | break; |
| 920 | } |
| 921 | } |
| 922 | |
| 923 | static struct ast_i2c_chan *ast_i2c_create(struct drm_device *dev) |
| 924 | { |
| 925 | struct ast_i2c_chan *i2c; |
| 926 | int ret; |
| 927 | |
| 928 | i2c = kzalloc(sizeof(struct ast_i2c_chan), GFP_KERNEL); |
| 929 | if (!i2c) |
| 930 | return NULL; |
| 931 | |
| 932 | i2c->adapter.owner = THIS_MODULE; |
| 933 | i2c->adapter.class = I2C_CLASS_DDC; |
| 934 | i2c->adapter.dev.parent = &dev->pdev->dev; |
| 935 | i2c->dev = dev; |
| 936 | i2c_set_adapdata(&i2c->adapter, i2c); |
| 937 | snprintf(i2c->adapter.name, sizeof(i2c->adapter.name), |
| 938 | "AST i2c bit bus"); |
| 939 | i2c->adapter.algo_data = &i2c->bit; |
| 940 | |
| 941 | i2c->bit.udelay = 20; |
| 942 | i2c->bit.timeout = 2; |
| 943 | i2c->bit.data = i2c; |
| 944 | i2c->bit.setsda = set_data; |
| 945 | i2c->bit.setscl = set_clock; |
| 946 | i2c->bit.getsda = get_data; |
| 947 | i2c->bit.getscl = get_clock; |
| 948 | ret = i2c_bit_add_bus(&i2c->adapter); |
| 949 | if (ret) { |
| 950 | DRM_ERROR("Failed to register bit i2c\n"); |
| 951 | goto out_free; |
| 952 | } |
| 953 | |
| 954 | return i2c; |
| 955 | out_free: |
| 956 | kfree(i2c); |
| 957 | return NULL; |
| 958 | } |
| 959 | |
| 960 | static void ast_i2c_destroy(struct ast_i2c_chan *i2c) |
| 961 | { |
| 962 | if (!i2c) |
| 963 | return; |
| 964 | i2c_del_adapter(&i2c->adapter); |
| 965 | kfree(i2c); |
| 966 | } |
| 967 | |
| 968 | void ast_show_cursor(struct drm_crtc *crtc) |
| 969 | { |
| 970 | struct ast_private *ast = crtc->dev->dev_private; |
| 971 | u8 jreg; |
| 972 | |
| 973 | jreg = 0x2; |
| 974 | /* enable ARGB cursor */ |
| 975 | jreg |= 1; |
| 976 | ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xcb, 0xfc, jreg); |
| 977 | } |
| 978 | |
| 979 | void ast_hide_cursor(struct drm_crtc *crtc) |
| 980 | { |
| 981 | struct ast_private *ast = crtc->dev->dev_private; |
| 982 | ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xcb, 0xfc, 0x00); |
| 983 | } |
| 984 | |
| 985 | static u32 copy_cursor_image(u8 *src, u8 *dst, int width, int height) |
| 986 | { |
| 987 | union { |
| 988 | u32 ul; |
| 989 | u8 b[4]; |
| 990 | } srcdata32[2], data32; |
| 991 | union { |
| 992 | u16 us; |
| 993 | u8 b[2]; |
| 994 | } data16; |
| 995 | u32 csum = 0; |
| 996 | s32 alpha_dst_delta, last_alpha_dst_delta; |
| 997 | u8 *srcxor, *dstxor; |
| 998 | int i, j; |
| 999 | u32 per_pixel_copy, two_pixel_copy; |
| 1000 | |
| 1001 | alpha_dst_delta = AST_MAX_HWC_WIDTH << 1; |
| 1002 | last_alpha_dst_delta = alpha_dst_delta - (width << 1); |
| 1003 | |
| 1004 | srcxor = src; |
| 1005 | dstxor = (u8 *)dst + last_alpha_dst_delta + (AST_MAX_HWC_HEIGHT - height) * alpha_dst_delta; |
| 1006 | per_pixel_copy = width & 1; |
| 1007 | two_pixel_copy = width >> 1; |
| 1008 | |
| 1009 | for (j = 0; j < height; j++) { |
| 1010 | for (i = 0; i < two_pixel_copy; i++) { |
| 1011 | srcdata32[0].ul = *((u32 *)srcxor) & 0xf0f0f0f0; |
| 1012 | srcdata32[1].ul = *((u32 *)(srcxor + 4)) & 0xf0f0f0f0; |
| 1013 | data32.b[0] = srcdata32[0].b[1] | (srcdata32[0].b[0] >> 4); |
| 1014 | data32.b[1] = srcdata32[0].b[3] | (srcdata32[0].b[2] >> 4); |
| 1015 | data32.b[2] = srcdata32[0].b[1] | (srcdata32[1].b[0] >> 4); |
| 1016 | data32.b[3] = srcdata32[0].b[3] | (srcdata32[1].b[2] >> 4); |
| 1017 | |
| 1018 | writel(data32.ul, dstxor); |
| 1019 | csum += data32.ul; |
| 1020 | |
| 1021 | dstxor += 4; |
| 1022 | srcxor += 8; |
| 1023 | |
| 1024 | } |
| 1025 | |
| 1026 | for (i = 0; i < per_pixel_copy; i++) { |
| 1027 | srcdata32[0].ul = *((u32 *)srcxor) & 0xf0f0f0f0; |
| 1028 | data16.b[0] = srcdata32[0].b[1] | (srcdata32[0].b[0] >> 4); |
| 1029 | data16.b[1] = srcdata32[0].b[3] | (srcdata32[0].b[2] >> 4); |
| 1030 | writew(data16.us, dstxor); |
| 1031 | csum += (u32)data16.us; |
| 1032 | |
| 1033 | dstxor += 2; |
| 1034 | srcxor += 4; |
| 1035 | } |
| 1036 | dstxor += last_alpha_dst_delta; |
| 1037 | } |
| 1038 | return csum; |
| 1039 | } |
| 1040 | |
| 1041 | static int ast_cursor_set(struct drm_crtc *crtc, |
| 1042 | struct drm_file *file_priv, |
| 1043 | uint32_t handle, |
| 1044 | uint32_t width, |
| 1045 | uint32_t height) |
| 1046 | { |
| 1047 | struct ast_private *ast = crtc->dev->dev_private; |
| 1048 | struct ast_crtc *ast_crtc = to_ast_crtc(crtc); |
| 1049 | struct drm_gem_object *obj; |
| 1050 | struct ast_bo *bo; |
| 1051 | uint64_t gpu_addr; |
| 1052 | u32 csum; |
| 1053 | int ret; |
| 1054 | struct ttm_bo_kmap_obj uobj_map; |
| 1055 | u8 *src, *dst; |
| 1056 | bool src_isiomem, dst_isiomem; |
| 1057 | if (!handle) { |
| 1058 | ast_hide_cursor(crtc); |
| 1059 | return 0; |
| 1060 | } |
| 1061 | |
| 1062 | if (width > AST_MAX_HWC_WIDTH || height > AST_MAX_HWC_HEIGHT) |
| 1063 | return -EINVAL; |
| 1064 | |
| 1065 | obj = drm_gem_object_lookup(crtc->dev, file_priv, handle); |
| 1066 | if (!obj) { |
| 1067 | DRM_ERROR("Cannot find cursor object %x for crtc\n", handle); |
| 1068 | return -ENOENT; |
| 1069 | } |
| 1070 | bo = gem_to_ast_bo(obj); |
| 1071 | |
| 1072 | ret = ast_bo_reserve(bo, false); |
| 1073 | if (ret) |
| 1074 | goto fail; |
| 1075 | |
| 1076 | ret = ttm_bo_kmap(&bo->bo, 0, bo->bo.num_pages, &uobj_map); |
| 1077 | |
| 1078 | src = ttm_kmap_obj_virtual(&uobj_map, &src_isiomem); |
| 1079 | dst = ttm_kmap_obj_virtual(&ast->cache_kmap, &dst_isiomem); |
| 1080 | |
| 1081 | if (src_isiomem == true) |
| 1082 | DRM_ERROR("src cursor bo should be in main memory\n"); |
| 1083 | if (dst_isiomem == false) |
| 1084 | DRM_ERROR("dst bo should be in VRAM\n"); |
| 1085 | |
| 1086 | dst += (AST_HWC_SIZE + AST_HWC_SIGNATURE_SIZE)*ast->next_cursor; |
| 1087 | |
| 1088 | /* do data transfer to cursor cache */ |
| 1089 | csum = copy_cursor_image(src, dst, width, height); |
| 1090 | |
| 1091 | /* write checksum + signature */ |
| 1092 | ttm_bo_kunmap(&uobj_map); |
| 1093 | ast_bo_unreserve(bo); |
| 1094 | { |
| 1095 | u8 *dst = (u8 *)ast->cache_kmap.virtual + (AST_HWC_SIZE + AST_HWC_SIGNATURE_SIZE)*ast->next_cursor + AST_HWC_SIZE; |
| 1096 | writel(csum, dst); |
| 1097 | writel(width, dst + AST_HWC_SIGNATURE_SizeX); |
| 1098 | writel(height, dst + AST_HWC_SIGNATURE_SizeY); |
| 1099 | writel(0, dst + AST_HWC_SIGNATURE_HOTSPOTX); |
| 1100 | writel(0, dst + AST_HWC_SIGNATURE_HOTSPOTY); |
| 1101 | |
| 1102 | /* set pattern offset */ |
| 1103 | gpu_addr = ast->cursor_cache_gpu_addr; |
| 1104 | gpu_addr += (AST_HWC_SIZE + AST_HWC_SIGNATURE_SIZE)*ast->next_cursor; |
| 1105 | gpu_addr >>= 3; |
| 1106 | ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc8, gpu_addr & 0xff); |
| 1107 | ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc9, (gpu_addr >> 8) & 0xff); |
| 1108 | ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xca, (gpu_addr >> 16) & 0xff); |
| 1109 | } |
| 1110 | ast_crtc->cursor_width = width; |
| 1111 | ast_crtc->cursor_height = height; |
| 1112 | ast_crtc->offset_x = AST_MAX_HWC_WIDTH - width; |
| 1113 | ast_crtc->offset_y = AST_MAX_HWC_WIDTH - height; |
| 1114 | |
| 1115 | ast->next_cursor = (ast->next_cursor + 1) % AST_DEFAULT_HWC_NUM; |
| 1116 | |
| 1117 | ast_show_cursor(crtc); |
| 1118 | |
| 1119 | drm_gem_object_unreference_unlocked(obj); |
| 1120 | return 0; |
| 1121 | fail: |
| 1122 | drm_gem_object_unreference_unlocked(obj); |
| 1123 | return ret; |
| 1124 | } |
| 1125 | |
| 1126 | static int ast_cursor_move(struct drm_crtc *crtc, |
| 1127 | int x, int y) |
| 1128 | { |
| 1129 | struct ast_crtc *ast_crtc = to_ast_crtc(crtc); |
| 1130 | struct ast_private *ast = crtc->dev->dev_private; |
| 1131 | int x_offset, y_offset; |
| 1132 | u8 *sig; |
| 1133 | |
| 1134 | sig = (u8 *)ast->cache_kmap.virtual + (AST_HWC_SIZE + AST_HWC_SIGNATURE_SIZE)*ast->next_cursor + AST_HWC_SIZE; |
| 1135 | writel(x, sig + AST_HWC_SIGNATURE_X); |
| 1136 | writel(y, sig + AST_HWC_SIGNATURE_Y); |
| 1137 | |
| 1138 | x_offset = ast_crtc->offset_x; |
| 1139 | y_offset = ast_crtc->offset_y; |
| 1140 | if (x < 0) { |
| 1141 | x_offset = (-x) + ast_crtc->offset_x; |
| 1142 | x = 0; |
| 1143 | } |
| 1144 | |
| 1145 | if (y < 0) { |
| 1146 | y_offset = (-y) + ast_crtc->offset_y; |
| 1147 | y = 0; |
| 1148 | } |
| 1149 | ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc2, x_offset); |
| 1150 | ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc3, y_offset); |
| 1151 | ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc4, (x & 0xff)); |
| 1152 | ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc5, ((x >> 8) & 0x0f)); |
| 1153 | ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc6, (y & 0xff)); |
| 1154 | ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc7, ((y >> 8) & 0x07)); |
| 1155 | |
| 1156 | /* dummy write to fire HWC */ |
| 1157 | ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xCB, 0xFF, 0x00); |
| 1158 | |
| 1159 | return 0; |
| 1160 | } |