Tony Lindgren | 1dbae81 | 2005-11-10 14:26:51 +0000 | [diff] [blame] | 1 | /* |
| 2 | * linux/arch/arm/mach-omap2/timer-gp.c |
| 3 | * |
| 4 | * OMAP2 GP timer support. |
| 5 | * |
Kevin Hilman | 5a3a388 | 2007-11-12 23:24:02 -0800 | [diff] [blame] | 6 | * Update to use new clocksource/clockevent layers |
| 7 | * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com> |
| 8 | * Copyright (C) 2007 MontaVista Software, Inc. |
| 9 | * |
| 10 | * Original driver: |
Tony Lindgren | 1dbae81 | 2005-11-10 14:26:51 +0000 | [diff] [blame] | 11 | * Copyright (C) 2005 Nokia Corporation |
| 12 | * Author: Paul Mundt <paul.mundt@nokia.com> |
Jan Engelhardt | 96de0e2 | 2007-10-19 23:21:04 +0200 | [diff] [blame] | 13 | * Juha Yrjölä <juha.yrjola@nokia.com> |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 14 | * OMAP Dual-mode timer framework support by Timo Teras |
Tony Lindgren | 1dbae81 | 2005-11-10 14:26:51 +0000 | [diff] [blame] | 15 | * |
| 16 | * Some parts based off of TI's 24xx code: |
| 17 | * |
| 18 | * Copyright (C) 2004 Texas Instruments, Inc. |
| 19 | * |
| 20 | * Roughly modelled after the OMAP1 MPU timer code. |
| 21 | * |
| 22 | * This file is subject to the terms and conditions of the GNU General Public |
| 23 | * License. See the file "COPYING" in the main directory of this archive |
| 24 | * for more details. |
| 25 | */ |
| 26 | #include <linux/init.h> |
| 27 | #include <linux/time.h> |
| 28 | #include <linux/interrupt.h> |
| 29 | #include <linux/err.h> |
Russell King | f8ce254 | 2006-01-07 16:15:52 +0000 | [diff] [blame] | 30 | #include <linux/clk.h> |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 31 | #include <linux/delay.h> |
Dirk Behme | e668729 | 2006-12-06 17:14:00 -0800 | [diff] [blame] | 32 | #include <linux/irq.h> |
Kevin Hilman | 5a3a388 | 2007-11-12 23:24:02 -0800 | [diff] [blame] | 33 | #include <linux/clocksource.h> |
| 34 | #include <linux/clockchips.h> |
Russell King | f8ce254 | 2006-01-07 16:15:52 +0000 | [diff] [blame] | 35 | |
Tony Lindgren | 1dbae81 | 2005-11-10 14:26:51 +0000 | [diff] [blame] | 36 | #include <asm/mach/time.h> |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 37 | #include <asm/arch/dmtimer.h> |
Tony Lindgren | 1dbae81 | 2005-11-10 14:26:51 +0000 | [diff] [blame] | 38 | |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 39 | static struct omap_dm_timer *gptimer; |
Kevin Hilman | 5a3a388 | 2007-11-12 23:24:02 -0800 | [diff] [blame] | 40 | static struct clock_event_device clockevent_gpt; |
Tony Lindgren | 1dbae81 | 2005-11-10 14:26:51 +0000 | [diff] [blame] | 41 | |
Linus Torvalds | 0cd61b6 | 2006-10-06 10:53:39 -0700 | [diff] [blame] | 42 | static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id) |
Tony Lindgren | 1dbae81 | 2005-11-10 14:26:51 +0000 | [diff] [blame] | 43 | { |
Kevin Hilman | 5a3a388 | 2007-11-12 23:24:02 -0800 | [diff] [blame] | 44 | struct omap_dm_timer *gpt = (struct omap_dm_timer *)dev_id; |
| 45 | struct clock_event_device *evt = &clockevent_gpt; |
Tony Lindgren | 1dbae81 | 2005-11-10 14:26:51 +0000 | [diff] [blame] | 46 | |
Kevin Hilman | 5a3a388 | 2007-11-12 23:24:02 -0800 | [diff] [blame] | 47 | omap_dm_timer_write_status(gpt, OMAP_TIMER_INT_OVERFLOW); |
| 48 | |
| 49 | evt->event_handler(evt); |
Tony Lindgren | 1dbae81 | 2005-11-10 14:26:51 +0000 | [diff] [blame] | 50 | return IRQ_HANDLED; |
| 51 | } |
| 52 | |
| 53 | static struct irqaction omap2_gp_timer_irq = { |
| 54 | .name = "gp timer", |
Bernhard Walle | b30faba | 2007-05-08 00:35:39 -0700 | [diff] [blame] | 55 | .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, |
Tony Lindgren | 1dbae81 | 2005-11-10 14:26:51 +0000 | [diff] [blame] | 56 | .handler = omap2_gp_timer_interrupt, |
| 57 | }; |
| 58 | |
Kevin Hilman | 5a3a388 | 2007-11-12 23:24:02 -0800 | [diff] [blame] | 59 | static int omap2_gp_timer_set_next_event(unsigned long cycles, |
| 60 | struct clock_event_device *evt) |
Tony Lindgren | 1dbae81 | 2005-11-10 14:26:51 +0000 | [diff] [blame] | 61 | { |
Kevin Hilman | 5a3a388 | 2007-11-12 23:24:02 -0800 | [diff] [blame] | 62 | omap_dm_timer_set_load(gptimer, 0, 0xffffffff - cycles); |
| 63 | omap_dm_timer_start(gptimer); |
Tony Lindgren | 1dbae81 | 2005-11-10 14:26:51 +0000 | [diff] [blame] | 64 | |
Kevin Hilman | 5a3a388 | 2007-11-12 23:24:02 -0800 | [diff] [blame] | 65 | return 0; |
| 66 | } |
| 67 | |
| 68 | static void omap2_gp_timer_set_mode(enum clock_event_mode mode, |
| 69 | struct clock_event_device *evt) |
| 70 | { |
| 71 | u32 period; |
| 72 | |
| 73 | omap_dm_timer_stop(gptimer); |
| 74 | |
| 75 | switch (mode) { |
| 76 | case CLOCK_EVT_MODE_PERIODIC: |
| 77 | period = clk_get_rate(omap_dm_timer_get_fclk(gptimer)) / HZ; |
| 78 | period -= 1; |
| 79 | |
| 80 | omap_dm_timer_set_load(gptimer, 1, 0xffffffff - period); |
| 81 | omap_dm_timer_start(gptimer); |
| 82 | break; |
| 83 | case CLOCK_EVT_MODE_ONESHOT: |
| 84 | break; |
| 85 | case CLOCK_EVT_MODE_UNUSED: |
| 86 | case CLOCK_EVT_MODE_SHUTDOWN: |
| 87 | case CLOCK_EVT_MODE_RESUME: |
| 88 | break; |
| 89 | } |
| 90 | } |
| 91 | |
| 92 | static struct clock_event_device clockevent_gpt = { |
| 93 | .name = "gp timer", |
| 94 | .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, |
| 95 | .shift = 32, |
| 96 | .set_next_event = omap2_gp_timer_set_next_event, |
| 97 | .set_mode = omap2_gp_timer_set_mode, |
| 98 | }; |
| 99 | |
| 100 | static void __init omap2_gp_clockevent_init(void) |
| 101 | { |
| 102 | u32 tick_rate; |
| 103 | |
Timo Teras | e32f7ec | 2006-06-26 16:16:13 -0700 | [diff] [blame] | 104 | gptimer = omap_dm_timer_request_specific(1); |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 105 | BUG_ON(gptimer == NULL); |
Tony Lindgren | 1dbae81 | 2005-11-10 14:26:51 +0000 | [diff] [blame] | 106 | |
Kevin Hilman | 5a3a388 | 2007-11-12 23:24:02 -0800 | [diff] [blame] | 107 | #if defined(CONFIG_OMAP_32K_TIMER) |
| 108 | omap_dm_timer_set_source(gptimer, OMAP_TIMER_SRC_32_KHZ); |
| 109 | #else |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 110 | omap_dm_timer_set_source(gptimer, OMAP_TIMER_SRC_SYS_CLK); |
Kevin Hilman | 5a3a388 | 2007-11-12 23:24:02 -0800 | [diff] [blame] | 111 | #endif |
| 112 | tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gptimer)); |
Tony Lindgren | 1dbae81 | 2005-11-10 14:26:51 +0000 | [diff] [blame] | 113 | |
Kevin Hilman | 5a3a388 | 2007-11-12 23:24:02 -0800 | [diff] [blame] | 114 | omap2_gp_timer_irq.dev_id = (void *)gptimer; |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 115 | setup_irq(omap_dm_timer_get_irq(gptimer), &omap2_gp_timer_irq); |
Kevin Hilman | 5a3a388 | 2007-11-12 23:24:02 -0800 | [diff] [blame] | 116 | omap_dm_timer_set_int_enable(gptimer, OMAP_TIMER_INT_OVERFLOW); |
| 117 | |
| 118 | clockevent_gpt.mult = div_sc(tick_rate, NSEC_PER_SEC, |
| 119 | clockevent_gpt.shift); |
| 120 | clockevent_gpt.max_delta_ns = |
| 121 | clockevent_delta2ns(0xffffffff, &clockevent_gpt); |
| 122 | clockevent_gpt.min_delta_ns = |
| 123 | clockevent_delta2ns(1, &clockevent_gpt); |
| 124 | |
| 125 | clockevent_gpt.cpumask = cpumask_of_cpu(0); |
| 126 | clockevents_register_device(&clockevent_gpt); |
| 127 | } |
| 128 | |
| 129 | #ifdef CONFIG_OMAP_32K_TIMER |
| 130 | /* |
| 131 | * When 32k-timer is enabled, don't use GPTimer for clocksource |
| 132 | * instead, just leave default clocksource which uses the 32k |
| 133 | * sync counter. See clocksource setup in see plat-omap/common.c. |
| 134 | */ |
| 135 | |
| 136 | static inline void __init omap2_gp_clocksource_init(void) {} |
| 137 | #else |
| 138 | /* |
| 139 | * clocksource |
| 140 | */ |
| 141 | static struct omap_dm_timer *gpt_clocksource; |
| 142 | static cycle_t clocksource_read_cycles(void) |
| 143 | { |
| 144 | return (cycle_t)omap_dm_timer_read_counter(gpt_clocksource); |
| 145 | } |
| 146 | |
| 147 | static struct clocksource clocksource_gpt = { |
| 148 | .name = "gp timer", |
| 149 | .rating = 300, |
| 150 | .read = clocksource_read_cycles, |
| 151 | .mask = CLOCKSOURCE_MASK(32), |
| 152 | .shift = 24, |
| 153 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
| 154 | }; |
| 155 | |
| 156 | /* Setup free-running counter for clocksource */ |
| 157 | static void __init omap2_gp_clocksource_init(void) |
| 158 | { |
| 159 | static struct omap_dm_timer *gpt; |
| 160 | u32 tick_rate, tick_period; |
| 161 | static char err1[] __initdata = KERN_ERR |
| 162 | "%s: failed to request dm-timer\n"; |
| 163 | static char err2[] __initdata = KERN_ERR |
| 164 | "%s: can't register clocksource!\n"; |
| 165 | |
| 166 | gpt = omap_dm_timer_request(); |
| 167 | if (!gpt) |
| 168 | printk(err1, clocksource_gpt.name); |
| 169 | gpt_clocksource = gpt; |
| 170 | |
| 171 | omap_dm_timer_set_source(gpt, OMAP_TIMER_SRC_SYS_CLK); |
| 172 | tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gpt)); |
| 173 | tick_period = (tick_rate / HZ) - 1; |
| 174 | |
| 175 | omap_dm_timer_set_load(gpt, 1, 0); |
| 176 | omap_dm_timer_start(gpt); |
| 177 | |
| 178 | clocksource_gpt.mult = |
| 179 | clocksource_khz2mult(tick_rate/1000, clocksource_gpt.shift); |
| 180 | if (clocksource_register(&clocksource_gpt)) |
| 181 | printk(err2, clocksource_gpt.name); |
| 182 | } |
| 183 | #endif |
| 184 | |
| 185 | static void __init omap2_gp_timer_init(void) |
| 186 | { |
| 187 | omap_dm_timer_init(); |
| 188 | |
| 189 | omap2_gp_clockevent_init(); |
| 190 | omap2_gp_clocksource_init(); |
Tony Lindgren | 1dbae81 | 2005-11-10 14:26:51 +0000 | [diff] [blame] | 191 | } |
| 192 | |
| 193 | struct sys_timer omap_timer = { |
| 194 | .init = omap2_gp_timer_init, |
| 195 | }; |