Documentation/devicetree/bindings/arm/lpc32xx-mic.txt

* NXP LPC32xx Main Interrupt Controller
  (MIC, including SIC1 and SIC2 secondary controllers)

Required properties:
- compatible: Should be "nxp,lpc3220-mic"
- interrupt-controller: Identifies the node as an interrupt controller.
- interrupt-parent: Empty for the interrupt controller itself
- #interrupt-cells: The number of cells to define the interrupts. Should be 2.
  The first cell is the IRQ number
  The second cell is used to specify mode:
      1 = low-to-high edge triggered
      2 = high-to-low edge triggered
      4 = active high level-sensitive
      8 = active low level-sensitive
      Default for internal sources should be set to 4 (active high).
- reg: Should contain MIC registers location and length

Examples:
	/*
	 * MIC
	 */
	mic: interrupt-controller@40008000 {
		compatible = "nxp,lpc3220-mic";
		interrupt-controller;
		interrupt-parent;
		#interrupt-cells = <2>;
		reg = <0x40008000 0xC000>;
	};

	/*
	 * ADC
	 */
	adc@40048000 {
		compatible = "nxp,lpc3220-adc";
		reg = <0x40048000 0x1000>;
		interrupt-parent = <&mic>;
		interrupts = <39 4>;
	};