| * Freescale General-Purpose Media Interface (GPMI) |
| |
| The GPMI nand controller provides an interface to control the |
| NAND flash chips. We support only one NAND chip now. |
| |
| Required properties: |
| - compatible : should be "fsl,<chip>-gpmi-nand" |
| - reg : should contain registers location and length for gpmi and bch. |
| - reg-names: Should contain the reg names "gpmi-nand" and "bch" |
| - interrupts : BCH interrupt number. |
| - interrupt-names : Should be "bch". |
| - dmas: DMA specifier, consisting of a phandle to DMA controller node |
| and GPMI DMA channel ID. |
| Refer to dma.txt and fsl-mxs-dma.txt for details. |
| - dma-names: Must be "rx-tx". |
| |
| Optional properties: |
| - nand-on-flash-bbt: boolean to enable on flash bbt option if not |
| present false |
| - fsl,use-minimum-ecc: Protect this NAND flash with the minimum ECC |
| strength required. The required ECC strength is |
| automatically discoverable for some flash |
| (e.g., according to the ONFI standard). |
| However, note that if this strength is not |
| discoverable or this property is not enabled, |
| the software may chooses an implementation-defined |
| ECC scheme. |
| |
| The device tree may optionally contain sub-nodes describing partitions of the |
| address space. See partition.txt for more detail. |
| |
| Examples: |
| |
| gpmi-nand@8000c000 { |
| compatible = "fsl,imx28-gpmi-nand"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| reg = <0x8000c000 2000>, <0x8000a000 2000>; |
| reg-names = "gpmi-nand", "bch"; |
| interrupts = <41>; |
| interrupt-names = "bch"; |
| dmas = <&dma_apbh 4>; |
| dma-names = "rx-tx"; |
| |
| partition@0 { |
| ... |
| }; |
| }; |
