| /* |
| * File: arch/blackfin/mach-bf533/boards/cm_bf561.c |
| * Based on: arch/blackfin/mach-bf533/boards/ezkit.c |
| * Author: Aidan Williams <aidan@nicta.com.au> Copyright 2005 |
| * |
| * Created: 2006 |
| * Description: Board description file |
| * |
| * Modified: |
| * Copyright 2004-2006 Analog Devices Inc. |
| * |
| * Bugs: Enter bugs at http://blackfin.uclinux.org/ |
| * |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License as published by |
| * the Free Software Foundation; either version 2 of the License, or |
| * (at your option) any later version. |
| * |
| * This program is distributed in the hope that it will be useful, |
| * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| * GNU General Public License for more details. |
| * |
| * You should have received a copy of the GNU General Public License |
| * along with this program; if not, see the file COPYING, or write |
| * to the Free Software Foundation, Inc., |
| * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| */ |
| |
| #include <linux/device.h> |
| #include <linux/platform_device.h> |
| #include <linux/mtd/mtd.h> |
| #include <linux/mtd/partitions.h> |
| #include <linux/spi/spi.h> |
| #include <linux/spi/flash.h> |
| #include <linux/usb/isp1362.h> |
| #include <linux/pata_platform.h> |
| #include <linux/irq.h> |
| #include <asm/dma.h> |
| #include <asm/bfin5xx_spi.h> |
| #include <asm/portmux.h> |
| |
| /* |
| * Name the Board for the /proc/cpuinfo |
| */ |
| const char bfin_board_name[] = "Bluetechnix CM BF561"; |
| |
| #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) |
| /* all SPI peripherals info goes here */ |
| |
| #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) |
| static struct mtd_partition bfin_spi_flash_partitions[] = { |
| { |
| .name = "bootloader", |
| .size = 0x00020000, |
| .offset = 0, |
| .mask_flags = MTD_CAP_ROM |
| }, { |
| .name = "kernel", |
| .size = 0xe0000, |
| .offset = 0x20000 |
| }, { |
| .name = "file system", |
| .size = 0x700000, |
| .offset = 0x00100000, |
| } |
| }; |
| |
| static struct flash_platform_data bfin_spi_flash_data = { |
| .name = "m25p80", |
| .parts = bfin_spi_flash_partitions, |
| .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions), |
| .type = "m25p64", |
| }; |
| |
| /* SPI flash chip (m25p64) */ |
| static struct bfin5xx_spi_chip spi_flash_chip_info = { |
| .enable_dma = 0, /* use dma transfer with this chip*/ |
| .bits_per_word = 8, |
| }; |
| #endif |
| |
| #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE) |
| /* SPI ADC chip */ |
| static struct bfin5xx_spi_chip spi_adc_chip_info = { |
| .enable_dma = 1, /* use dma transfer with this chip*/ |
| .bits_per_word = 16, |
| }; |
| #endif |
| |
| #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) |
| static struct bfin5xx_spi_chip ad1836_spi_chip_info = { |
| .enable_dma = 0, |
| .bits_per_word = 16, |
| }; |
| #endif |
| |
| #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE) |
| static struct bfin5xx_spi_chip ad9960_spi_chip_info = { |
| .enable_dma = 0, |
| .bits_per_word = 16, |
| }; |
| #endif |
| |
| #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) |
| static struct bfin5xx_spi_chip spi_mmc_chip_info = { |
| .enable_dma = 1, |
| .bits_per_word = 8, |
| }; |
| #endif |
| |
| static struct spi_board_info bfin_spi_board_info[] __initdata = { |
| #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) |
| { |
| /* the modalias must be the same as spi device driver name */ |
| .modalias = "m25p80", /* Name of spi_driver for this device */ |
| .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ |
| .bus_num = 0, /* Framework bus number */ |
| .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/ |
| .platform_data = &bfin_spi_flash_data, |
| .controller_data = &spi_flash_chip_info, |
| .mode = SPI_MODE_3, |
| }, |
| #endif |
| |
| #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE) |
| { |
| .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ |
| .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ |
| .bus_num = 0, /* Framework bus number */ |
| .chip_select = 1, /* Framework chip select. */ |
| .platform_data = NULL, /* No spi_driver specific config */ |
| .controller_data = &spi_adc_chip_info, |
| }, |
| #endif |
| |
| #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) |
| { |
| .modalias = "ad1836-spi", |
| .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ |
| .bus_num = 0, |
| .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT, |
| .controller_data = &ad1836_spi_chip_info, |
| }, |
| #endif |
| #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE) |
| { |
| .modalias = "ad9960-spi", |
| .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */ |
| .bus_num = 0, |
| .chip_select = 1, |
| .controller_data = &ad9960_spi_chip_info, |
| }, |
| #endif |
| #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) |
| { |
| .modalias = "spi_mmc", |
| .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ |
| .bus_num = 0, |
| .chip_select = CONFIG_SPI_MMC_CS_CHAN, |
| .platform_data = NULL, |
| .controller_data = &spi_mmc_chip_info, |
| .mode = SPI_MODE_3, |
| }, |
| #endif |
| }; |
| |
| /* SPI (0) */ |
| static struct resource bfin_spi0_resource[] = { |
| [0] = { |
| .start = SPI0_REGBASE, |
| .end = SPI0_REGBASE + 0xFF, |
| .flags = IORESOURCE_MEM, |
| }, |
| [1] = { |
| .start = CH_SPI, |
| .end = CH_SPI, |
| .flags = IORESOURCE_IRQ, |
| } |
| }; |
| |
| /* SPI controller data */ |
| static struct bfin5xx_spi_master bfin_spi0_info = { |
| .num_chipselect = 8, |
| .enable_dma = 1, /* master has the ability to do dma transfer */ |
| .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0}, |
| }; |
| |
| static struct platform_device bfin_spi0_device = { |
| .name = "bfin-spi", |
| .id = 0, /* Bus number */ |
| .num_resources = ARRAY_SIZE(bfin_spi0_resource), |
| .resource = bfin_spi0_resource, |
| .dev = { |
| .platform_data = &bfin_spi0_info, /* Passed to driver */ |
| }, |
| }; |
| #endif /* spi master and devices */ |
| |
| |
| #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) |
| |
| static struct resource smc91x_resources[] = { |
| { |
| .name = "smc91x-regs", |
| .start = 0x28000300, |
| .end = 0x28000300 + 16, |
| .flags = IORESOURCE_MEM, |
| }, { |
| .start = IRQ_PF0, |
| .end = IRQ_PF0, |
| .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, |
| }, |
| }; |
| static struct platform_device smc91x_device = { |
| .name = "smc91x", |
| .id = 0, |
| .num_resources = ARRAY_SIZE(smc91x_resources), |
| .resource = smc91x_resources, |
| }; |
| #endif |
| |
| #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) |
| static struct resource isp1362_hcd_resources[] = { |
| { |
| .start = 0x24008000, |
| .end = 0x24008000, |
| .flags = IORESOURCE_MEM, |
| }, { |
| .start = 0x24008004, |
| .end = 0x24008004, |
| .flags = IORESOURCE_MEM, |
| }, { |
| .start = IRQ_PF47, |
| .end = IRQ_PF47, |
| .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, |
| }, |
| }; |
| |
| static struct isp1362_platform_data isp1362_priv = { |
| .sel15Kres = 1, |
| .clknotstop = 0, |
| .oc_enable = 0, |
| .int_act_high = 0, |
| .int_edge_triggered = 0, |
| .remote_wakeup_connected = 0, |
| .no_power_switching = 1, |
| .power_switching_mode = 0, |
| }; |
| |
| static struct platform_device isp1362_hcd_device = { |
| .name = "isp1362-hcd", |
| .id = 0, |
| .dev = { |
| .platform_data = &isp1362_priv, |
| }, |
| .num_resources = ARRAY_SIZE(isp1362_hcd_resources), |
| .resource = isp1362_hcd_resources, |
| }; |
| #endif |
| |
| #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) |
| static struct resource bfin_uart_resources[] = { |
| { |
| .start = 0xFFC00400, |
| .end = 0xFFC004FF, |
| .flags = IORESOURCE_MEM, |
| }, |
| }; |
| |
| static struct platform_device bfin_uart_device = { |
| .name = "bfin-uart", |
| .id = 1, |
| .num_resources = ARRAY_SIZE(bfin_uart_resources), |
| .resource = bfin_uart_resources, |
| }; |
| #endif |
| |
| #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) |
| #define PATA_INT 119 |
| |
| static struct pata_platform_info bfin_pata_platform_data = { |
| .ioport_shift = 2, |
| .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED, |
| }; |
| |
| static struct resource bfin_pata_resources[] = { |
| { |
| .start = 0x2400C000, |
| .end = 0x2400C001F, |
| .flags = IORESOURCE_MEM, |
| }, |
| { |
| .start = 0x2400D018, |
| .end = 0x2400D01B, |
| .flags = IORESOURCE_MEM, |
| }, |
| { |
| .start = PATA_INT, |
| .end = PATA_INT, |
| .flags = IORESOURCE_IRQ, |
| }, |
| }; |
| |
| static struct platform_device bfin_pata_device = { |
| .name = "pata_platform", |
| .id = -1, |
| .num_resources = ARRAY_SIZE(bfin_pata_resources), |
| .resource = bfin_pata_resources, |
| .dev = { |
| .platform_data = &bfin_pata_platform_data, |
| } |
| }; |
| #endif |
| |
| static struct platform_device *cm_bf561_devices[] __initdata = { |
| |
| #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) |
| &bfin_uart_device, |
| #endif |
| |
| #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) |
| &isp1362_hcd_device, |
| #endif |
| |
| #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) |
| &smc91x_device, |
| #endif |
| |
| #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) |
| &bfin_spi0_device, |
| #endif |
| |
| #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) |
| &bfin_pata_device, |
| #endif |
| }; |
| |
| static int __init cm_bf561_init(void) |
| { |
| printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__); |
| platform_add_devices(cm_bf561_devices, ARRAY_SIZE(cm_bf561_devices)); |
| #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) |
| spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info)); |
| #endif |
| |
| #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) |
| irq_desc[PATA_INT].status |= IRQ_NOAUTOEN; |
| #endif |
| return 0; |
| } |
| |
| arch_initcall(cm_bf561_init); |