| /* |
| * at91sam9260.dtsi - Device Tree Include file for AT91SAM9260 family SoC |
| * |
| * Copyright (C) 2011 Atmel, |
| * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>, |
| * 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
| * |
| * Licensed under GPLv2 or later. |
| */ |
| |
| /include/ "skeleton.dtsi" |
| |
| / { |
| model = "Atmel AT91SAM9260 family SoC"; |
| compatible = "atmel,at91sam9260"; |
| interrupt-parent = <&aic>; |
| |
| aliases { |
| serial0 = &dbgu; |
| serial1 = &usart0; |
| serial2 = &usart1; |
| serial3 = &usart2; |
| serial4 = &usart3; |
| serial5 = &uart0; |
| serial6 = &uart1; |
| gpio0 = &pioA; |
| gpio1 = &pioB; |
| gpio2 = &pioC; |
| tcb0 = &tcb0; |
| tcb1 = &tcb1; |
| i2c0 = &i2c0; |
| ssc0 = &ssc0; |
| }; |
| cpus { |
| cpu@0 { |
| compatible = "arm,arm926ejs"; |
| }; |
| }; |
| |
| memory { |
| reg = <0x20000000 0x04000000>; |
| }; |
| |
| ahb { |
| compatible = "simple-bus"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| ranges; |
| |
| apb { |
| compatible = "simple-bus"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| ranges; |
| |
| aic: interrupt-controller@fffff000 { |
| #interrupt-cells = <3>; |
| compatible = "atmel,at91rm9200-aic"; |
| interrupt-controller; |
| reg = <0xfffff000 0x200>; |
| atmel,external-irqs = <29 30 31>; |
| }; |
| |
| ramc0: ramc@ffffea00 { |
| compatible = "atmel,at91sam9260-sdramc"; |
| reg = <0xffffea00 0x200>; |
| }; |
| |
| pmc: pmc@fffffc00 { |
| compatible = "atmel,at91rm9200-pmc"; |
| reg = <0xfffffc00 0x100>; |
| }; |
| |
| rstc@fffffd00 { |
| compatible = "atmel,at91sam9260-rstc"; |
| reg = <0xfffffd00 0x10>; |
| }; |
| |
| shdwc@fffffd10 { |
| compatible = "atmel,at91sam9260-shdwc"; |
| reg = <0xfffffd10 0x10>; |
| }; |
| |
| pit: timer@fffffd30 { |
| compatible = "atmel,at91sam9260-pit"; |
| reg = <0xfffffd30 0xf>; |
| interrupts = <1 4 7>; |
| }; |
| |
| tcb0: timer@fffa0000 { |
| compatible = "atmel,at91rm9200-tcb"; |
| reg = <0xfffa0000 0x100>; |
| interrupts = <17 4 0 18 4 0 19 4 0>; |
| }; |
| |
| tcb1: timer@fffdc000 { |
| compatible = "atmel,at91rm9200-tcb"; |
| reg = <0xfffdc000 0x100>; |
| interrupts = <26 4 0 27 4 0 28 4 0>; |
| }; |
| |
| pinctrl@fffff400 { |
| #address-cells = <1>; |
| #size-cells = <1>; |
| compatible = "atmel,at91rm9200-pinctrl", "simple-bus"; |
| ranges = <0xfffff400 0xfffff400 0x600>; |
| |
| atmel,mux-mask = < |
| /* A B */ |
| 0xffffffff 0xffc00c3b /* pioA */ |
| 0xffffffff 0x7fff3ccf /* pioB */ |
| 0xffffffff 0x007fffff /* pioC */ |
| >; |
| |
| /* shared pinctrl settings */ |
| dbgu { |
| pinctrl_dbgu: dbgu-0 { |
| atmel,pins = |
| <1 14 0x1 0x0 /* PB14 periph A */ |
| 1 15 0x1 0x1>; /* PB15 periph with pullup */ |
| }; |
| }; |
| |
| usart0 { |
| pinctrl_usart0: usart0-0 { |
| atmel,pins = |
| <1 4 0x1 0x0 /* PB4 periph A */ |
| 1 5 0x1 0x0>; /* PB5 periph A */ |
| }; |
| |
| pinctrl_usart0_rts: usart0_rts-0 { |
| atmel,pins = |
| <1 26 0x1 0x0>; /* PB26 periph A */ |
| }; |
| |
| pinctrl_usart0_cts: usart0_cts-0 { |
| atmel,pins = |
| <1 27 0x1 0x0>; /* PB27 periph A */ |
| }; |
| |
| pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 { |
| atmel,pins = |
| <1 24 0x1 0x0 /* PB24 periph A */ |
| 1 22 0x1 0x0>; /* PB22 periph A */ |
| }; |
| |
| pinctrl_usart0_dcd: usart0_dcd-0 { |
| atmel,pins = |
| <1 23 0x1 0x0>; /* PB23 periph A */ |
| }; |
| |
| pinctrl_usart0_ri: usart0_ri-0 { |
| atmel,pins = |
| <1 25 0x1 0x0>; /* PB25 periph A */ |
| }; |
| }; |
| |
| usart1 { |
| pinctrl_usart1: usart1-0 { |
| atmel,pins = |
| <1 6 0x1 0x1 /* PB6 periph A with pullup */ |
| 1 7 0x1 0x0>; /* PB7 periph A */ |
| }; |
| |
| pinctrl_usart1_rts: usart1_rts-0 { |
| atmel,pins = |
| <1 28 0x1 0x0>; /* PB28 periph A */ |
| }; |
| |
| pinctrl_usart1_cts: usart1_cts-0 { |
| atmel,pins = |
| <1 29 0x1 0x0>; /* PB29 periph A */ |
| }; |
| }; |
| |
| usart2 { |
| pinctrl_usart2: usart2-0 { |
| atmel,pins = |
| <1 8 0x1 0x1 /* PB8 periph A with pullup */ |
| 1 9 0x1 0x0>; /* PB9 periph A */ |
| }; |
| |
| pinctrl_usart2_rts: usart2_rts-0 { |
| atmel,pins = |
| <0 4 0x1 0x0>; /* PA4 periph A */ |
| }; |
| |
| pinctrl_usart2_cts: usart2_cts-0 { |
| atmel,pins = |
| <0 5 0x1 0x0>; /* PA5 periph A */ |
| }; |
| }; |
| |
| usart3 { |
| pinctrl_usart3: usart3-0 { |
| atmel,pins = |
| <1 10 0x1 0x1 /* PB10 periph A with pullup */ |
| 1 11 0x1 0x0>; /* PB11 periph A */ |
| }; |
| |
| pinctrl_usart3_rts: usart3_rts-0 { |
| atmel,pins = |
| <2 8 0x2 0x0>; /* PC8 periph B */ |
| }; |
| |
| pinctrl_usart3_cts: usart3_cts-0 { |
| atmel,pins = |
| <2 10 0x2 0x0>; /* PC10 periph B */ |
| }; |
| }; |
| |
| uart0 { |
| pinctrl_uart0: uart0-0 { |
| atmel,pins = |
| <0 31 0x2 0x1 /* PA31 periph B with pullup */ |
| 0 30 0x2 0x0>; /* PA30 periph B */ |
| }; |
| }; |
| |
| uart1 { |
| pinctrl_uart1: uart1-0 { |
| atmel,pins = |
| <1 12 0x1 0x1 /* PB12 periph A with pullup */ |
| 1 13 0x1 0x0>; /* PB13 periph A */ |
| }; |
| }; |
| |
| nand { |
| pinctrl_nand: nand-0 { |
| atmel,pins = |
| <2 13 0x0 0x1 /* PC13 gpio RDY pin pull_up */ |
| 2 14 0x0 0x1>; /* PC14 gpio enable pin pull_up */ |
| }; |
| }; |
| |
| macb { |
| pinctrl_macb_rmii: macb_rmii-0 { |
| atmel,pins = |
| <0 12 0x1 0x0 /* PA12 periph A */ |
| 0 13 0x1 0x0 /* PA13 periph A */ |
| 0 14 0x1 0x0 /* PA14 periph A */ |
| 0 15 0x1 0x0 /* PA15 periph A */ |
| 0 16 0x1 0x0 /* PA16 periph A */ |
| 0 17 0x1 0x0 /* PA17 periph A */ |
| 0 18 0x1 0x0 /* PA18 periph A */ |
| 0 19 0x1 0x0 /* PA19 periph A */ |
| 0 20 0x1 0x0 /* PA20 periph A */ |
| 0 21 0x1 0x0>; /* PA21 periph A */ |
| }; |
| |
| pinctrl_macb_rmii_mii: macb_rmii_mii-0 { |
| atmel,pins = |
| <0 22 0x2 0x0 /* PA22 periph B */ |
| 0 23 0x2 0x0 /* PA23 periph B */ |
| 0 24 0x2 0x0 /* PA24 periph B */ |
| 0 25 0x2 0x0 /* PA25 periph B */ |
| 0 26 0x2 0x0 /* PA26 periph B */ |
| 0 27 0x2 0x0 /* PA27 periph B */ |
| 0 28 0x2 0x0 /* PA28 periph B */ |
| 0 29 0x2 0x0>; /* PA29 periph B */ |
| }; |
| |
| pinctrl_macb_rmii_mii_alt: macb_rmii_mii-1 { |
| atmel,pins = |
| <0 10 0x2 0x0 /* PA10 periph B */ |
| 0 11 0x2 0x0 /* PA11 periph B */ |
| 0 22 0x2 0x0 /* PA22 periph B */ |
| 0 25 0x2 0x0 /* PA25 periph B */ |
| 0 26 0x2 0x0 /* PA26 periph B */ |
| 0 27 0x2 0x0 /* PA27 periph B */ |
| 0 28 0x2 0x0 /* PA28 periph B */ |
| 0 29 0x2 0x0>; /* PA29 periph B */ |
| }; |
| }; |
| |
| mmc0 { |
| pinctrl_mmc0_clk: mmc0_clk-0 { |
| atmel,pins = |
| <0 8 0x1 0x0>; /* PA8 periph A */ |
| }; |
| |
| pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 { |
| atmel,pins = |
| <0 7 0x1 0x1 /* PA7 periph A with pullup */ |
| 0 6 0x1 0x1>; /* PA6 periph A with pullup */ |
| }; |
| |
| pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { |
| atmel,pins = |
| <0 9 0x1 0x1 /* PA9 periph A with pullup */ |
| 0 10 0x1 0x1 /* PA10 periph A with pullup */ |
| 0 11 0x1 0x1>; /* PA11 periph A with pullup */ |
| }; |
| |
| pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 { |
| atmel,pins = |
| <0 1 0x2 0x1 /* PA1 periph B with pullup */ |
| 0 0 0x2 0x1>; /* PA0 periph B with pullup */ |
| }; |
| |
| pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 { |
| atmel,pins = |
| <0 5 0x2 0x1 /* PA5 periph B with pullup */ |
| 0 4 0x2 0x1 /* PA4 periph B with pullup */ |
| 0 3 0x2 0x1>; /* PA3 periph B with pullup */ |
| }; |
| }; |
| |
| ssc0 { |
| pinctrl_ssc0_tx: ssc0_tx-0 { |
| atmel,pins = |
| <1 16 0x1 0x0 /* PB16 periph A */ |
| 1 17 0x1 0x0 /* PB17 periph A */ |
| 1 18 0x1 0x0>; /* PB18 periph A */ |
| }; |
| |
| pinctrl_ssc0_rx: ssc0_rx-0 { |
| atmel,pins = |
| <1 19 0x1 0x0 /* PB19 periph A */ |
| 1 20 0x1 0x0 /* PB20 periph A */ |
| 1 21 0x1 0x0>; /* PB21 periph A */ |
| }; |
| }; |
| |
| spi0 { |
| pinctrl_spi0: spi0-0 { |
| atmel,pins = |
| <0 0 0x1 0x0 /* PA0 periph A SPI0_MISO pin */ |
| 0 1 0x1 0x0 /* PA1 periph A SPI0_MOSI pin */ |
| 0 2 0x1 0x0>; /* PA2 periph A SPI0_SPCK pin */ |
| }; |
| }; |
| |
| spi1 { |
| pinctrl_spi1: spi1-0 { |
| atmel,pins = |
| <1 0 0x1 0x0 /* PB0 periph A SPI1_MISO pin */ |
| 1 1 0x1 0x0 /* PB1 periph A SPI1_MOSI pin */ |
| 1 2 0x1 0x0>; /* PB2 periph A SPI1_SPCK pin */ |
| }; |
| }; |
| |
| pioA: gpio@fffff400 { |
| compatible = "atmel,at91rm9200-gpio"; |
| reg = <0xfffff400 0x200>; |
| interrupts = <2 4 1>; |
| #gpio-cells = <2>; |
| gpio-controller; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| }; |
| |
| pioB: gpio@fffff600 { |
| compatible = "atmel,at91rm9200-gpio"; |
| reg = <0xfffff600 0x200>; |
| interrupts = <3 4 1>; |
| #gpio-cells = <2>; |
| gpio-controller; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| }; |
| |
| pioC: gpio@fffff800 { |
| compatible = "atmel,at91rm9200-gpio"; |
| reg = <0xfffff800 0x200>; |
| interrupts = <4 4 1>; |
| #gpio-cells = <2>; |
| gpio-controller; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| }; |
| }; |
| |
| dbgu: serial@fffff200 { |
| compatible = "atmel,at91sam9260-usart"; |
| reg = <0xfffff200 0x200>; |
| interrupts = <1 4 7>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_dbgu>; |
| status = "disabled"; |
| }; |
| |
| usart0: serial@fffb0000 { |
| compatible = "atmel,at91sam9260-usart"; |
| reg = <0xfffb0000 0x200>; |
| interrupts = <6 4 5>; |
| atmel,use-dma-rx; |
| atmel,use-dma-tx; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_usart0>; |
| status = "disabled"; |
| }; |
| |
| usart1: serial@fffb4000 { |
| compatible = "atmel,at91sam9260-usart"; |
| reg = <0xfffb4000 0x200>; |
| interrupts = <7 4 5>; |
| atmel,use-dma-rx; |
| atmel,use-dma-tx; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_usart1>; |
| status = "disabled"; |
| }; |
| |
| usart2: serial@fffb8000 { |
| compatible = "atmel,at91sam9260-usart"; |
| reg = <0xfffb8000 0x200>; |
| interrupts = <8 4 5>; |
| atmel,use-dma-rx; |
| atmel,use-dma-tx; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_usart2>; |
| status = "disabled"; |
| }; |
| |
| usart3: serial@fffd0000 { |
| compatible = "atmel,at91sam9260-usart"; |
| reg = <0xfffd0000 0x200>; |
| interrupts = <23 4 5>; |
| atmel,use-dma-rx; |
| atmel,use-dma-tx; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_usart3>; |
| status = "disabled"; |
| }; |
| |
| uart0: serial@fffd4000 { |
| compatible = "atmel,at91sam9260-usart"; |
| reg = <0xfffd4000 0x200>; |
| interrupts = <24 4 5>; |
| atmel,use-dma-rx; |
| atmel,use-dma-tx; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_uart0>; |
| status = "disabled"; |
| }; |
| |
| uart1: serial@fffd8000 { |
| compatible = "atmel,at91sam9260-usart"; |
| reg = <0xfffd8000 0x200>; |
| interrupts = <25 4 5>; |
| atmel,use-dma-rx; |
| atmel,use-dma-tx; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_uart1>; |
| status = "disabled"; |
| }; |
| |
| macb0: ethernet@fffc4000 { |
| compatible = "cdns,at32ap7000-macb", "cdns,macb"; |
| reg = <0xfffc4000 0x100>; |
| interrupts = <21 4 3>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_macb_rmii>; |
| status = "disabled"; |
| }; |
| |
| usb1: gadget@fffa4000 { |
| compatible = "atmel,at91rm9200-udc"; |
| reg = <0xfffa4000 0x4000>; |
| interrupts = <10 4 2>; |
| status = "disabled"; |
| }; |
| |
| i2c0: i2c@fffac000 { |
| compatible = "atmel,at91sam9260-i2c"; |
| reg = <0xfffac000 0x100>; |
| interrupts = <11 4 6>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| status = "disabled"; |
| }; |
| |
| mmc0: mmc@fffa8000 { |
| compatible = "atmel,hsmci"; |
| reg = <0xfffa8000 0x600>; |
| interrupts = <9 4 0>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| status = "disabled"; |
| }; |
| |
| ssc0: ssc@fffbc000 { |
| compatible = "atmel,at91rm9200-ssc"; |
| reg = <0xfffbc000 0x4000>; |
| interrupts = <14 4 5>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; |
| status = "disabled"; |
| }; |
| |
| spi0: spi@fffc8000 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| compatible = "atmel,at91rm9200-spi"; |
| reg = <0xfffc8000 0x200>; |
| interrupts = <12 4 3>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_spi0>; |
| status = "disabled"; |
| }; |
| |
| spi1: spi@fffcc000 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| compatible = "atmel,at91rm9200-spi"; |
| reg = <0xfffcc000 0x200>; |
| interrupts = <13 4 3>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_spi1>; |
| status = "disabled"; |
| }; |
| |
| adc0: adc@fffe0000 { |
| compatible = "atmel,at91sam9260-adc"; |
| reg = <0xfffe0000 0x100>; |
| interrupts = <5 4 0>; |
| atmel,adc-use-external-triggers; |
| atmel,adc-channels-used = <0xf>; |
| atmel,adc-vref = <3300>; |
| atmel,adc-num-channels = <4>; |
| atmel,adc-startup-time = <15>; |
| atmel,adc-channel-base = <0x30>; |
| atmel,adc-drdy-mask = <0x10000>; |
| atmel,adc-status-register = <0x1c>; |
| atmel,adc-trigger-register = <0x04>; |
| atmel,adc-res = <8 10>; |
| atmel,adc-res-names = "lowres", "highres"; |
| atmel,adc-use-res = "highres"; |
| |
| trigger@0 { |
| trigger-name = "timer-counter-0"; |
| trigger-value = <0x1>; |
| }; |
| trigger@1 { |
| trigger-name = "timer-counter-1"; |
| trigger-value = <0x3>; |
| }; |
| |
| trigger@2 { |
| trigger-name = "timer-counter-2"; |
| trigger-value = <0x5>; |
| }; |
| |
| trigger@3 { |
| trigger-name = "external"; |
| trigger-value = <0x13>; |
| trigger-external; |
| }; |
| }; |
| |
| watchdog@fffffd40 { |
| compatible = "atmel,at91sam9260-wdt"; |
| reg = <0xfffffd40 0x10>; |
| status = "disabled"; |
| }; |
| }; |
| |
| nand0: nand@40000000 { |
| compatible = "atmel,at91rm9200-nand"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| reg = <0x40000000 0x10000000 |
| 0xffffe800 0x200 |
| >; |
| atmel,nand-addr-offset = <21>; |
| atmel,nand-cmd-offset = <22>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_nand>; |
| gpios = <&pioC 13 0 |
| &pioC 14 0 |
| 0 |
| >; |
| status = "disabled"; |
| }; |
| |
| usb0: ohci@00500000 { |
| compatible = "atmel,at91rm9200-ohci", "usb-ohci"; |
| reg = <0x00500000 0x100000>; |
| interrupts = <20 4 2>; |
| status = "disabled"; |
| }; |
| }; |
| |
| i2c@0 { |
| compatible = "i2c-gpio"; |
| gpios = <&pioA 23 0 /* sda */ |
| &pioA 24 0 /* scl */ |
| >; |
| i2c-gpio,sda-open-drain; |
| i2c-gpio,scl-open-drain; |
| i2c-gpio,delay-us = <2>; /* ~100 kHz */ |
| #address-cells = <1>; |
| #size-cells = <0>; |
| status = "disabled"; |
| }; |
| }; |
