| /* |
| * Samsung's Exynos4210 SoC device tree source |
| * |
| * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. |
| * http://www.samsung.com |
| * Copyright (c) 2010-2011 Linaro Ltd. |
| * www.linaro.org |
| * |
| * Samsung's Exynos4210 SoC device nodes are listed in this file. Exynos4210 |
| * based board files can include this file and provide values for board specfic |
| * bindings. |
| * |
| * Note: This file does not include device nodes for all the controllers in |
| * Exynos4210 SoC. As device tree coverage for Exynos4210 increases, additional |
| * nodes can be added to this file. |
| * |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License version 2 as |
| * published by the Free Software Foundation. |
| */ |
| |
| /include/ "exynos4.dtsi" |
| /include/ "exynos4210-pinctrl.dtsi" |
| |
| / { |
| compatible = "samsung,exynos4210"; |
| |
| aliases { |
| pinctrl0 = &pinctrl_0; |
| pinctrl1 = &pinctrl_1; |
| pinctrl2 = &pinctrl_2; |
| }; |
| |
| gic:interrupt-controller@10490000 { |
| cpu-offset = <0x8000>; |
| }; |
| |
| combiner:interrupt-controller@10440000 { |
| interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>, |
| <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>, |
| <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>, |
| <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>; |
| }; |
| |
| pinctrl_0: pinctrl@11400000 { |
| compatible = "samsung,pinctrl-exynos4210"; |
| reg = <0x11400000 0x1000>; |
| interrupts = <0 47 0>; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| }; |
| |
| pinctrl_1: pinctrl@11000000 { |
| compatible = "samsung,pinctrl-exynos4210"; |
| reg = <0x11000000 0x1000>; |
| interrupts = <0 46 0>; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| |
| wakup_eint: wakeup-interrupt-controller { |
| compatible = "samsung,exynos4210-wakeup-eint"; |
| interrupt-parent = <&gic>; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| interrupts = <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>, |
| <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>, |
| <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>, |
| <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>, |
| <0 32 0>; |
| }; |
| }; |
| |
| pinctrl_2: pinctrl@03860000 { |
| compatible = "samsung,pinctrl-exynos4210"; |
| reg = <0x03860000 0x1000>; |
| }; |
| |
| gpio-controllers { |
| #address-cells = <1>; |
| #size-cells = <1>; |
| gpio-controller; |
| ranges; |
| |
| gpa0: gpio-controller@11400000 { |
| compatible = "samsung,exynos4-gpio"; |
| reg = <0x11400000 0x20>; |
| #gpio-cells = <4>; |
| }; |
| |
| gpa1: gpio-controller@11400020 { |
| compatible = "samsung,exynos4-gpio"; |
| reg = <0x11400020 0x20>; |
| #gpio-cells = <4>; |
| }; |
| |
| gpb: gpio-controller@11400040 { |
| compatible = "samsung,exynos4-gpio"; |
| reg = <0x11400040 0x20>; |
| #gpio-cells = <4>; |
| }; |
| |
| gpc0: gpio-controller@11400060 { |
| compatible = "samsung,exynos4-gpio"; |
| reg = <0x11400060 0x20>; |
| #gpio-cells = <4>; |
| }; |
| |
| gpc1: gpio-controller@11400080 { |
| compatible = "samsung,exynos4-gpio"; |
| reg = <0x11400080 0x20>; |
| #gpio-cells = <4>; |
| }; |
| |
| gpd0: gpio-controller@114000A0 { |
| compatible = "samsung,exynos4-gpio"; |
| reg = <0x114000A0 0x20>; |
| #gpio-cells = <4>; |
| }; |
| |
| gpd1: gpio-controller@114000C0 { |
| compatible = "samsung,exynos4-gpio"; |
| reg = <0x114000C0 0x20>; |
| #gpio-cells = <4>; |
| }; |
| |
| gpe0: gpio-controller@114000E0 { |
| compatible = "samsung,exynos4-gpio"; |
| reg = <0x114000E0 0x20>; |
| #gpio-cells = <4>; |
| }; |
| |
| gpe1: gpio-controller@11400100 { |
| compatible = "samsung,exynos4-gpio"; |
| reg = <0x11400100 0x20>; |
| #gpio-cells = <4>; |
| }; |
| |
| gpe2: gpio-controller@11400120 { |
| compatible = "samsung,exynos4-gpio"; |
| reg = <0x11400120 0x20>; |
| #gpio-cells = <4>; |
| }; |
| |
| gpe3: gpio-controller@11400140 { |
| compatible = "samsung,exynos4-gpio"; |
| reg = <0x11400140 0x20>; |
| #gpio-cells = <4>; |
| }; |
| |
| gpe4: gpio-controller@11400160 { |
| compatible = "samsung,exynos4-gpio"; |
| reg = <0x11400160 0x20>; |
| #gpio-cells = <4>; |
| }; |
| |
| gpf0: gpio-controller@11400180 { |
| compatible = "samsung,exynos4-gpio"; |
| reg = <0x11400180 0x20>; |
| #gpio-cells = <4>; |
| }; |
| |
| gpf1: gpio-controller@114001A0 { |
| compatible = "samsung,exynos4-gpio"; |
| reg = <0x114001A0 0x20>; |
| #gpio-cells = <4>; |
| }; |
| |
| gpf2: gpio-controller@114001C0 { |
| compatible = "samsung,exynos4-gpio"; |
| reg = <0x114001C0 0x20>; |
| #gpio-cells = <4>; |
| }; |
| |
| gpf3: gpio-controller@114001E0 { |
| compatible = "samsung,exynos4-gpio"; |
| reg = <0x114001E0 0x20>; |
| #gpio-cells = <4>; |
| }; |
| |
| gpj0: gpio-controller@11000000 { |
| compatible = "samsung,exynos4-gpio"; |
| reg = <0x11000000 0x20>; |
| #gpio-cells = <4>; |
| }; |
| |
| gpj1: gpio-controller@11000020 { |
| compatible = "samsung,exynos4-gpio"; |
| reg = <0x11000020 0x20>; |
| #gpio-cells = <4>; |
| }; |
| |
| gpk0: gpio-controller@11000040 { |
| compatible = "samsung,exynos4-gpio"; |
| reg = <0x11000040 0x20>; |
| #gpio-cells = <4>; |
| }; |
| |
| gpk1: gpio-controller@11000060 { |
| compatible = "samsung,exynos4-gpio"; |
| reg = <0x11000060 0x20>; |
| #gpio-cells = <4>; |
| }; |
| |
| gpk2: gpio-controller@11000080 { |
| compatible = "samsung,exynos4-gpio"; |
| reg = <0x11000080 0x20>; |
| #gpio-cells = <4>; |
| }; |
| |
| gpk3: gpio-controller@110000A0 { |
| compatible = "samsung,exynos4-gpio"; |
| reg = <0x110000A0 0x20>; |
| #gpio-cells = <4>; |
| }; |
| |
| gpl0: gpio-controller@110000C0 { |
| compatible = "samsung,exynos4-gpio"; |
| reg = <0x110000C0 0x20>; |
| #gpio-cells = <4>; |
| }; |
| |
| gpl1: gpio-controller@110000E0 { |
| compatible = "samsung,exynos4-gpio"; |
| reg = <0x110000E0 0x20>; |
| #gpio-cells = <4>; |
| }; |
| |
| gpl2: gpio-controller@11000100 { |
| compatible = "samsung,exynos4-gpio"; |
| reg = <0x11000100 0x20>; |
| #gpio-cells = <4>; |
| }; |
| |
| gpy0: gpio-controller@11000120 { |
| compatible = "samsung,exynos4-gpio"; |
| reg = <0x11000120 0x20>; |
| #gpio-cells = <4>; |
| }; |
| |
| gpy1: gpio-controller@11000140 { |
| compatible = "samsung,exynos4-gpio"; |
| reg = <0x11000140 0x20>; |
| #gpio-cells = <4>; |
| }; |
| |
| gpy2: gpio-controller@11000160 { |
| compatible = "samsung,exynos4-gpio"; |
| reg = <0x11000160 0x20>; |
| #gpio-cells = <4>; |
| }; |
| |
| gpy3: gpio-controller@11000180 { |
| compatible = "samsung,exynos4-gpio"; |
| reg = <0x11000180 0x20>; |
| #gpio-cells = <4>; |
| }; |
| |
| gpy4: gpio-controller@110001A0 { |
| compatible = "samsung,exynos4-gpio"; |
| reg = <0x110001A0 0x20>; |
| #gpio-cells = <4>; |
| }; |
| |
| gpy5: gpio-controller@110001C0 { |
| compatible = "samsung,exynos4-gpio"; |
| reg = <0x110001C0 0x20>; |
| #gpio-cells = <4>; |
| }; |
| |
| gpy6: gpio-controller@110001E0 { |
| compatible = "samsung,exynos4-gpio"; |
| reg = <0x110001E0 0x20>; |
| #gpio-cells = <4>; |
| }; |
| |
| gpx0: gpio-controller@11000C00 { |
| compatible = "samsung,exynos4-gpio"; |
| reg = <0x11000C00 0x20>; |
| #gpio-cells = <4>; |
| }; |
| |
| gpx1: gpio-controller@11000C20 { |
| compatible = "samsung,exynos4-gpio"; |
| reg = <0x11000C20 0x20>; |
| #gpio-cells = <4>; |
| }; |
| |
| gpx2: gpio-controller@11000C40 { |
| compatible = "samsung,exynos4-gpio"; |
| reg = <0x11000C40 0x20>; |
| #gpio-cells = <4>; |
| }; |
| |
| gpx3: gpio-controller@11000C60 { |
| compatible = "samsung,exynos4-gpio"; |
| reg = <0x11000C60 0x20>; |
| #gpio-cells = <4>; |
| }; |
| |
| gpz: gpio-controller@03860000 { |
| compatible = "samsung,exynos4-gpio"; |
| reg = <0x03860000 0x20>; |
| #gpio-cells = <4>; |
| }; |
| }; |
| }; |
