| /* linux/arch/arm/plat-s3c24xx/devs.c |
| * |
| * Copyright (c) 2004 Simtec Electronics |
| * Ben Dooks <ben@simtec.co.uk> |
| * |
| * Base S3C24XX platform device definitions |
| * |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License version 2 as |
| * published by the Free Software Foundation. |
| * |
| */ |
| |
| #include <linux/kernel.h> |
| #include <linux/types.h> |
| #include <linux/interrupt.h> |
| #include <linux/list.h> |
| #include <linux/timer.h> |
| #include <linux/init.h> |
| #include <linux/serial_core.h> |
| #include <linux/platform_device.h> |
| #include <linux/io.h> |
| #include <linux/slab.h> |
| #include <linux/string.h> |
| |
| #include <asm/mach/arch.h> |
| #include <asm/mach/map.h> |
| #include <asm/mach/irq.h> |
| #include <mach/fb.h> |
| #include <mach/hardware.h> |
| #include <mach/dma.h> |
| #include <mach/irqs.h> |
| #include <asm/irq.h> |
| |
| #include <plat/regs-serial.h> |
| #include <plat/udc.h> |
| #include <plat/mci.h> |
| |
| #include <plat/devs.h> |
| #include <plat/cpu.h> |
| #include <plat/regs-spi.h> |
| #include <plat/ts.h> |
| |
| /* Serial port registrations */ |
| |
| static struct resource s3c2410_uart0_resource[] = { |
| [0] = { |
| .start = S3C2410_PA_UART0, |
| .end = S3C2410_PA_UART0 + 0x3fff, |
| .flags = IORESOURCE_MEM, |
| }, |
| [1] = { |
| .start = IRQ_S3CUART_RX0, |
| .end = IRQ_S3CUART_ERR0, |
| .flags = IORESOURCE_IRQ, |
| } |
| }; |
| |
| static struct resource s3c2410_uart1_resource[] = { |
| [0] = { |
| .start = S3C2410_PA_UART1, |
| .end = S3C2410_PA_UART1 + 0x3fff, |
| .flags = IORESOURCE_MEM, |
| }, |
| [1] = { |
| .start = IRQ_S3CUART_RX1, |
| .end = IRQ_S3CUART_ERR1, |
| .flags = IORESOURCE_IRQ, |
| } |
| }; |
| |
| static struct resource s3c2410_uart2_resource[] = { |
| [0] = { |
| .start = S3C2410_PA_UART2, |
| .end = S3C2410_PA_UART2 + 0x3fff, |
| .flags = IORESOURCE_MEM, |
| }, |
| [1] = { |
| .start = IRQ_S3CUART_RX2, |
| .end = IRQ_S3CUART_ERR2, |
| .flags = IORESOURCE_IRQ, |
| } |
| }; |
| |
| static struct resource s3c2410_uart3_resource[] = { |
| [0] = { |
| .start = S3C2443_PA_UART3, |
| .end = S3C2443_PA_UART3 + 0x3fff, |
| .flags = IORESOURCE_MEM, |
| }, |
| [1] = { |
| .start = IRQ_S3CUART_RX3, |
| .end = IRQ_S3CUART_ERR3, |
| .flags = IORESOURCE_IRQ, |
| }, |
| }; |
| |
| struct s3c24xx_uart_resources s3c2410_uart_resources[] __initdata = { |
| [0] = { |
| .resources = s3c2410_uart0_resource, |
| .nr_resources = ARRAY_SIZE(s3c2410_uart0_resource), |
| }, |
| [1] = { |
| .resources = s3c2410_uart1_resource, |
| .nr_resources = ARRAY_SIZE(s3c2410_uart1_resource), |
| }, |
| [2] = { |
| .resources = s3c2410_uart2_resource, |
| .nr_resources = ARRAY_SIZE(s3c2410_uart2_resource), |
| }, |
| [3] = { |
| .resources = s3c2410_uart3_resource, |
| .nr_resources = ARRAY_SIZE(s3c2410_uart3_resource), |
| }, |
| }; |
| |
| /* LCD Controller */ |
| |
| static struct resource s3c_lcd_resource[] = { |
| [0] = { |
| .start = S3C24XX_PA_LCD, |
| .end = S3C24XX_PA_LCD + S3C24XX_SZ_LCD - 1, |
| .flags = IORESOURCE_MEM, |
| }, |
| [1] = { |
| .start = IRQ_LCD, |
| .end = IRQ_LCD, |
| .flags = IORESOURCE_IRQ, |
| } |
| |
| }; |
| |
| static u64 s3c_device_lcd_dmamask = 0xffffffffUL; |
| |
| struct platform_device s3c_device_lcd = { |
| .name = "s3c2410-lcd", |
| .id = -1, |
| .num_resources = ARRAY_SIZE(s3c_lcd_resource), |
| .resource = s3c_lcd_resource, |
| .dev = { |
| .dma_mask = &s3c_device_lcd_dmamask, |
| .coherent_dma_mask = 0xffffffffUL |
| } |
| }; |
| |
| EXPORT_SYMBOL(s3c_device_lcd); |
| |
| void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd) |
| { |
| struct s3c2410fb_mach_info *npd; |
| |
| npd = kmemdup(pd, sizeof(*npd), GFP_KERNEL); |
| if (npd) { |
| s3c_device_lcd.dev.platform_data = npd; |
| npd->displays = kmemdup(pd->displays, |
| sizeof(struct s3c2410fb_display) * npd->num_displays, |
| GFP_KERNEL); |
| if (!npd->displays) |
| printk(KERN_ERR "no memory for LCD display data\n"); |
| } else { |
| printk(KERN_ERR "no memory for LCD platform data\n"); |
| } |
| } |
| |
| /* Touchscreen */ |
| |
| static struct resource s3c_ts_resource[] = { |
| [0] = { |
| .start = S3C24XX_PA_ADC, |
| .end = S3C24XX_PA_ADC + S3C24XX_SZ_ADC - 1, |
| .flags = IORESOURCE_MEM, |
| }, |
| [1] = { |
| .start = IRQ_TC, |
| .end = IRQ_TC, |
| .flags = IORESOURCE_IRQ, |
| }, |
| |
| }; |
| |
| struct platform_device s3c_device_ts = { |
| .name = "s3c2410-ts", |
| .id = -1, |
| .dev.parent = &s3c_device_adc.dev, |
| .num_resources = ARRAY_SIZE(s3c_ts_resource), |
| .resource = s3c_ts_resource, |
| }; |
| EXPORT_SYMBOL(s3c_device_ts); |
| |
| static struct s3c2410_ts_mach_info s3c2410ts_info; |
| |
| void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info) |
| { |
| memcpy(&s3c2410ts_info, hard_s3c2410ts_info, sizeof(struct s3c2410_ts_mach_info)); |
| s3c_device_ts.dev.platform_data = &s3c2410ts_info; |
| } |
| EXPORT_SYMBOL(s3c24xx_ts_set_platdata); |
| |
| /* USB Device (Gadget)*/ |
| |
| static struct resource s3c_usbgadget_resource[] = { |
| [0] = { |
| .start = S3C24XX_PA_USBDEV, |
| .end = S3C24XX_PA_USBDEV + S3C24XX_SZ_USBDEV - 1, |
| .flags = IORESOURCE_MEM, |
| }, |
| [1] = { |
| .start = IRQ_USBD, |
| .end = IRQ_USBD, |
| .flags = IORESOURCE_IRQ, |
| } |
| |
| }; |
| |
| struct platform_device s3c_device_usbgadget = { |
| .name = "s3c2410-usbgadget", |
| .id = -1, |
| .num_resources = ARRAY_SIZE(s3c_usbgadget_resource), |
| .resource = s3c_usbgadget_resource, |
| }; |
| |
| EXPORT_SYMBOL(s3c_device_usbgadget); |
| |
| void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd) |
| { |
| struct s3c2410_udc_mach_info *npd; |
| |
| npd = kmalloc(sizeof(*npd), GFP_KERNEL); |
| if (npd) { |
| memcpy(npd, pd, sizeof(*npd)); |
| s3c_device_usbgadget.dev.platform_data = npd; |
| } else { |
| printk(KERN_ERR "no memory for udc platform data\n"); |
| } |
| } |
| |
| /* IIS */ |
| |
| static struct resource s3c_iis_resource[] = { |
| [0] = { |
| .start = S3C24XX_PA_IIS, |
| .end = S3C24XX_PA_IIS + S3C24XX_SZ_IIS -1, |
| .flags = IORESOURCE_MEM, |
| } |
| }; |
| |
| static u64 s3c_device_iis_dmamask = 0xffffffffUL; |
| |
| struct platform_device s3c_device_iis = { |
| .name = "s3c24xx-iis", |
| .id = -1, |
| .num_resources = ARRAY_SIZE(s3c_iis_resource), |
| .resource = s3c_iis_resource, |
| .dev = { |
| .dma_mask = &s3c_device_iis_dmamask, |
| .coherent_dma_mask = 0xffffffffUL |
| } |
| }; |
| |
| EXPORT_SYMBOL(s3c_device_iis); |
| |
| /* ASoC PCM DMA */ |
| |
| static u64 s3c_device_audio_dmamask = 0xffffffffUL; |
| |
| struct platform_device s3c_device_pcm = { |
| .name = "s3c24xx-pcm-audio", |
| .id = -1, |
| .dev = { |
| .dma_mask = &s3c_device_audio_dmamask, |
| .coherent_dma_mask = 0xffffffffUL |
| } |
| }; |
| |
| EXPORT_SYMBOL(s3c_device_pcm); |
| |
| /* RTC */ |
| |
| static struct resource s3c_rtc_resource[] = { |
| [0] = { |
| .start = S3C24XX_PA_RTC, |
| .end = S3C24XX_PA_RTC + 0xff, |
| .flags = IORESOURCE_MEM, |
| }, |
| [1] = { |
| .start = IRQ_RTC, |
| .end = IRQ_RTC, |
| .flags = IORESOURCE_IRQ, |
| }, |
| [2] = { |
| .start = IRQ_TICK, |
| .end = IRQ_TICK, |
| .flags = IORESOURCE_IRQ |
| } |
| }; |
| |
| struct platform_device s3c_device_rtc = { |
| .name = "s3c2410-rtc", |
| .id = -1, |
| .num_resources = ARRAY_SIZE(s3c_rtc_resource), |
| .resource = s3c_rtc_resource, |
| }; |
| |
| EXPORT_SYMBOL(s3c_device_rtc); |
| |
| /* ADC */ |
| |
| static struct resource s3c_adc_resource[] = { |
| [0] = { |
| .start = S3C24XX_PA_ADC, |
| .end = S3C24XX_PA_ADC + S3C24XX_SZ_ADC - 1, |
| .flags = IORESOURCE_MEM, |
| }, |
| [1] = { |
| .start = IRQ_TC, |
| .end = IRQ_TC, |
| .flags = IORESOURCE_IRQ, |
| }, |
| [2] = { |
| .start = IRQ_ADC, |
| .end = IRQ_ADC, |
| .flags = IORESOURCE_IRQ, |
| } |
| |
| }; |
| |
| struct platform_device s3c_device_adc = { |
| .name = "s3c24xx-adc", |
| .id = -1, |
| .num_resources = ARRAY_SIZE(s3c_adc_resource), |
| .resource = s3c_adc_resource, |
| }; |
| |
| /* SDI */ |
| |
| static struct resource s3c_sdi_resource[] = { |
| [0] = { |
| .start = S3C24XX_PA_SDI, |
| .end = S3C24XX_PA_SDI + S3C24XX_SZ_SDI - 1, |
| .flags = IORESOURCE_MEM, |
| }, |
| [1] = { |
| .start = IRQ_SDI, |
| .end = IRQ_SDI, |
| .flags = IORESOURCE_IRQ, |
| } |
| |
| }; |
| |
| struct platform_device s3c_device_sdi = { |
| .name = "s3c2410-sdi", |
| .id = -1, |
| .num_resources = ARRAY_SIZE(s3c_sdi_resource), |
| .resource = s3c_sdi_resource, |
| }; |
| |
| EXPORT_SYMBOL(s3c_device_sdi); |
| |
| void __init s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata) |
| { |
| struct s3c24xx_mci_pdata *npd; |
| |
| npd = kmemdup(pdata, sizeof(struct s3c24xx_mci_pdata), GFP_KERNEL); |
| if (!npd) |
| printk(KERN_ERR "%s: no memory to copy pdata", __func__); |
| |
| s3c_device_sdi.dev.platform_data = npd; |
| } |
| |
| |
| /* SPI (0) */ |
| |
| static struct resource s3c_spi0_resource[] = { |
| [0] = { |
| .start = S3C24XX_PA_SPI, |
| .end = S3C24XX_PA_SPI + 0x1f, |
| .flags = IORESOURCE_MEM, |
| }, |
| [1] = { |
| .start = IRQ_SPI0, |
| .end = IRQ_SPI0, |
| .flags = IORESOURCE_IRQ, |
| } |
| |
| }; |
| |
| static u64 s3c_device_spi0_dmamask = 0xffffffffUL; |
| |
| struct platform_device s3c_device_spi0 = { |
| .name = "s3c2410-spi", |
| .id = 0, |
| .num_resources = ARRAY_SIZE(s3c_spi0_resource), |
| .resource = s3c_spi0_resource, |
| .dev = { |
| .dma_mask = &s3c_device_spi0_dmamask, |
| .coherent_dma_mask = 0xffffffffUL |
| } |
| }; |
| |
| EXPORT_SYMBOL(s3c_device_spi0); |
| |
| /* SPI (1) */ |
| |
| static struct resource s3c_spi1_resource[] = { |
| [0] = { |
| .start = S3C24XX_PA_SPI + S3C2410_SPI1, |
| .end = S3C24XX_PA_SPI + S3C2410_SPI1 + 0x1f, |
| .flags = IORESOURCE_MEM, |
| }, |
| [1] = { |
| .start = IRQ_SPI1, |
| .end = IRQ_SPI1, |
| .flags = IORESOURCE_IRQ, |
| } |
| |
| }; |
| |
| static u64 s3c_device_spi1_dmamask = 0xffffffffUL; |
| |
| struct platform_device s3c_device_spi1 = { |
| .name = "s3c2410-spi", |
| .id = 1, |
| .num_resources = ARRAY_SIZE(s3c_spi1_resource), |
| .resource = s3c_spi1_resource, |
| .dev = { |
| .dma_mask = &s3c_device_spi1_dmamask, |
| .coherent_dma_mask = 0xffffffffUL |
| } |
| }; |
| |
| EXPORT_SYMBOL(s3c_device_spi1); |
| |
| #ifdef CONFIG_CPU_S3C2440 |
| |
| /* Camif Controller */ |
| |
| static struct resource s3c_camif_resource[] = { |
| [0] = { |
| .start = S3C2440_PA_CAMIF, |
| .end = S3C2440_PA_CAMIF + S3C2440_SZ_CAMIF - 1, |
| .flags = IORESOURCE_MEM, |
| }, |
| [1] = { |
| .start = IRQ_CAM, |
| .end = IRQ_CAM, |
| .flags = IORESOURCE_IRQ, |
| } |
| |
| }; |
| |
| static u64 s3c_device_camif_dmamask = 0xffffffffUL; |
| |
| struct platform_device s3c_device_camif = { |
| .name = "s3c2440-camif", |
| .id = -1, |
| .num_resources = ARRAY_SIZE(s3c_camif_resource), |
| .resource = s3c_camif_resource, |
| .dev = { |
| .dma_mask = &s3c_device_camif_dmamask, |
| .coherent_dma_mask = 0xffffffffUL |
| } |
| }; |
| |
| EXPORT_SYMBOL(s3c_device_camif); |
| |
| /* AC97 */ |
| |
| static struct resource s3c_ac97_resource[] = { |
| [0] = { |
| .start = S3C2440_PA_AC97, |
| .end = S3C2440_PA_AC97 + S3C2440_SZ_AC97 -1, |
| .flags = IORESOURCE_MEM, |
| }, |
| [1] = { |
| .start = IRQ_S3C244x_AC97, |
| .end = IRQ_S3C244x_AC97, |
| .flags = IORESOURCE_IRQ, |
| }, |
| [2] = { |
| .name = "PCM out", |
| .start = DMACH_PCM_OUT, |
| .end = DMACH_PCM_OUT, |
| .flags = IORESOURCE_DMA, |
| }, |
| [3] = { |
| .name = "PCM in", |
| .start = DMACH_PCM_IN, |
| .end = DMACH_PCM_IN, |
| .flags = IORESOURCE_DMA, |
| }, |
| [4] = { |
| .name = "Mic in", |
| .start = DMACH_MIC_IN, |
| .end = DMACH_MIC_IN, |
| .flags = IORESOURCE_DMA, |
| }, |
| }; |
| |
| struct platform_device s3c_device_ac97 = { |
| .name = "s3c-ac97", |
| .id = -1, |
| .num_resources = ARRAY_SIZE(s3c_ac97_resource), |
| .resource = s3c_ac97_resource, |
| .dev = { |
| .dma_mask = &s3c_device_audio_dmamask, |
| .coherent_dma_mask = 0xffffffffUL |
| } |
| }; |
| |
| EXPORT_SYMBOL(s3c_device_ac97); |
| |
| /* ASoC I2S */ |
| |
| struct platform_device s3c2412_device_iis = { |
| .name = "s3c2412-iis", |
| .id = -1, |
| .dev = { |
| .dma_mask = &s3c_device_audio_dmamask, |
| .coherent_dma_mask = 0xffffffffUL |
| } |
| }; |
| |
| EXPORT_SYMBOL(s3c2412_device_iis); |
| |
| #endif // CONFIG_CPU_S32440 |