commit d2e752db6d05374a35dddb2e17864fe310fbcf69
author Roland Dreier <roland@purestorage.com> Mon Apr 28 17:36:20 2014 -0700
committer David S. Miller <davem@davemloft.net> Wed Apr 30 16:12:21 2014 -0400
tree 43cb815f741bff8a2f26136541a261785aabcbb9
parent 652f99ead8319941216c64d7f92c8dcdc9b95970

cxgb4: Decode PCIe Gen3 link speed

Add handling for " 8 GT/s" in print_port_info().

Signed-off-by: Roland Dreier <roland@purestorage.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c

diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
index 6fe5891..24e16e3 100644
--- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
+++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
@@ -5870,6 +5870,8 @@
 		spd = " 2.5 GT/s";
 	else if (adap->params.pci.speed == PCI_EXP_LNKSTA_CLS_5_0GB)
 		spd = " 5 GT/s";
+	else if (adap->params.pci.speed == PCI_EXP_LNKSTA_CLS_8_0GB)
+		spd = " 8 GT/s";
 
 	if (pi->link_cfg.supported & FW_PORT_CAP_SPEED_100M)
 		bufp += sprintf(bufp, "100/");