| /* |
| * P1025 TWR Device Tree Source (32-bit address map) |
| * |
| * Copyright 2013 Freescale Semiconductor Inc. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions are met: |
| * * Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * * Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * * Neither the name of Freescale Semiconductor nor the |
| * names of its contributors may be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * |
| * ALTERNATIVELY, this software may be distributed under the terms of the |
| * GNU General Public License ("GPL") as published by the Free Software |
| * Foundation, either version 2 of that License or (at your option) any |
| * later version. |
| * |
| * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY |
| * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
| * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY |
| * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
| * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
| * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND |
| * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
| * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| |
| /include/ "fsl/p1021si-pre.dtsi" |
| / { |
| model = "fsl,P1025"; |
| compatible = "fsl,TWR-P1025"; |
| |
| memory { |
| device_type = "memory"; |
| }; |
| |
| lbc: localbus@ffe05000 { |
| reg = <0 0xffe05000 0 0x1000>; |
| |
| /* NOR Flash and SSD1289 */ |
| ranges = <0x0 0x0 0x0 0xec000000 0x04000000 |
| 0x2 0x0 0x0 0xe0000000 0x00020000>; |
| }; |
| |
| soc: soc@ffe00000 { |
| ranges = <0x0 0x0 0xffe00000 0x100000>; |
| }; |
| |
| pci0: pcie@ffe09000 { |
| ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 |
| 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>; |
| reg = <0 0xffe09000 0 0x1000>; |
| pcie@0 { |
| ranges = <0x2000000 0x0 0xa0000000 |
| 0x2000000 0x0 0xa0000000 |
| 0x0 0x20000000 |
| |
| 0x1000000 0x0 0x0 |
| 0x1000000 0x0 0x0 |
| 0x0 0x100000>; |
| }; |
| }; |
| |
| pci1: pcie@ffe0a000 { |
| reg = <0 0xffe0a000 0 0x1000>; |
| ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000 |
| 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>; |
| pcie@0 { |
| ranges = <0x2000000 0x0 0x80000000 |
| 0x2000000 0x0 0x80000000 |
| 0x0 0x20000000 |
| |
| 0x1000000 0x0 0x0 |
| 0x1000000 0x0 0x0 |
| 0x0 0x100000>; |
| }; |
| }; |
| |
| qe: qe@ffe80000 { |
| ranges = <0x0 0x0 0xffe80000 0x40000>; |
| reg = <0 0xffe80000 0 0x480>; |
| brg-frequency = <0>; |
| bus-frequency = <0>; |
| }; |
| }; |
| |
| /include/ "p1025twr.dtsi" |
| /include/ "fsl/p1021si-post.dtsi" |
