arch/arm/mach-msm/devices-qsd8x50.c - maze/linux - Git at Google

 /*
  * Copyright (C) 2008 Google, Inc.
  * Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved.
  *
  * This software is licensed under the terms of the GNU General Public
  * License version 2, as published by the Free Software Foundation, and
  * may be copied, distributed, and modified under those terms.
  *
  * This program is distributed in the hope that it will be useful,
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.
  *
  */

 #include <linux/kernel.h>
 #include <linux/platform_device.h>
 #include <linux/clkdev.h>
 #include <linux/dma-mapping.h>

 #include <mach/irqs.h>
 #include <mach/msm_iomap.h>
 #include <mach/dma.h>
 #include <mach/board.h>

 #include "devices.h"

 #include <asm/mach/flash.h>

 #include <linux/platform_data/mmc-msm_sdcc.h>
 #include "clock.h"
 #include "clock-pcom.h"

 static struct resource msm_gpio_resources[] = {
 	{
 		.start	= 64 + 165 + 9,
 		.end	= 64 + 165 + 9,
 		.flags	= IORESOURCE_IRQ,
 	},
 	{
 		.start	= 64 + 165 + 10,
 		.end	= 64 + 165 + 10,
 		.flags	= IORESOURCE_IRQ,
 	},
 	{
 		.start	= 0xa9000800,
 		.end	= 0xa9000800 + SZ_4K - 1,
 		.flags	= IORESOURCE_MEM,
 		.name  = "gpio1"
 	},
 	{
 		.start	= 0xa9100C00,
 		.end	= 0xa9100C00 + SZ_4K - 1,
 		.flags	= IORESOURCE_MEM,
 		.name  = "gpio2"
 	},
 };

 struct platform_device msm_device_gpio_8x50 = {
 	.name	= "gpio-msm-8x50",
 	.num_resources	= ARRAY_SIZE(msm_gpio_resources),
 	.resource	= msm_gpio_resources,
 };

 static struct resource resources_uart3[] = {
 	{
 		.start	= INT_UART3,
 		.end	= INT_UART3,
 		.flags	= IORESOURCE_IRQ,
 	},
 	{
 		.start	= MSM_UART3_PHYS,
 		.end	= MSM_UART3_PHYS + MSM_UART3_SIZE - 1,
 		.flags	= IORESOURCE_MEM,
 		.name  = "uart_resource"
 	},
 };

 struct platform_device msm_device_uart3 = {
 	.name	= "msm_serial",
 	.id	= 2,
 	.num_resources	= ARRAY_SIZE(resources_uart3),
 	.resource	= resources_uart3,
 };

 struct platform_device msm_device_smd = {
 	.name   = "msm_smd",
 	.id     = -1,
 };

 static struct resource resources_otg[] = {
 	{
 		.start	= MSM_HSUSB_PHYS,
 		.end	= MSM_HSUSB_PHYS + MSM_HSUSB_SIZE,
 		.flags	= IORESOURCE_MEM,
 	},
 	{
 		.start	= INT_USB_HS,
 		.end	= INT_USB_HS,
 		.flags	= IORESOURCE_IRQ,
 	},
 };

 struct platform_device msm_device_otg = {
 	.name		= "msm_otg",
 	.id		= -1,
 	.num_resources	= ARRAY_SIZE(resources_otg),
 	.resource	= resources_otg,
 	.dev		= {
 		.coherent_dma_mask	= 0xffffffff,
 	},
 };

 static struct resource resources_hsusb[] = {
 	{
 		.start	= MSM_HSUSB_PHYS,
 		.end	= MSM_HSUSB_PHYS + MSM_HSUSB_SIZE,
 		.flags	= IORESOURCE_MEM,
 	},
 	{
 		.start	= INT_USB_HS,
 		.end	= INT_USB_HS,
 		.flags	= IORESOURCE_IRQ,
 	},
 };

 struct platform_device msm_device_hsusb = {
 	.name		= "msm_hsusb",
 	.id		= -1,
 	.num_resources	= ARRAY_SIZE(resources_hsusb),
 	.resource	= resources_hsusb,
 	.dev		= {
 		.coherent_dma_mask	= 0xffffffff,
 	},
 };

 static u64 dma_mask = 0xffffffffULL;
 static struct resource resources_hsusb_host[] = {
 	{
 		.start	= MSM_HSUSB_PHYS,
 		.end	= MSM_HSUSB_PHYS + MSM_HSUSB_SIZE,
 		.flags	= IORESOURCE_MEM,
 	},
 	{
 		.start	= INT_USB_HS,
 		.end	= INT_USB_HS,
 		.flags	= IORESOURCE_IRQ,
 	},
 };

 struct platform_device msm_device_hsusb_host = {
 	.name		= "msm_hsusb_host",
 	.id		= -1,
 	.num_resources	= ARRAY_SIZE(resources_hsusb_host),
 	.resource	= resources_hsusb_host,
 	.dev		= {
 		.dma_mask               = &dma_mask,
 		.coherent_dma_mask      = 0xffffffffULL,
 	},
 };

 static struct resource resources_sdc1[] = {
 	{
 		.start	= MSM_SDC1_PHYS,
 		.end	= MSM_SDC1_PHYS + MSM_SDC1_SIZE - 1,
 		.flags	= IORESOURCE_MEM,
 	},
 	{
 		.start	= INT_SDC1_0,
 		.end	= INT_SDC1_0,
 		.flags	= IORESOURCE_IRQ,
 		.name	= "cmd_irq",
 	},
 	{
 		.flags	= IORESOURCE_IRQ | IORESOURCE_DISABLED,
 		.name	= "status_irq"
 	},
 	{
 		.start	= 8,
 		.end	= 8,
 		.flags	= IORESOURCE_DMA,
 	},
 };

 static struct resource resources_sdc2[] = {
 	{
 		.start	= MSM_SDC2_PHYS,
 		.end	= MSM_SDC2_PHYS + MSM_SDC2_SIZE - 1,
 		.flags	= IORESOURCE_MEM,
 	},
 	{
 		.start	= INT_SDC2_0,
 		.end	= INT_SDC2_0,
 		.flags	= IORESOURCE_IRQ,
 		.name	= "cmd_irq",
 	},
 	{
 		.flags	= IORESOURCE_IRQ | IORESOURCE_DISABLED,
 		.name	= "status_irq"
 	},
 	{
 		.start	= 8,
 		.end	= 8,
 		.flags	= IORESOURCE_DMA,
 	},
 };

 static struct resource resources_sdc3[] = {
 	{
 		.start	= MSM_SDC3_PHYS,
 		.end	= MSM_SDC3_PHYS + MSM_SDC3_SIZE - 1,
 		.flags	= IORESOURCE_MEM,
 	},
 	{
 		.start	= INT_SDC3_0,
 		.end	= INT_SDC3_0,
 		.flags	= IORESOURCE_IRQ,
 		.name	= "cmd_irq",
 	},
 	{
 		.flags	= IORESOURCE_IRQ | IORESOURCE_DISABLED,
 		.name	= "status_irq"
 	},
 	{
 		.start	= 8,
 		.end	= 8,
 		.flags	= IORESOURCE_DMA,
 	},
 };

 static struct resource resources_sdc4[] = {
 	{
 		.start	= MSM_SDC4_PHYS,
 		.end	= MSM_SDC4_PHYS + MSM_SDC4_SIZE - 1,
 		.flags	= IORESOURCE_MEM,
 	},
 	{
 		.start	= INT_SDC4_0,
 		.end	= INT_SDC4_0,
 		.flags	= IORESOURCE_IRQ,
 		.name	= "cmd_irq",
 	},
 	{
 		.flags	= IORESOURCE_IRQ | IORESOURCE_DISABLED,
 		.name	= "status_irq"
 	},
 	{
 		.start	= 8,
 		.end	= 8,
 		.flags	= IORESOURCE_DMA,
 	},
 };

 struct platform_device msm_device_sdc1 = {
 	.name		= "msm_sdcc",
 	.id		= 1,
 	.num_resources	= ARRAY_SIZE(resources_sdc1),
 	.resource	= resources_sdc1,
 	.dev		= {
 		.coherent_dma_mask	= 0xffffffff,
 	},
 };

 struct platform_device msm_device_sdc2 = {
 	.name		= "msm_sdcc",
 	.id		= 2,
 	.num_resources	= ARRAY_SIZE(resources_sdc2),
 	.resource	= resources_sdc2,
 	.dev		= {
 		.coherent_dma_mask	= 0xffffffff,
 	},
 };

 struct platform_device msm_device_sdc3 = {
 	.name		= "msm_sdcc",
 	.id		= 3,
 	.num_resources	= ARRAY_SIZE(resources_sdc3),
 	.resource	= resources_sdc3,
 	.dev		= {
 		.coherent_dma_mask	= 0xffffffff,
 	},
 };

 struct platform_device msm_device_sdc4 = {
 	.name		= "msm_sdcc",
 	.id		= 4,
 	.num_resources	= ARRAY_SIZE(resources_sdc4),
 	.resource	= resources_sdc4,
 	.dev		= {
 		.coherent_dma_mask	= 0xffffffff,
 	},
 };

 static struct platform_device *msm_sdcc_devices[] __initdata = {
 	&msm_device_sdc1,
 	&msm_device_sdc2,
 	&msm_device_sdc3,
 	&msm_device_sdc4,
 };

 int __init msm_add_sdcc(unsigned int controller,
 			struct msm_mmc_platform_data *plat,
 			unsigned int stat_irq, unsigned long stat_irq_flags)
 {
 	struct platform_device	*pdev;
 	struct resource *res;

 	if (controller < 1 || controller > 4)
 		return -EINVAL;

 	pdev = msm_sdcc_devices[controller-1];
 	pdev->dev.platform_data = plat;

 	res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "status_irq");
 	if (!res)
 		return -EINVAL;
 	else if (stat_irq) {
 		res->start = res->end = stat_irq;
 		res->flags &= ~IORESOURCE_DISABLED;
 		res->flags |= stat_irq_flags;
 	}

 	return platform_device_register(pdev);
 }

 static struct clk_pcom_desc msm_clocks_8x50[] = {
 	CLK_PCOM("adm_clk",	ADM_CLK,	NULL, 0),
 	CLK_PCOM("ce_clk",	CE_CLK,		NULL, 0),
 	CLK_PCOM("ebi1_clk",	EBI1_CLK,	NULL, CLK_MIN),
 	CLK_PCOM("ebi2_clk",	EBI2_CLK,	NULL, 0),
 	CLK_PCOM("ecodec_clk",	ECODEC_CLK,	NULL, 0),
 	CLK_PCOM("emdh_clk",	EMDH_CLK,	NULL, OFF | CLK_MINMAX),
 	CLK_PCOM("gp_clk",	GP_CLK,		NULL, 0),
 	CLK_PCOM("grp_clk",	GRP_3D_CLK,	NULL, 0),
 	CLK_PCOM("i2c_clk",	I2C_CLK,	NULL, 0),
 	CLK_PCOM("icodec_rx_clk",	ICODEC_RX_CLK,	NULL, 0),
 	CLK_PCOM("icodec_tx_clk",	ICODEC_TX_CLK,	NULL, 0),
 	CLK_PCOM("imem_clk",	IMEM_CLK,	NULL, OFF),
 	CLK_PCOM("mdc_clk",	MDC_CLK,	NULL, 0),
 	CLK_PCOM("mddi_clk",	PMDH_CLK,	NULL, OFF | CLK_MINMAX),
 	CLK_PCOM("mdp_clk",	MDP_CLK,	NULL, OFF),
 	CLK_PCOM("mdp_lcdc_pclk_clk", MDP_LCDC_PCLK_CLK, NULL, 0),
 	CLK_PCOM("mdp_lcdc_pad_pclk_clk", MDP_LCDC_PAD_PCLK_CLK, NULL, 0),
 	CLK_PCOM("mdp_vsync_clk",	MDP_VSYNC_CLK,	NULL, 0),
 	CLK_PCOM("pbus_clk",	PBUS_CLK,	NULL, CLK_MIN),
 	CLK_PCOM("pcm_clk",	PCM_CLK,	NULL, 0),
 	CLK_PCOM("sdac_clk",	SDAC_CLK,	NULL, OFF),
 	CLK_PCOM("sdc_clk",	SDC1_CLK,	"msm_sdcc.1", OFF),
 	CLK_PCOM("sdc_pclk",	SDC1_P_CLK,	"msm_sdcc.1", OFF),
 	CLK_PCOM("sdc_clk",	SDC2_CLK,	"msm_sdcc.2", OFF),
 	CLK_PCOM("sdc_pclk",	SDC2_P_CLK,	"msm_sdcc.2", OFF),
 	CLK_PCOM("sdc_clk",	SDC3_CLK,	"msm_sdcc.3", OFF),
 	CLK_PCOM("sdc_pclk",	SDC3_P_CLK,	"msm_sdcc.3", OFF),
 	CLK_PCOM("sdc_clk",	SDC4_CLK,	"msm_sdcc.4", OFF),
 	CLK_PCOM("sdc_pclk",	SDC4_P_CLK,	"msm_sdcc.4", OFF),
 	CLK_PCOM("spi_clk",	SPI_CLK,	NULL, 0),
 	CLK_PCOM("tsif_clk",	TSIF_CLK,	NULL, 0),
 	CLK_PCOM("tsif_ref_clk",	TSIF_REF_CLK,	NULL, 0),
 	CLK_PCOM("tv_dac_clk",	TV_DAC_CLK,	NULL, 0),
 	CLK_PCOM("tv_enc_clk",	TV_ENC_CLK,	NULL, 0),
 	CLK_PCOM("uart_clk",	UART1_CLK,	NULL, OFF),
 	CLK_PCOM("uart_clk",	UART2_CLK,	NULL, 0),
 	CLK_PCOM("uart_clk",	UART3_CLK,	"msm_serial.2", OFF),
 	CLK_PCOM("uartdm_clk",	UART1DM_CLK,	NULL, OFF),
 	CLK_PCOM("uartdm_clk",	UART2DM_CLK,	NULL, 0),
 	CLK_PCOM("usb_hs_clk",	USB_HS_CLK,	NULL, OFF),
 	CLK_PCOM("usb_hs_pclk",	USB_HS_P_CLK,	NULL, OFF),
 	CLK_PCOM("usb_otg_clk",	USB_OTG_CLK,	NULL, 0),
 	CLK_PCOM("vdc_clk",	VDC_CLK,	NULL, OFF | CLK_MIN),
 	CLK_PCOM("vfe_clk",	VFE_CLK,	NULL, OFF),
 	CLK_PCOM("vfe_mdc_clk",	VFE_MDC_CLK,	NULL, OFF),
 	CLK_PCOM("vfe_axi_clk",	VFE_AXI_CLK,	NULL, OFF),
 	CLK_PCOM("usb_hs2_clk",	USB_HS2_CLK,	NULL, OFF),
 	CLK_PCOM("usb_hs2_pclk",	USB_HS2_P_CLK,	NULL, OFF),
 	CLK_PCOM("usb_hs3_clk",	USB_HS3_CLK,	NULL, OFF),
 	CLK_PCOM("usb_hs3_pclk",	USB_HS3_P_CLK,	NULL, OFF),
 	CLK_PCOM("usb_phy_clk",	USB_PHY_CLK,	NULL, 0),
 };

 static struct pcom_clk_pdata msm_clock_8x50_pdata = {
 	.lookup = msm_clocks_8x50,
 	.num_lookups = ARRAY_SIZE(msm_clocks_8x50),
 };

 struct platform_device msm_clock_8x50 = {
 	.name = "msm-clock-pcom",
 	.dev.platform_data = &msm_clock_8x50_pdata,
 };
	/*
	* Copyright (C) 2008 Google, Inc.
	* Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved.
	*
	* This software is licensed under the terms of the GNU General Public
	* License version 2, as published by the Free Software Foundation, and
	* may be copied, distributed, and modified under those terms.
	*
	* This program is distributed in the hope that it will be useful,
	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	* GNU General Public License for more details.
	*
	*/

	#include <linux/kernel.h>
	#include <linux/platform_device.h>
	#include <linux/clkdev.h>
	#include <linux/dma-mapping.h>

	#include <mach/irqs.h>
	#include <mach/msm_iomap.h>
	#include <mach/dma.h>
	#include <mach/board.h>

	#include "devices.h"

	#include <asm/mach/flash.h>

	#include <linux/platform_data/mmc-msm_sdcc.h>
	#include "clock.h"
	#include "clock-pcom.h"

	static struct resource msm_gpio_resources[] = {
	{
	.start = 64 + 165 + 9,
	.end = 64 + 165 + 9,
	.flags = IORESOURCE_IRQ,
	},
	{
	.start = 64 + 165 + 10,
	.end = 64 + 165 + 10,
	.flags = IORESOURCE_IRQ,
	},
	{
	.start = 0xa9000800,
	.end = 0xa9000800 + SZ_4K - 1,
	.flags = IORESOURCE_MEM,
	.name = "gpio1"
	},
	{
	.start = 0xa9100C00,
	.end = 0xa9100C00 + SZ_4K - 1,
	.flags = IORESOURCE_MEM,
	.name = "gpio2"
	},
	};

	struct platform_device msm_device_gpio_8x50 = {
	.name = "gpio-msm-8x50",
	.num_resources = ARRAY_SIZE(msm_gpio_resources),
	.resource = msm_gpio_resources,
	};

	static struct resource resources_uart3[] = {
	{
	.start = INT_UART3,
	.end = INT_UART3,
	.flags = IORESOURCE_IRQ,
	},
	{
	.start = MSM_UART3_PHYS,
	.end = MSM_UART3_PHYS + MSM_UART3_SIZE - 1,
	.flags = IORESOURCE_MEM,
	.name = "uart_resource"
	},
	};

	struct platform_device msm_device_uart3 = {
	.name = "msm_serial",
	.id = 2,
	.num_resources = ARRAY_SIZE(resources_uart3),
	.resource = resources_uart3,
	};

	struct platform_device msm_device_smd = {
	.name = "msm_smd",
	.id = -1,
	};

	static struct resource resources_otg[] = {
	{
	.start = MSM_HSUSB_PHYS,
	.end = MSM_HSUSB_PHYS + MSM_HSUSB_SIZE,
	.flags = IORESOURCE_MEM,
	},
	{
	.start = INT_USB_HS,
	.end = INT_USB_HS,
	.flags = IORESOURCE_IRQ,
	},
	};

	struct platform_device msm_device_otg = {
	.name = "msm_otg",
	.id = -1,
	.num_resources = ARRAY_SIZE(resources_otg),
	.resource = resources_otg,
	.dev = {
	.coherent_dma_mask = 0xffffffff,
	},
	};

	static struct resource resources_hsusb[] = {
	{
	.start = MSM_HSUSB_PHYS,
	.end = MSM_HSUSB_PHYS + MSM_HSUSB_SIZE,
	.flags = IORESOURCE_MEM,
	},
	{
	.start = INT_USB_HS,
	.end = INT_USB_HS,
	.flags = IORESOURCE_IRQ,
	},
	};

	struct platform_device msm_device_hsusb = {
	.name = "msm_hsusb",
	.id = -1,
	.num_resources = ARRAY_SIZE(resources_hsusb),
	.resource = resources_hsusb,
	.dev = {
	.coherent_dma_mask = 0xffffffff,
	},
	};

	static u64 dma_mask = 0xffffffffULL;
	static struct resource resources_hsusb_host[] = {
	{
	.start = MSM_HSUSB_PHYS,
	.end = MSM_HSUSB_PHYS + MSM_HSUSB_SIZE,
	.flags = IORESOURCE_MEM,
	},
	{
	.start = INT_USB_HS,
	.end = INT_USB_HS,
	.flags = IORESOURCE_IRQ,
	},
	};

	struct platform_device msm_device_hsusb_host = {
	.name = "msm_hsusb_host",
	.id = -1,
	.num_resources = ARRAY_SIZE(resources_hsusb_host),
	.resource = resources_hsusb_host,
	.dev = {
	.dma_mask = &dma_mask,
	.coherent_dma_mask = 0xffffffffULL,
	},
	};

	static struct resource resources_sdc1[] = {
	{
	.start = MSM_SDC1_PHYS,
	.end = MSM_SDC1_PHYS + MSM_SDC1_SIZE - 1,
	.flags = IORESOURCE_MEM,
	},
	{
	.start = INT_SDC1_0,
	.end = INT_SDC1_0,
	.flags = IORESOURCE_IRQ,
	.name = "cmd_irq",
	},
	{
	.flags = IORESOURCE_IRQ \| IORESOURCE_DISABLED,
	.name = "status_irq"
	},
	{
	.start = 8,
	.end = 8,
	.flags = IORESOURCE_DMA,
	},
	};

	static struct resource resources_sdc2[] = {
	{
	.start = MSM_SDC2_PHYS,
	.end = MSM_SDC2_PHYS + MSM_SDC2_SIZE - 1,
	.flags = IORESOURCE_MEM,
	},
	{
	.start = INT_SDC2_0,
	.end = INT_SDC2_0,
	.flags = IORESOURCE_IRQ,
	.name = "cmd_irq",
	},
	{
	.flags = IORESOURCE_IRQ \| IORESOURCE_DISABLED,
	.name = "status_irq"
	},
	{
	.start = 8,
	.end = 8,
	.flags = IORESOURCE_DMA,
	},
	};

	static struct resource resources_sdc3[] = {
	{
	.start = MSM_SDC3_PHYS,
	.end = MSM_SDC3_PHYS + MSM_SDC3_SIZE - 1,
	.flags = IORESOURCE_MEM,
	},
	{
	.start = INT_SDC3_0,
	.end = INT_SDC3_0,
	.flags = IORESOURCE_IRQ,
	.name = "cmd_irq",
	},
	{
	.flags = IORESOURCE_IRQ \| IORESOURCE_DISABLED,
	.name = "status_irq"
	},
	{
	.start = 8,
	.end = 8,
	.flags = IORESOURCE_DMA,
	},
	};

	static struct resource resources_sdc4[] = {
	{
	.start = MSM_SDC4_PHYS,
	.end = MSM_SDC4_PHYS + MSM_SDC4_SIZE - 1,
	.flags = IORESOURCE_MEM,
	},
	{
	.start = INT_SDC4_0,
	.end = INT_SDC4_0,
	.flags = IORESOURCE_IRQ,
	.name = "cmd_irq",
	},
	{
	.flags = IORESOURCE_IRQ \| IORESOURCE_DISABLED,
	.name = "status_irq"
	},
	{
	.start = 8,
	.end = 8,
	.flags = IORESOURCE_DMA,
	},
	};

	struct platform_device msm_device_sdc1 = {
	.name = "msm_sdcc",
	.id = 1,
	.num_resources = ARRAY_SIZE(resources_sdc1),
	.resource = resources_sdc1,
	.dev = {
	.coherent_dma_mask = 0xffffffff,
	},
	};

	struct platform_device msm_device_sdc2 = {
	.name = "msm_sdcc",
	.id = 2,
	.num_resources = ARRAY_SIZE(resources_sdc2),
	.resource = resources_sdc2,
	.dev = {
	.coherent_dma_mask = 0xffffffff,
	},
	};

	struct platform_device msm_device_sdc3 = {
	.name = "msm_sdcc",
	.id = 3,
	.num_resources = ARRAY_SIZE(resources_sdc3),
	.resource = resources_sdc3,
	.dev = {
	.coherent_dma_mask = 0xffffffff,
	},
	};

	struct platform_device msm_device_sdc4 = {
	.name = "msm_sdcc",
	.id = 4,
	.num_resources = ARRAY_SIZE(resources_sdc4),
	.resource = resources_sdc4,
	.dev = {
	.coherent_dma_mask = 0xffffffff,
	},
	};

	static struct platform_device *msm_sdcc_devices[] __initdata = {
	&msm_device_sdc1,
	&msm_device_sdc2,
	&msm_device_sdc3,
	&msm_device_sdc4,
	};

	int __init msm_add_sdcc(unsigned int controller,
	struct msm_mmc_platform_data *plat,
	unsigned int stat_irq, unsigned long stat_irq_flags)
	{
	struct platform_device *pdev;
	struct resource *res;

	if (controller < 1 \|\| controller > 4)
	return -EINVAL;

	pdev = msm_sdcc_devices[controller-1];
	pdev->dev.platform_data = plat;

	res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "status_irq");
	if (!res)
	return -EINVAL;
	else if (stat_irq) {
	res->start = res->end = stat_irq;
	res->flags &= ~IORESOURCE_DISABLED;
	res->flags \|= stat_irq_flags;
	}

	return platform_device_register(pdev);
	}

	static struct clk_pcom_desc msm_clocks_8x50[] = {
	CLK_PCOM("adm_clk", ADM_CLK, NULL, 0),
	CLK_PCOM("ce_clk", CE_CLK, NULL, 0),
	CLK_PCOM("ebi1_clk", EBI1_CLK, NULL, CLK_MIN),
	CLK_PCOM("ebi2_clk", EBI2_CLK, NULL, 0),
	CLK_PCOM("ecodec_clk", ECODEC_CLK, NULL, 0),
	CLK_PCOM("emdh_clk", EMDH_CLK, NULL, OFF \| CLK_MINMAX),
	CLK_PCOM("gp_clk", GP_CLK, NULL, 0),
	CLK_PCOM("grp_clk", GRP_3D_CLK, NULL, 0),
	CLK_PCOM("i2c_clk", I2C_CLK, NULL, 0),
	CLK_PCOM("icodec_rx_clk", ICODEC_RX_CLK, NULL, 0),
	CLK_PCOM("icodec_tx_clk", ICODEC_TX_CLK, NULL, 0),
	CLK_PCOM("imem_clk", IMEM_CLK, NULL, OFF),
	CLK_PCOM("mdc_clk", MDC_CLK, NULL, 0),
	CLK_PCOM("mddi_clk", PMDH_CLK, NULL, OFF \| CLK_MINMAX),
	CLK_PCOM("mdp_clk", MDP_CLK, NULL, OFF),
	CLK_PCOM("mdp_lcdc_pclk_clk", MDP_LCDC_PCLK_CLK, NULL, 0),
	CLK_PCOM("mdp_lcdc_pad_pclk_clk", MDP_LCDC_PAD_PCLK_CLK, NULL, 0),
	CLK_PCOM("mdp_vsync_clk", MDP_VSYNC_CLK, NULL, 0),
	CLK_PCOM("pbus_clk", PBUS_CLK, NULL, CLK_MIN),
	CLK_PCOM("pcm_clk", PCM_CLK, NULL, 0),
	CLK_PCOM("sdac_clk", SDAC_CLK, NULL, OFF),
	CLK_PCOM("sdc_clk", SDC1_CLK, "msm_sdcc.1", OFF),
	CLK_PCOM("sdc_pclk", SDC1_P_CLK, "msm_sdcc.1", OFF),
	CLK_PCOM("sdc_clk", SDC2_CLK, "msm_sdcc.2", OFF),
	CLK_PCOM("sdc_pclk", SDC2_P_CLK, "msm_sdcc.2", OFF),
	CLK_PCOM("sdc_clk", SDC3_CLK, "msm_sdcc.3", OFF),
	CLK_PCOM("sdc_pclk", SDC3_P_CLK, "msm_sdcc.3", OFF),
	CLK_PCOM("sdc_clk", SDC4_CLK, "msm_sdcc.4", OFF),
	CLK_PCOM("sdc_pclk", SDC4_P_CLK, "msm_sdcc.4", OFF),
	CLK_PCOM("spi_clk", SPI_CLK, NULL, 0),
	CLK_PCOM("tsif_clk", TSIF_CLK, NULL, 0),
	CLK_PCOM("tsif_ref_clk", TSIF_REF_CLK, NULL, 0),
	CLK_PCOM("tv_dac_clk", TV_DAC_CLK, NULL, 0),
	CLK_PCOM("tv_enc_clk", TV_ENC_CLK, NULL, 0),
	CLK_PCOM("uart_clk", UART1_CLK, NULL, OFF),
	CLK_PCOM("uart_clk", UART2_CLK, NULL, 0),
	CLK_PCOM("uart_clk", UART3_CLK, "msm_serial.2", OFF),
	CLK_PCOM("uartdm_clk", UART1DM_CLK, NULL, OFF),
	CLK_PCOM("uartdm_clk", UART2DM_CLK, NULL, 0),
	CLK_PCOM("usb_hs_clk", USB_HS_CLK, NULL, OFF),
	CLK_PCOM("usb_hs_pclk", USB_HS_P_CLK, NULL, OFF),
	CLK_PCOM("usb_otg_clk", USB_OTG_CLK, NULL, 0),
	CLK_PCOM("vdc_clk", VDC_CLK, NULL, OFF \| CLK_MIN),
	CLK_PCOM("vfe_clk", VFE_CLK, NULL, OFF),
	CLK_PCOM("vfe_mdc_clk", VFE_MDC_CLK, NULL, OFF),
	CLK_PCOM("vfe_axi_clk", VFE_AXI_CLK, NULL, OFF),
	CLK_PCOM("usb_hs2_clk", USB_HS2_CLK, NULL, OFF),
	CLK_PCOM("usb_hs2_pclk", USB_HS2_P_CLK, NULL, OFF),
	CLK_PCOM("usb_hs3_clk", USB_HS3_CLK, NULL, OFF),
	CLK_PCOM("usb_hs3_pclk", USB_HS3_P_CLK, NULL, OFF),
	CLK_PCOM("usb_phy_clk", USB_PHY_CLK, NULL, 0),
	};

	static struct pcom_clk_pdata msm_clock_8x50_pdata = {
	.lookup = msm_clocks_8x50,
	.num_lookups = ARRAY_SIZE(msm_clocks_8x50),
	};

	struct platform_device msm_clock_8x50 = {
	.name = "msm-clock-pcom",
	.dev.platform_data = &msm_clock_8x50_pdata,
	};