| /* |
| * Copyright (C) 2005 SAN People |
| * Copyright (C) 2007 Atmel Corporation |
| * |
| * This file is subject to the terms and conditions of the GNU General Public |
| * License. See the file COPYING in the main directory of this archive for |
| * more details. |
| */ |
| |
| #include <linux/types.h> |
| #include <linux/init.h> |
| #include <linux/mm.h> |
| #include <linux/module.h> |
| #include <linux/platform_device.h> |
| #include <linux/spi/spi.h> |
| #include <linux/fb.h> |
| #include <linux/clk.h> |
| |
| #include <video/atmel_lcdc.h> |
| |
| #include <asm/hardware.h> |
| #include <asm/setup.h> |
| #include <asm/mach-types.h> |
| #include <asm/irq.h> |
| |
| #include <asm/mach/arch.h> |
| #include <asm/mach/map.h> |
| #include <asm/mach/irq.h> |
| |
| #include <asm/arch/board.h> |
| #include <asm/arch/gpio.h> |
| #include <asm/arch/at91sam9_smc.h> |
| |
| #include "generic.h" |
| |
| |
| static void __init ek_map_io(void) |
| { |
| /* Initialize processor: 12.000 MHz crystal */ |
| at91sam9rl_initialize(12000000); |
| |
| /* DGBU on ttyS0. (Rx & Tx only) */ |
| at91_register_uart(0, 0, 0); |
| |
| /* USART0 on ttyS1. (Rx, Tx, CTS, RTS) */ |
| at91_register_uart(AT91SAM9RL_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS); |
| |
| /* set serial console to ttyS0 (ie, DBGU) */ |
| at91_set_serial_console(0); |
| } |
| |
| static void __init ek_init_irq(void) |
| { |
| at91sam9rl_init_interrupts(NULL); |
| } |
| |
| |
| /* |
| * USB HS Device port |
| */ |
| static struct usba_platform_data __initdata ek_usba_udc_data = { |
| .vbus_pin = AT91_PIN_PA8, |
| }; |
| |
| |
| /* |
| * MCI (SD/MMC) |
| */ |
| static struct at91_mmc_data __initdata ek_mmc_data = { |
| .wire4 = 1, |
| .det_pin = AT91_PIN_PA15, |
| // .wp_pin = ... not connected |
| // .vcc_pin = ... not connected |
| }; |
| |
| |
| /* |
| * NAND flash |
| */ |
| static struct mtd_partition __initdata ek_nand_partition[] = { |
| { |
| .name = "Partition 1", |
| .offset = 0, |
| .size = 256 * 1024, |
| }, |
| { |
| .name = "Partition 2", |
| .offset = 256 * 1024 , |
| .size = MTDPART_SIZ_FULL, |
| }, |
| }; |
| |
| static struct mtd_partition * __init nand_partitions(int size, int *num_partitions) |
| { |
| *num_partitions = ARRAY_SIZE(ek_nand_partition); |
| return ek_nand_partition; |
| } |
| |
| static struct atmel_nand_data __initdata ek_nand_data = { |
| .ale = 21, |
| .cle = 22, |
| // .det_pin = ... not connected |
| .rdy_pin = AT91_PIN_PD17, |
| .enable_pin = AT91_PIN_PB6, |
| .partition_info = nand_partitions, |
| .bus_width_16 = 0, |
| }; |
| |
| |
| /* |
| * SPI devices |
| */ |
| static struct spi_board_info ek_spi_devices[] = { |
| { /* DataFlash chip */ |
| .modalias = "mtd_dataflash", |
| .chip_select = 0, |
| .max_speed_hz = 15 * 1000 * 1000, |
| .bus_num = 0, |
| }, |
| }; |
| |
| |
| /* |
| * LCD Controller |
| */ |
| #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE) |
| static struct fb_videomode at91_tft_vga_modes[] = { |
| { |
| .name = "TX09D50VM1CCA @ 60", |
| .refresh = 60, |
| .xres = 240, .yres = 320, |
| .pixclock = KHZ2PICOS(4965), |
| |
| .left_margin = 1, .right_margin = 33, |
| .upper_margin = 1, .lower_margin = 0, |
| .hsync_len = 5, .vsync_len = 1, |
| |
| .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, |
| .vmode = FB_VMODE_NONINTERLACED, |
| }, |
| }; |
| |
| static struct fb_monspecs at91fb_default_monspecs = { |
| .manufacturer = "HIT", |
| .monitor = "TX09D50VM1CCA", |
| |
| .modedb = at91_tft_vga_modes, |
| .modedb_len = ARRAY_SIZE(at91_tft_vga_modes), |
| .hfmin = 15000, |
| .hfmax = 64000, |
| .vfmin = 50, |
| .vfmax = 150, |
| }; |
| |
| #define AT91SAM9RL_DEFAULT_LCDCON2 (ATMEL_LCDC_MEMOR_LITTLE \ |
| | ATMEL_LCDC_DISTYPE_TFT \ |
| | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE) |
| |
| static void at91_lcdc_power_control(int on) |
| { |
| if (on) |
| at91_set_gpio_value(AT91_PIN_PA30, 0); /* power up */ |
| else |
| at91_set_gpio_value(AT91_PIN_PA30, 1); /* power down */ |
| } |
| |
| /* Driver datas */ |
| static struct atmel_lcdfb_info __initdata ek_lcdc_data = { |
| .default_bpp = 16, |
| .default_dmacon = ATMEL_LCDC_DMAEN, |
| .default_lcdcon2 = AT91SAM9RL_DEFAULT_LCDCON2, |
| .default_monspecs = &at91fb_default_monspecs, |
| .atmel_lcdfb_power_control = at91_lcdc_power_control, |
| .guard_time = 1, |
| }; |
| |
| #else |
| static struct atmel_lcdfb_info __initdata ek_lcdc_data; |
| #endif |
| |
| |
| static void __init ek_board_init(void) |
| { |
| /* Serial */ |
| at91_add_device_serial(); |
| /* USB HS */ |
| at91_add_device_usba(&ek_usba_udc_data); |
| /* I2C */ |
| at91_add_device_i2c(NULL, 0); |
| /* NAND */ |
| at91_add_device_nand(&ek_nand_data); |
| /* SPI */ |
| at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices)); |
| /* MMC */ |
| at91_add_device_mmc(0, &ek_mmc_data); |
| /* LCD Controller */ |
| at91_add_device_lcdc(&ek_lcdc_data); |
| } |
| |
| MACHINE_START(AT91SAM9RLEK, "Atmel AT91SAM9RL-EK") |
| /* Maintainer: Atmel */ |
| .phys_io = AT91_BASE_SYS, |
| .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, |
| .boot_params = AT91_SDRAM_BASE + 0x100, |
| .timer = &at91sam926x_timer, |
| .map_io = ek_map_io, |
| .init_irq = ek_init_irq, |
| .init_machine = ek_board_init, |
| MACHINE_END |