| /* |
| * QorIQ MPIC device tree stub [ controller @ offset 0x40000 ] |
| * |
| * Copyright 2011 Freescale Semiconductor Inc. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions are met: |
| * * Redistributions of source code must retain the above copyright |
| * notice, this list of conditions and the following disclaimer. |
| * * Redistributions in binary form must reproduce the above copyright |
| * notice, this list of conditions and the following disclaimer in the |
| * documentation and/or other materials provided with the distribution. |
| * * Neither the name of Freescale Semiconductor nor the |
| * names of its contributors may be used to endorse or promote products |
| * derived from this software without specific prior written permission. |
| * |
| * |
| * ALTERNATIVELY, this software may be distributed under the terms of the |
| * GNU General Public License ("GPL") as published by the Free Software |
| * Foundation, either version 2 of that License or (at your option) any |
| * later version. |
| * |
| * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY |
| * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
| * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY |
| * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
| * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
| * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND |
| * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
| * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| */ |
| |
| mpic: pic@40000 { |
| interrupt-controller; |
| #address-cells = <0>; |
| #interrupt-cells = <4>; |
| reg = <0x40000 0x40000>; |
| compatible = "fsl,mpic", "chrp,open-pic"; |
| device_type = "open-pic"; |
| clock-frequency = <0x0>; |
| }; |
| |
| timer@41100 { |
| compatible = "fsl,mpic-global-timer"; |
| reg = <0x41100 0x100 0x41300 4>; |
| interrupts = <0 0 3 0 |
| 1 0 3 0 |
| 2 0 3 0 |
| 3 0 3 0>; |
| }; |
| |
| msi0: msi@41600 { |
| compatible = "fsl,mpic-msi"; |
| reg = <0x41600 0x200 0x44140 4>; |
| msi-available-ranges = <0 0x100>; |
| interrupts = < |
| 0xe0 0 0 0 |
| 0xe1 0 0 0 |
| 0xe2 0 0 0 |
| 0xe3 0 0 0 |
| 0xe4 0 0 0 |
| 0xe5 0 0 0 |
| 0xe6 0 0 0 |
| 0xe7 0 0 0>; |
| }; |
| |
| msi1: msi@41800 { |
| compatible = "fsl,mpic-msi"; |
| reg = <0x41800 0x200 0x45140 4>; |
| msi-available-ranges = <0 0x100>; |
| interrupts = < |
| 0xe8 0 0 0 |
| 0xe9 0 0 0 |
| 0xea 0 0 0 |
| 0xeb 0 0 0 |
| 0xec 0 0 0 |
| 0xed 0 0 0 |
| 0xee 0 0 0 |
| 0xef 0 0 0>; |
| }; |
| |
| msi2: msi@41a00 { |
| compatible = "fsl,mpic-msi"; |
| reg = <0x41a00 0x200 0x46140 4>; |
| msi-available-ranges = <0 0x100>; |
| interrupts = < |
| 0xf0 0 0 0 |
| 0xf1 0 0 0 |
| 0xf2 0 0 0 |
| 0xf3 0 0 0 |
| 0xf4 0 0 0 |
| 0xf5 0 0 0 |
| 0xf6 0 0 0 |
| 0xf7 0 0 0>; |
| }; |
| |
| timer@42100 { |
| compatible = "fsl,mpic-global-timer"; |
| reg = <0x42100 0x100 0x42300 4>; |
| interrupts = <4 0 3 0 |
| 5 0 3 0 |
| 6 0 3 0 |
| 7 0 3 0>; |
| }; |
