| /dts-v1/; |
| |
| #include "tegra20.dtsi" |
| |
| / { |
| model = "NVIDIA Seaboard"; |
| compatible = "nvidia,seaboard", "nvidia,tegra20"; |
| |
| memory { |
| reg = <0x00000000 0x40000000>; |
| }; |
| |
| host1x { |
| hdmi { |
| status = "okay"; |
| |
| vdd-supply = <&hdmi_vdd_reg>; |
| pll-supply = <&hdmi_pll_reg>; |
| |
| nvidia,ddc-i2c-bus = <&hdmi_ddc>; |
| nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7) |
| GPIO_ACTIVE_HIGH>; |
| }; |
| }; |
| |
| pinmux { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&state_default>; |
| |
| state_default: pinmux { |
| ata { |
| nvidia,pins = "ata"; |
| nvidia,function = "ide"; |
| }; |
| atb { |
| nvidia,pins = "atb", "gma", "gme"; |
| nvidia,function = "sdio4"; |
| }; |
| atc { |
| nvidia,pins = "atc"; |
| nvidia,function = "nand"; |
| }; |
| atd { |
| nvidia,pins = "atd", "ate", "gmb", "spia", |
| "spib", "spic"; |
| nvidia,function = "gmi"; |
| }; |
| cdev1 { |
| nvidia,pins = "cdev1"; |
| nvidia,function = "plla_out"; |
| }; |
| cdev2 { |
| nvidia,pins = "cdev2"; |
| nvidia,function = "pllp_out4"; |
| }; |
| crtp { |
| nvidia,pins = "crtp", "lm1"; |
| nvidia,function = "crt"; |
| }; |
| csus { |
| nvidia,pins = "csus"; |
| nvidia,function = "vi_sensor_clk"; |
| }; |
| dap1 { |
| nvidia,pins = "dap1"; |
| nvidia,function = "dap1"; |
| }; |
| dap2 { |
| nvidia,pins = "dap2"; |
| nvidia,function = "dap2"; |
| }; |
| dap3 { |
| nvidia,pins = "dap3"; |
| nvidia,function = "dap3"; |
| }; |
| dap4 { |
| nvidia,pins = "dap4"; |
| nvidia,function = "dap4"; |
| }; |
| dta { |
| nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte"; |
| nvidia,function = "vi"; |
| }; |
| dtf { |
| nvidia,pins = "dtf"; |
| nvidia,function = "i2c3"; |
| }; |
| gmc { |
| nvidia,pins = "gmc"; |
| nvidia,function = "uartd"; |
| }; |
| gmd { |
| nvidia,pins = "gmd"; |
| nvidia,function = "sflash"; |
| }; |
| gpu { |
| nvidia,pins = "gpu"; |
| nvidia,function = "pwm"; |
| }; |
| gpu7 { |
| nvidia,pins = "gpu7"; |
| nvidia,function = "rtck"; |
| }; |
| gpv { |
| nvidia,pins = "gpv", "slxa", "slxk"; |
| nvidia,function = "pcie"; |
| }; |
| hdint { |
| nvidia,pins = "hdint", "lpw0", "lpw2", "lsc1", |
| "lsck", "lsda"; |
| nvidia,function = "hdmi"; |
| }; |
| i2cp { |
| nvidia,pins = "i2cp"; |
| nvidia,function = "i2cp"; |
| }; |
| irrx { |
| nvidia,pins = "irrx", "irtx"; |
| nvidia,function = "uartb"; |
| }; |
| kbca { |
| nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd", |
| "kbce", "kbcf"; |
| nvidia,function = "kbc"; |
| }; |
| lcsn { |
| nvidia,pins = "lcsn", "ldc", "lm0", "lpw1", |
| "lsdi", "lvp0"; |
| nvidia,function = "rsvd4"; |
| }; |
| ld0 { |
| nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4", |
| "ld5", "ld6", "ld7", "ld8", "ld9", |
| "ld10", "ld11", "ld12", "ld13", "ld14", |
| "ld15", "ld16", "ld17", "ldi", "lhp0", |
| "lhp1", "lhp2", "lhs", "lpp", "lsc0", |
| "lspi", "lvp1", "lvs"; |
| nvidia,function = "displaya"; |
| }; |
| owc { |
| nvidia,pins = "owc", "spdi", "spdo", "uac"; |
| nvidia,function = "rsvd2"; |
| }; |
| pmc { |
| nvidia,pins = "pmc"; |
| nvidia,function = "pwr_on"; |
| }; |
| rm { |
| nvidia,pins = "rm"; |
| nvidia,function = "i2c1"; |
| }; |
| sdb { |
| nvidia,pins = "sdb", "sdc", "sdd"; |
| nvidia,function = "sdio3"; |
| }; |
| sdio1 { |
| nvidia,pins = "sdio1"; |
| nvidia,function = "sdio1"; |
| }; |
| slxc { |
| nvidia,pins = "slxc", "slxd"; |
| nvidia,function = "spdif"; |
| }; |
| spid { |
| nvidia,pins = "spid", "spie", "spif"; |
| nvidia,function = "spi1"; |
| }; |
| spig { |
| nvidia,pins = "spig", "spih"; |
| nvidia,function = "spi2_alt"; |
| }; |
| uaa { |
| nvidia,pins = "uaa", "uab", "uda"; |
| nvidia,function = "ulpi"; |
| }; |
| uad { |
| nvidia,pins = "uad"; |
| nvidia,function = "irda"; |
| }; |
| uca { |
| nvidia,pins = "uca", "ucb"; |
| nvidia,function = "uartc"; |
| }; |
| conf_ata { |
| nvidia,pins = "ata", "atb", "atc", "atd", |
| "cdev1", "cdev2", "dap1", "dap2", |
| "dap4", "ddc", "dtf", "gma", "gmc", "gmd", |
| "gme", "gpu", "gpu7", "i2cp", "irrx", |
| "irtx", "pta", "rm", "sdc", "sdd", |
| "slxd", "slxk", "spdi", "spdo", "uac", |
| "uad", "uca", "ucb", "uda"; |
| nvidia,pull = <0>; |
| nvidia,tristate = <0>; |
| }; |
| conf_ate { |
| nvidia,pins = "ate", "csus", "dap3", |
| "gpv", "owc", "slxc", "spib", "spid", |
| "spie"; |
| nvidia,pull = <0>; |
| nvidia,tristate = <1>; |
| }; |
| conf_ck32 { |
| nvidia,pins = "ck32", "ddrc", "pmca", "pmcb", |
| "pmcc", "pmcd", "pmce", "xm2c", "xm2d"; |
| nvidia,pull = <0>; |
| }; |
| conf_crtp { |
| nvidia,pins = "crtp", "gmb", "slxa", "spia", |
| "spig", "spih"; |
| nvidia,pull = <2>; |
| nvidia,tristate = <1>; |
| }; |
| conf_dta { |
| nvidia,pins = "dta", "dtb", "dtc", "dtd"; |
| nvidia,pull = <1>; |
| nvidia,tristate = <0>; |
| }; |
| conf_dte { |
| nvidia,pins = "dte", "spif"; |
| nvidia,pull = <1>; |
| nvidia,tristate = <1>; |
| }; |
| conf_hdint { |
| nvidia,pins = "hdint", "lcsn", "ldc", "lm1", |
| "lpw1", "lsc1", "lsck", "lsda", "lsdi", |
| "lvp0"; |
| nvidia,tristate = <1>; |
| }; |
| conf_kbca { |
| nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd", |
| "kbce", "kbcf", "sdio1", "spic", "uaa", |
| "uab"; |
| nvidia,pull = <2>; |
| nvidia,tristate = <0>; |
| }; |
| conf_lc { |
| nvidia,pins = "lc", "ls"; |
| nvidia,pull = <2>; |
| }; |
| conf_ld0 { |
| nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4", |
| "ld5", "ld6", "ld7", "ld8", "ld9", |
| "ld10", "ld11", "ld12", "ld13", "ld14", |
| "ld15", "ld16", "ld17", "ldi", "lhp0", |
| "lhp1", "lhp2", "lhs", "lm0", "lpp", |
| "lpw0", "lpw2", "lsc0", "lspi", "lvp1", |
| "lvs", "pmc", "sdb"; |
| nvidia,tristate = <0>; |
| }; |
| conf_ld17_0 { |
| nvidia,pins = "ld17_0", "ld19_18", "ld21_20", |
| "ld23_22"; |
| nvidia,pull = <1>; |
| }; |
| drive_sdio1 { |
| nvidia,pins = "drive_sdio1"; |
| nvidia,high-speed-mode = <0>; |
| nvidia,schmitt = <0>; |
| nvidia,low-power-mode = <3>; |
| nvidia,pull-down-strength = <31>; |
| nvidia,pull-up-strength = <31>; |
| nvidia,slew-rate-rising = <3>; |
| nvidia,slew-rate-falling = <3>; |
| }; |
| }; |
| |
| state_i2cmux_ddc: pinmux_i2cmux_ddc { |
| ddc { |
| nvidia,pins = "ddc"; |
| nvidia,function = "i2c2"; |
| }; |
| pta { |
| nvidia,pins = "pta"; |
| nvidia,function = "rsvd4"; |
| }; |
| }; |
| |
| state_i2cmux_pta: pinmux_i2cmux_pta { |
| ddc { |
| nvidia,pins = "ddc"; |
| nvidia,function = "rsvd4"; |
| }; |
| pta { |
| nvidia,pins = "pta"; |
| nvidia,function = "i2c2"; |
| }; |
| }; |
| |
| state_i2cmux_idle: pinmux_i2cmux_idle { |
| ddc { |
| nvidia,pins = "ddc"; |
| nvidia,function = "rsvd4"; |
| }; |
| pta { |
| nvidia,pins = "pta"; |
| nvidia,function = "rsvd4"; |
| }; |
| }; |
| }; |
| |
| i2s@70002800 { |
| status = "okay"; |
| }; |
| |
| serial@70006300 { |
| status = "okay"; |
| }; |
| |
| i2c@7000c000 { |
| status = "okay"; |
| clock-frequency = <400000>; |
| |
| wm8903: wm8903@1a { |
| compatible = "wlf,wm8903"; |
| reg = <0x1a>; |
| interrupt-parent = <&gpio>; |
| interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>; |
| |
| gpio-controller; |
| #gpio-cells = <2>; |
| |
| micdet-cfg = <0>; |
| micdet-delay = <100>; |
| gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>; |
| }; |
| |
| /* ALS and proximity sensor */ |
| isl29018@44 { |
| compatible = "isil,isl29018"; |
| reg = <0x44>; |
| interrupt-parent = <&gpio>; |
| interrupts = <TEGRA_GPIO(Z, 2) IRQ_TYPE_LEVEL_HIGH>; |
| }; |
| |
| gyrometer@68 { |
| compatible = "invn,mpu3050"; |
| reg = <0x68>; |
| interrupt-parent = <&gpio>; |
| interrupts = <TEGRA_GPIO(Z, 4) IRQ_TYPE_LEVEL_HIGH>; |
| }; |
| }; |
| |
| i2c@7000c400 { |
| status = "okay"; |
| clock-frequency = <100000>; |
| }; |
| |
| i2cmux { |
| compatible = "i2c-mux-pinctrl"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| i2c-parent = <&{/i2c@7000c400}>; |
| |
| pinctrl-names = "ddc", "pta", "idle"; |
| pinctrl-0 = <&state_i2cmux_ddc>; |
| pinctrl-1 = <&state_i2cmux_pta>; |
| pinctrl-2 = <&state_i2cmux_idle>; |
| |
| hdmi_ddc: i2c@0 { |
| reg = <0>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| }; |
| |
| i2c@1 { |
| reg = <1>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| smart-battery@b { |
| compatible = "ti,bq20z75", "smart-battery-1.1"; |
| reg = <0xb>; |
| ti,i2c-retry-count = <2>; |
| ti,poll-retry-count = <10>; |
| }; |
| }; |
| }; |
| |
| i2c@7000c500 { |
| status = "okay"; |
| clock-frequency = <400000>; |
| }; |
| |
| i2c@7000d000 { |
| status = "okay"; |
| clock-frequency = <400000>; |
| |
| pmic: tps6586x@34 { |
| compatible = "ti,tps6586x"; |
| reg = <0x34>; |
| interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; |
| |
| ti,system-power-controller; |
| |
| #gpio-cells = <2>; |
| gpio-controller; |
| |
| sys-supply = <&vdd_5v0_reg>; |
| vin-sm0-supply = <&sys_reg>; |
| vin-sm1-supply = <&sys_reg>; |
| vin-sm2-supply = <&sys_reg>; |
| vinldo01-supply = <&sm2_reg>; |
| vinldo23-supply = <&sm2_reg>; |
| vinldo4-supply = <&sm2_reg>; |
| vinldo678-supply = <&sm2_reg>; |
| vinldo9-supply = <&sm2_reg>; |
| |
| regulators { |
| sys_reg: sys { |
| regulator-name = "vdd_sys"; |
| regulator-always-on; |
| }; |
| |
| sm0 { |
| regulator-name = "vdd_sm0,vdd_core"; |
| regulator-min-microvolt = <1300000>; |
| regulator-max-microvolt = <1300000>; |
| regulator-always-on; |
| }; |
| |
| sm1 { |
| regulator-name = "vdd_sm1,vdd_cpu"; |
| regulator-min-microvolt = <1125000>; |
| regulator-max-microvolt = <1125000>; |
| regulator-always-on; |
| }; |
| |
| sm2_reg: sm2 { |
| regulator-name = "vdd_sm2,vin_ldo*"; |
| regulator-min-microvolt = <3700000>; |
| regulator-max-microvolt = <3700000>; |
| regulator-always-on; |
| }; |
| |
| /* LDO0 is not connected to anything */ |
| |
| ldo1 { |
| regulator-name = "vdd_ldo1,avdd_pll*"; |
| regulator-min-microvolt = <1100000>; |
| regulator-max-microvolt = <1100000>; |
| regulator-always-on; |
| }; |
| |
| ldo2 { |
| regulator-name = "vdd_ldo2,vdd_rtc"; |
| regulator-min-microvolt = <1200000>; |
| regulator-max-microvolt = <1200000>; |
| }; |
| |
| ldo3 { |
| regulator-name = "vdd_ldo3,avdd_usb*"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| regulator-always-on; |
| }; |
| |
| ldo4 { |
| regulator-name = "vdd_ldo4,avdd_osc,vddio_sys"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| regulator-always-on; |
| }; |
| |
| ldo5 { |
| regulator-name = "vdd_ldo5,vcore_mmc"; |
| regulator-min-microvolt = <2850000>; |
| regulator-max-microvolt = <2850000>; |
| regulator-always-on; |
| }; |
| |
| ldo6 { |
| regulator-name = "vdd_ldo6,avdd_vdac,vddio_vi,vddio_cam"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| }; |
| |
| hdmi_vdd_reg: ldo7 { |
| regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| }; |
| |
| hdmi_pll_reg: ldo8 { |
| regulator-name = "vdd_ldo8,avdd_hdmi_pll"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| }; |
| |
| ldo9 { |
| regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx"; |
| regulator-min-microvolt = <2850000>; |
| regulator-max-microvolt = <2850000>; |
| regulator-always-on; |
| }; |
| |
| ldo_rtc { |
| regulator-name = "vdd_rtc_out,vdd_cell"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| regulator-always-on; |
| }; |
| }; |
| }; |
| |
| temperature-sensor@4c { |
| compatible = "onnn,nct1008"; |
| reg = <0x4c>; |
| }; |
| |
| magnetometer@c { |
| compatible = "ak,ak8975"; |
| reg = <0xc>; |
| interrupt-parent = <&gpio>; |
| interrupts = <TEGRA_GPIO(N, 5) IRQ_TYPE_LEVEL_HIGH>; |
| }; |
| }; |
| |
| pmc { |
| nvidia,invert-interrupt; |
| nvidia,suspend-mode = <2>; |
| nvidia,cpu-pwr-good-time = <5000>; |
| nvidia,cpu-pwr-off-time = <5000>; |
| nvidia,core-pwr-good-time = <3845 3845>; |
| nvidia,core-pwr-off-time = <3875>; |
| nvidia,sys-clock-req-active-high; |
| }; |
| |
| memory-controller@7000f400 { |
| emc-table@190000 { |
| reg = <190000>; |
| compatible = "nvidia,tegra20-emc-table"; |
| clock-frequency = <190000>; |
| nvidia,emc-registers = <0x0000000c 0x00000026 |
| 0x00000009 0x00000003 0x00000004 0x00000004 |
| 0x00000002 0x0000000c 0x00000003 0x00000003 |
| 0x00000002 0x00000001 0x00000004 0x00000005 |
| 0x00000004 0x00000009 0x0000000d 0x0000059f |
| 0x00000000 0x00000003 0x00000003 0x00000003 |
| 0x00000003 0x00000001 0x0000000b 0x000000c8 |
| 0x00000003 0x00000007 0x00000004 0x0000000f |
| 0x00000002 0x00000000 0x00000000 0x00000002 |
| 0x00000000 0x00000000 0x00000083 0xa06204ae |
| 0x007dc010 0x00000000 0x00000000 0x00000000 |
| 0x00000000 0x00000000 0x00000000 0x00000000>; |
| }; |
| |
| emc-table@380000 { |
| reg = <380000>; |
| compatible = "nvidia,tegra20-emc-table"; |
| clock-frequency = <380000>; |
| nvidia,emc-registers = <0x00000017 0x0000004b |
| 0x00000012 0x00000006 0x00000004 0x00000005 |
| 0x00000003 0x0000000c 0x00000006 0x00000006 |
| 0x00000003 0x00000001 0x00000004 0x00000005 |
| 0x00000004 0x00000009 0x0000000d 0x00000b5f |
| 0x00000000 0x00000003 0x00000003 0x00000006 |
| 0x00000006 0x00000001 0x00000011 0x000000c8 |
| 0x00000003 0x0000000e 0x00000007 0x0000000f |
| 0x00000002 0x00000000 0x00000000 0x00000002 |
| 0x00000000 0x00000000 0x00000083 0xe044048b |
| 0x007d8010 0x00000000 0x00000000 0x00000000 |
| 0x00000000 0x00000000 0x00000000 0x00000000>; |
| }; |
| }; |
| |
| usb@c5000000 { |
| status = "okay"; |
| nvidia,vbus-gpio = <&gpio TEGRA_GPIO(D, 0) GPIO_ACTIVE_HIGH>; |
| dr_mode = "otg"; |
| }; |
| |
| usb-phy@c5000000 { |
| status = "okay"; |
| vbus-supply = <&vbus_reg>; |
| dr_mode = "otg"; |
| }; |
| |
| usb@c5004000 { |
| status = "okay"; |
| nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1) |
| GPIO_ACTIVE_LOW>; |
| }; |
| |
| usb-phy@c5004000 { |
| status = "okay"; |
| nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1) |
| GPIO_ACTIVE_LOW>; |
| }; |
| |
| usb@c5008000 { |
| status = "okay"; |
| }; |
| |
| usb-phy@c5008000 { |
| status = "okay"; |
| }; |
| |
| sdhci@c8000000 { |
| status = "okay"; |
| power-gpios = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>; |
| bus-width = <4>; |
| keep-power-in-suspend; |
| }; |
| |
| sdhci@c8000400 { |
| status = "okay"; |
| cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>; |
| wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>; |
| power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>; |
| bus-width = <4>; |
| }; |
| |
| sdhci@c8000600 { |
| status = "okay"; |
| bus-width = <8>; |
| non-removable; |
| }; |
| |
| clocks { |
| compatible = "simple-bus"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| clk32k_in: clock { |
| compatible = "fixed-clock"; |
| reg=<0>; |
| #clock-cells = <0>; |
| clock-frequency = <32768>; |
| }; |
| }; |
| |
| gpio-keys { |
| compatible = "gpio-keys"; |
| |
| power { |
| label = "Power"; |
| gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>; |
| linux,code = <116>; /* KEY_POWER */ |
| gpio-key,wakeup; |
| }; |
| |
| lid { |
| label = "Lid"; |
| gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_HIGH>; |
| linux,input-type = <5>; /* EV_SW */ |
| linux,code = <0>; /* SW_LID */ |
| debounce-interval = <1>; |
| gpio-key,wakeup; |
| }; |
| }; |
| |
| kbc { |
| status = "okay"; |
| nvidia,debounce-delay-ms = <32>; |
| nvidia,repeat-delay-ms = <160>; |
| nvidia,ghost-filter; |
| nvidia,kbc-row-pins = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15>; |
| nvidia,kbc-col-pins = <16 17 18 19 20 21 22 23>; |
| linux,keymap = <0x00020011 /* KEY_W */ |
| 0x0003001F /* KEY_S */ |
| 0x0004001E /* KEY_A */ |
| 0x0005002C /* KEY_Z */ |
| 0x000701d0 /* KEY_FN */ |
| |
| 0x0107007D /* KEY_LEFTMETA */ |
| 0x02060064 /* KEY_RIGHTALT */ |
| 0x02070038 /* KEY_LEFTALT */ |
| |
| 0x03000006 /* KEY_5 */ |
| 0x03010005 /* KEY_4 */ |
| 0x03020013 /* KEY_R */ |
| 0x03030012 /* KEY_E */ |
| 0x03040021 /* KEY_F */ |
| 0x03050020 /* KEY_D */ |
| 0x0306002D /* KEY_X */ |
| |
| 0x04000008 /* KEY_7 */ |
| 0x04010007 /* KEY_6 */ |
| 0x04020014 /* KEY_T */ |
| 0x04030023 /* KEY_H */ |
| 0x04040022 /* KEY_G */ |
| 0x0405002F /* KEY_V */ |
| 0x0406002E /* KEY_C */ |
| 0x04070039 /* KEY_SPACE */ |
| |
| 0x0500000A /* KEY_9 */ |
| 0x05010009 /* KEY_8 */ |
| 0x05020016 /* KEY_U */ |
| 0x05030015 /* KEY_Y */ |
| 0x05040024 /* KEY_J */ |
| 0x05050031 /* KEY_N */ |
| 0x05060030 /* KEY_B */ |
| 0x0507002B /* KEY_BACKSLASH */ |
| |
| 0x0600000C /* KEY_MINUS */ |
| 0x0601000B /* KEY_0 */ |
| 0x06020018 /* KEY_O */ |
| 0x06030017 /* KEY_I */ |
| 0x06040026 /* KEY_L */ |
| 0x06050025 /* KEY_K */ |
| 0x06060033 /* KEY_COMMA */ |
| 0x06070032 /* KEY_M */ |
| |
| 0x0701000D /* KEY_EQUAL */ |
| 0x0702001B /* KEY_RIGHTBRACE */ |
| 0x0703001C /* KEY_ENTER */ |
| 0x0707008B /* KEY_MENU */ |
| |
| 0x08040036 /* KEY_RIGHTSHIFT */ |
| 0x0805002A /* KEY_LEFTSHIFT */ |
| |
| 0x09050061 /* KEY_RIGHTCTRL */ |
| 0x0907001D /* KEY_LEFTCTRL */ |
| |
| 0x0B00001A /* KEY_LEFTBRACE */ |
| 0x0B010019 /* KEY_P */ |
| 0x0B020028 /* KEY_APOSTROPHE */ |
| 0x0B030027 /* KEY_SEMICOLON */ |
| 0x0B040035 /* KEY_SLASH */ |
| 0x0B050034 /* KEY_DOT */ |
| |
| 0x0C000044 /* KEY_F10 */ |
| 0x0C010043 /* KEY_F9 */ |
| 0x0C02000E /* KEY_BACKSPACE */ |
| 0x0C030004 /* KEY_3 */ |
| 0x0C040003 /* KEY_2 */ |
| 0x0C050067 /* KEY_UP */ |
| 0x0C0600D2 /* KEY_PRINT */ |
| 0x0C070077 /* KEY_PAUSE */ |
| |
| 0x0D00006E /* KEY_INSERT */ |
| 0x0D01006F /* KEY_DELETE */ |
| 0x0D030068 /* KEY_PAGEUP */ |
| 0x0D04006D /* KEY_PAGEDOWN */ |
| 0x0D05006A /* KEY_RIGHT */ |
| 0x0D06006C /* KEY_DOWN */ |
| 0x0D070069 /* KEY_LEFT */ |
| |
| 0x0E000057 /* KEY_F11 */ |
| 0x0E010058 /* KEY_F12 */ |
| 0x0E020042 /* KEY_F8 */ |
| 0x0E030010 /* KEY_Q */ |
| 0x0E04003E /* KEY_F4 */ |
| 0x0E05003D /* KEY_F3 */ |
| 0x0E060002 /* KEY_1 */ |
| 0x0E070041 /* KEY_F7 */ |
| |
| 0x0F000001 /* KEY_ESC */ |
| 0x0F010029 /* KEY_GRAVE */ |
| 0x0F02003F /* KEY_F5 */ |
| 0x0F03000F /* KEY_TAB */ |
| 0x0F04003B /* KEY_F1 */ |
| 0x0F05003C /* KEY_F2 */ |
| 0x0F06003A /* KEY_CAPSLOCK */ |
| 0x0F070040 /* KEY_F6 */ |
| |
| /* Software Handled Function Keys */ |
| 0x14000047 /* KEY_KP7 */ |
| |
| 0x15000049 /* KEY_KP9 */ |
| 0x15010048 /* KEY_KP8 */ |
| 0x1502004B /* KEY_KP4 */ |
| 0x1504004F /* KEY_KP1 */ |
| |
| 0x1601004E /* KEY_KPSLASH */ |
| 0x1602004D /* KEY_KP6 */ |
| 0x1603004C /* KEY_KP5 */ |
| 0x16040051 /* KEY_KP3 */ |
| 0x16050050 /* KEY_KP2 */ |
| 0x16070052 /* KEY_KP0 */ |
| |
| 0x1B010037 /* KEY_KPASTERISK */ |
| 0x1B03004A /* KEY_KPMINUS */ |
| 0x1B04004E /* KEY_KPPLUS */ |
| 0x1B050053 /* KEY_KPDOT */ |
| |
| 0x1C050073 /* KEY_VOLUMEUP */ |
| |
| 0x1D030066 /* KEY_HOME */ |
| 0x1D04006B /* KEY_END */ |
| 0x1D0500E0 /* KEY_BRIGHTNESSDOWN */ |
| 0x1D060072 /* KEY_VOLUMEDOWN */ |
| 0x1D0700E1 /* KEY_BRIGHTNESSUP */ |
| |
| 0x1E000045 /* KEY_NUMLOCK */ |
| 0x1E010046 /* KEY_SCROLLLOCK */ |
| 0x1E020071 /* KEY_MUTE */ |
| |
| 0x1F04008A>; /* KEY_HELP */ |
| }; |
| regulators { |
| compatible = "simple-bus"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| vdd_5v0_reg: regulator@0 { |
| compatible = "regulator-fixed"; |
| reg = <0>; |
| regulator-name = "vdd_5v0"; |
| regulator-min-microvolt = <5000000>; |
| regulator-max-microvolt = <5000000>; |
| regulator-always-on; |
| }; |
| |
| regulator@1 { |
| compatible = "regulator-fixed"; |
| reg = <1>; |
| regulator-name = "vdd_1v5"; |
| regulator-min-microvolt = <1500000>; |
| regulator-max-microvolt = <1500000>; |
| gpio = <&pmic 0 GPIO_ACTIVE_HIGH>; |
| }; |
| |
| regulator@2 { |
| compatible = "regulator-fixed"; |
| reg = <2>; |
| regulator-name = "vdd_1v2"; |
| regulator-min-microvolt = <1200000>; |
| regulator-max-microvolt = <1200000>; |
| gpio = <&pmic 1 GPIO_ACTIVE_HIGH>; |
| enable-active-high; |
| }; |
| |
| vbus_reg: regulator@3 { |
| compatible = "regulator-fixed"; |
| reg = <3>; |
| regulator-name = "vdd_vbus_wup1"; |
| regulator-min-microvolt = <5000000>; |
| regulator-max-microvolt = <5000000>; |
| gpio = <&gpio 24 0>; /* PD0 */ |
| }; |
| }; |
| |
| sound { |
| compatible = "nvidia,tegra-audio-wm8903-seaboard", |
| "nvidia,tegra-audio-wm8903"; |
| nvidia,model = "NVIDIA Tegra Seaboard"; |
| |
| nvidia,audio-routing = |
| "Headphone Jack", "HPOUTR", |
| "Headphone Jack", "HPOUTL", |
| "Int Spk", "ROP", |
| "Int Spk", "RON", |
| "Int Spk", "LOP", |
| "Int Spk", "LON", |
| "Mic Jack", "MICBIAS", |
| "IN1R", "Mic Jack"; |
| |
| nvidia,i2s-controller = <&tegra_i2s1>; |
| nvidia,audio-codec = <&wm8903>; |
| |
| nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>; |
| nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(X, 1) GPIO_ACTIVE_HIGH>; |
| |
| clocks = <&tegra_car TEGRA20_CLK_PLL_A>, |
| <&tegra_car TEGRA20_CLK_PLL_A_OUT0>, |
| <&tegra_car TEGRA20_CLK_CDEV1>; |
| clock-names = "pll_a", "pll_a_out0", "mclk"; |
| }; |
| }; |
