| #include "tegra20.dtsi" |
| |
| / { |
| model = "Avionic Design Tamonten SOM"; |
| compatible = "ad,tamonten", "nvidia,tegra20"; |
| |
| aliases { |
| rtc0 = "/i2c@7000d000/tps6586x@34"; |
| rtc1 = "/rtc@7000e000"; |
| }; |
| |
| memory { |
| reg = <0x00000000 0x20000000>; |
| }; |
| |
| host1x@50000000 { |
| hdmi@54280000 { |
| vdd-supply = <&hdmi_vdd_reg>; |
| pll-supply = <&hdmi_pll_reg>; |
| |
| nvidia,ddc-i2c-bus = <&hdmi_ddc>; |
| nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7) |
| GPIO_ACTIVE_HIGH>; |
| }; |
| }; |
| |
| pinmux@70000014 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&state_default>; |
| |
| state_default: pinmux { |
| ata { |
| nvidia,pins = "ata"; |
| nvidia,function = "ide"; |
| }; |
| atb { |
| nvidia,pins = "atb", "gma", "gme"; |
| nvidia,function = "sdio4"; |
| }; |
| atc { |
| nvidia,pins = "atc"; |
| nvidia,function = "nand"; |
| }; |
| atd { |
| nvidia,pins = "atd", "ate", "gmb", "gmd", "gpu", |
| "spia", "spib", "spic"; |
| nvidia,function = "gmi"; |
| }; |
| cdev1 { |
| nvidia,pins = "cdev1"; |
| nvidia,function = "plla_out"; |
| }; |
| cdev2 { |
| nvidia,pins = "cdev2"; |
| nvidia,function = "pllp_out4"; |
| }; |
| crtp { |
| nvidia,pins = "crtp"; |
| nvidia,function = "crt"; |
| }; |
| csus { |
| nvidia,pins = "csus"; |
| nvidia,function = "vi_sensor_clk"; |
| }; |
| dap1 { |
| nvidia,pins = "dap1"; |
| nvidia,function = "dap1"; |
| }; |
| dap2 { |
| nvidia,pins = "dap2"; |
| nvidia,function = "dap2"; |
| }; |
| dap3 { |
| nvidia,pins = "dap3"; |
| nvidia,function = "dap3"; |
| }; |
| dap4 { |
| nvidia,pins = "dap4"; |
| nvidia,function = "dap4"; |
| }; |
| dta { |
| nvidia,pins = "dta", "dtd"; |
| nvidia,function = "sdio2"; |
| }; |
| dtb { |
| nvidia,pins = "dtb", "dtc", "dte"; |
| nvidia,function = "rsvd1"; |
| }; |
| dtf { |
| nvidia,pins = "dtf"; |
| nvidia,function = "i2c3"; |
| }; |
| gmc { |
| nvidia,pins = "gmc"; |
| nvidia,function = "uartd"; |
| }; |
| gpu7 { |
| nvidia,pins = "gpu7"; |
| nvidia,function = "rtck"; |
| }; |
| gpv { |
| nvidia,pins = "gpv", "slxa", "slxk"; |
| nvidia,function = "pcie"; |
| }; |
| hdint { |
| nvidia,pins = "hdint"; |
| nvidia,function = "hdmi"; |
| }; |
| i2cp { |
| nvidia,pins = "i2cp"; |
| nvidia,function = "i2cp"; |
| }; |
| irrx { |
| nvidia,pins = "irrx", "irtx"; |
| nvidia,function = "uarta"; |
| }; |
| kbca { |
| nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd", |
| "kbce", "kbcf"; |
| nvidia,function = "kbc"; |
| }; |
| lcsn { |
| nvidia,pins = "lcsn", "ld0", "ld1", "ld2", |
| "ld3", "ld4", "ld5", "ld6", "ld7", |
| "ld8", "ld9", "ld10", "ld11", "ld12", |
| "ld13", "ld14", "ld15", "ld16", "ld17", |
| "ldc", "ldi", "lhp0", "lhp1", "lhp2", |
| "lhs", "lm0", "lm1", "lpp", "lpw0", |
| "lpw1", "lpw2", "lsc0", "lsc1", "lsck", |
| "lsda", "lsdi", "lspi", "lvp0", "lvp1", |
| "lvs"; |
| nvidia,function = "displaya"; |
| }; |
| owc { |
| nvidia,pins = "owc", "spdi", "spdo", "uac"; |
| nvidia,function = "rsvd2"; |
| }; |
| pmc { |
| nvidia,pins = "pmc"; |
| nvidia,function = "pwr_on"; |
| }; |
| rm { |
| nvidia,pins = "rm"; |
| nvidia,function = "i2c1"; |
| }; |
| sdb { |
| nvidia,pins = "sdb", "sdc", "sdd"; |
| nvidia,function = "pwm"; |
| }; |
| sdio1 { |
| nvidia,pins = "sdio1"; |
| nvidia,function = "sdio1"; |
| }; |
| slxc { |
| nvidia,pins = "slxc", "slxd"; |
| nvidia,function = "spdif"; |
| }; |
| spid { |
| nvidia,pins = "spid", "spie", "spif"; |
| nvidia,function = "spi1"; |
| }; |
| spig { |
| nvidia,pins = "spig", "spih"; |
| nvidia,function = "spi2_alt"; |
| }; |
| uaa { |
| nvidia,pins = "uaa", "uab", "uda"; |
| nvidia,function = "ulpi"; |
| }; |
| uad { |
| nvidia,pins = "uad"; |
| nvidia,function = "irda"; |
| }; |
| uca { |
| nvidia,pins = "uca", "ucb"; |
| nvidia,function = "uartc"; |
| }; |
| conf_ata { |
| nvidia,pins = "ata", "atb", "atc", "atd", "ate", |
| "cdev1", "cdev2", "dap1", "dtb", "gma", |
| "gmb", "gmc", "gmd", "gme", "gpu7", |
| "gpv", "i2cp", "pta", "rm", "slxa", |
| "slxk", "spia", "spib", "uac"; |
| nvidia,pull = <TEGRA_PIN_PULL_NONE>; |
| nvidia,tristate = <TEGRA_PIN_DISABLE>; |
| }; |
| conf_ck32 { |
| nvidia,pins = "ck32", "ddrc", "pmca", "pmcb", |
| "pmcc", "pmcd", "pmce", "xm2c", "xm2d"; |
| nvidia,pull = <TEGRA_PIN_PULL_NONE>; |
| }; |
| conf_csus { |
| nvidia,pins = "csus", "spid", "spif"; |
| nvidia,pull = <TEGRA_PIN_PULL_DOWN>; |
| nvidia,tristate = <TEGRA_PIN_ENABLE>; |
| }; |
| conf_crtp { |
| nvidia,pins = "crtp", "dap2", "dap3", "dap4", |
| "dtc", "dte", "dtf", "gpu", "sdio1", |
| "slxc", "slxd", "spdi", "spdo", "spig", |
| "uda"; |
| nvidia,pull = <TEGRA_PIN_PULL_NONE>; |
| nvidia,tristate = <TEGRA_PIN_ENABLE>; |
| }; |
| conf_ddc { |
| nvidia,pins = "ddc", "dta", "dtd", "kbca", |
| "kbcb", "kbcc", "kbcd", "kbce", "kbcf", |
| "sdc"; |
| nvidia,pull = <TEGRA_PIN_PULL_UP>; |
| nvidia,tristate = <TEGRA_PIN_DISABLE>; |
| }; |
| conf_hdint { |
| nvidia,pins = "hdint", "lcsn", "ldc", "lm1", |
| "lpw1", "lsc1", "lsck", "lsda", "lsdi", |
| "lvp0", "owc", "sdb"; |
| nvidia,tristate = <TEGRA_PIN_ENABLE>; |
| }; |
| conf_irrx { |
| nvidia,pins = "irrx", "irtx", "sdd", "spic", |
| "spie", "spih", "uaa", "uab", "uad", |
| "uca", "ucb"; |
| nvidia,pull = <TEGRA_PIN_PULL_UP>; |
| nvidia,tristate = <TEGRA_PIN_ENABLE>; |
| }; |
| conf_lc { |
| nvidia,pins = "lc", "ls"; |
| nvidia,pull = <TEGRA_PIN_PULL_UP>; |
| }; |
| conf_ld0 { |
| nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4", |
| "ld5", "ld6", "ld7", "ld8", "ld9", |
| "ld10", "ld11", "ld12", "ld13", "ld14", |
| "ld15", "ld16", "ld17", "ldi", "lhp0", |
| "lhp1", "lhp2", "lhs", "lm0", "lpp", |
| "lpw0", "lpw2", "lsc0", "lspi", "lvp1", |
| "lvs", "pmc"; |
| nvidia,tristate = <TEGRA_PIN_DISABLE>; |
| }; |
| conf_ld17_0 { |
| nvidia,pins = "ld17_0", "ld19_18", "ld21_20", |
| "ld23_22"; |
| nvidia,pull = <TEGRA_PIN_PULL_DOWN>; |
| }; |
| }; |
| |
| state_i2cmux_ddc: pinmux_i2cmux_ddc { |
| ddc { |
| nvidia,pins = "ddc"; |
| nvidia,function = "i2c2"; |
| }; |
| pta { |
| nvidia,pins = "pta"; |
| nvidia,function = "rsvd4"; |
| }; |
| }; |
| |
| state_i2cmux_pta: pinmux_i2cmux_pta { |
| ddc { |
| nvidia,pins = "ddc"; |
| nvidia,function = "rsvd4"; |
| }; |
| pta { |
| nvidia,pins = "pta"; |
| nvidia,function = "i2c2"; |
| }; |
| }; |
| |
| state_i2cmux_idle: pinmux_i2cmux_idle { |
| ddc { |
| nvidia,pins = "ddc"; |
| nvidia,function = "rsvd4"; |
| }; |
| pta { |
| nvidia,pins = "pta"; |
| nvidia,function = "rsvd4"; |
| }; |
| }; |
| }; |
| |
| i2s@70002800 { |
| status = "okay"; |
| }; |
| |
| serial@70006300 { |
| status = "okay"; |
| }; |
| |
| i2c@7000c000 { |
| clock-frequency = <400000>; |
| status = "okay"; |
| }; |
| |
| i2c@7000c400 { |
| clock-frequency = <100000>; |
| status = "okay"; |
| }; |
| |
| i2cmux { |
| compatible = "i2c-mux-pinctrl"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| i2c-parent = <&{/i2c@7000c400}>; |
| |
| pinctrl-names = "ddc", "pta", "idle"; |
| pinctrl-0 = <&state_i2cmux_ddc>; |
| pinctrl-1 = <&state_i2cmux_pta>; |
| pinctrl-2 = <&state_i2cmux_idle>; |
| |
| hdmi_ddc: i2c@0 { |
| reg = <0>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| }; |
| |
| i2c@1 { |
| reg = <1>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| }; |
| }; |
| |
| i2c@7000d000 { |
| clock-frequency = <400000>; |
| status = "okay"; |
| |
| pmic: tps6586x@34 { |
| compatible = "ti,tps6586x"; |
| reg = <0x34>; |
| interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; |
| |
| ti,system-power-controller; |
| |
| #gpio-cells = <2>; |
| gpio-controller; |
| |
| sys-supply = <&vdd_5v0_reg>; |
| vin-sm0-supply = <&sys_reg>; |
| vin-sm1-supply = <&sys_reg>; |
| vin-sm2-supply = <&sys_reg>; |
| vinldo01-supply = <&sm2_reg>; |
| vinldo23-supply = <&sm2_reg>; |
| vinldo4-supply = <&sm2_reg>; |
| vinldo678-supply = <&sm2_reg>; |
| vinldo9-supply = <&sm2_reg>; |
| |
| regulators { |
| sys_reg: sys { |
| regulator-name = "vdd_sys"; |
| regulator-always-on; |
| }; |
| |
| sm0 { |
| regulator-name = "vdd_sys_sm0,vdd_core"; |
| regulator-min-microvolt = <1200000>; |
| regulator-max-microvolt = <1200000>; |
| regulator-always-on; |
| }; |
| |
| sm1 { |
| regulator-name = "vdd_sys_sm1,vdd_cpu"; |
| regulator-min-microvolt = <1000000>; |
| regulator-max-microvolt = <1000000>; |
| regulator-always-on; |
| }; |
| |
| sm2_reg: sm2 { |
| regulator-name = "vdd_sys_sm2,vin_ldo*"; |
| regulator-min-microvolt = <3700000>; |
| regulator-max-microvolt = <3700000>; |
| regulator-always-on; |
| }; |
| |
| pci_clk_reg: ldo0 { |
| regulator-name = "vdd_ldo0,vddio_pex_clk"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| }; |
| |
| ldo1 { |
| regulator-name = "vdd_ldo1,avdd_pll*"; |
| regulator-min-microvolt = <1100000>; |
| regulator-max-microvolt = <1100000>; |
| regulator-always-on; |
| }; |
| |
| ldo2 { |
| regulator-name = "vdd_ldo2,vdd_rtc"; |
| regulator-min-microvolt = <1200000>; |
| regulator-max-microvolt = <1200000>; |
| }; |
| |
| ldo3 { |
| regulator-name = "vdd_ldo3,avdd_usb*"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| regulator-always-on; |
| }; |
| |
| ldo4 { |
| regulator-name = "vdd_ldo4,avdd_osc,vddio_sys"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| regulator-always-on; |
| }; |
| |
| ldo5 { |
| regulator-name = "vdd_ldo5,vcore_mmc"; |
| regulator-min-microvolt = <2850000>; |
| regulator-max-microvolt = <2850000>; |
| }; |
| |
| ldo6 { |
| regulator-name = "vdd_ldo6,avdd_vdac"; |
| /* |
| * According to the Tegra 2 Automotive |
| * DataSheet, a typical value for this |
| * would be 2.8V, but the PMIC only |
| * supports 2.85V. |
| */ |
| regulator-min-microvolt = <2850000>; |
| regulator-max-microvolt = <2850000>; |
| }; |
| |
| hdmi_vdd_reg: ldo7 { |
| regulator-name = "vdd_ldo7,avdd_hdmi"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| }; |
| |
| hdmi_pll_reg: ldo8 { |
| regulator-name = "vdd_ldo8,avdd_hdmi_pll"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| }; |
| |
| ldo9 { |
| regulator-name = "vdd_ldo9,vdd_ddr_rx,avdd_cam"; |
| /* |
| * According to the Tegra 2 Automotive |
| * DataSheet, a typical value for this |
| * would be 2.8V, but the PMIC only |
| * supports 2.85V. |
| */ |
| regulator-min-microvolt = <2850000>; |
| regulator-max-microvolt = <2850000>; |
| regulator-always-on; |
| }; |
| |
| ldo_rtc { |
| regulator-name = "vdd_rtc_out"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| regulator-always-on; |
| }; |
| }; |
| }; |
| |
| temperature-sensor@4c { |
| compatible = "onnn,nct1008"; |
| reg = <0x4c>; |
| }; |
| }; |
| |
| pmc@7000e400 { |
| nvidia,invert-interrupt; |
| nvidia,suspend-mode = <1>; |
| nvidia,cpu-pwr-good-time = <5000>; |
| nvidia,cpu-pwr-off-time = <5000>; |
| nvidia,core-pwr-good-time = <3845 3845>; |
| nvidia,core-pwr-off-time = <3875>; |
| nvidia,sys-clock-req-active-high; |
| }; |
| |
| pcie-controller@80003000 { |
| pex-clk-supply = <&pci_clk_reg>; |
| vdd-supply = <&pci_vdd_reg>; |
| }; |
| |
| usb@c5008000 { |
| status = "okay"; |
| }; |
| |
| usb-phy@c5008000 { |
| status = "okay"; |
| }; |
| |
| sdhci@c8000600 { |
| cd-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_LOW>; |
| wp-gpios = <&gpio TEGRA_GPIO(H, 3) GPIO_ACTIVE_HIGH>; |
| bus-width = <4>; |
| status = "okay"; |
| }; |
| |
| clocks { |
| compatible = "simple-bus"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| clk32k_in: clock@0 { |
| compatible = "fixed-clock"; |
| reg=<0>; |
| #clock-cells = <0>; |
| clock-frequency = <32768>; |
| }; |
| }; |
| |
| regulators { |
| compatible = "simple-bus"; |
| |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| vdd_5v0_reg: regulator@0 { |
| compatible = "regulator-fixed"; |
| reg = <0>; |
| regulator-name = "vdd_5v0"; |
| regulator-min-microvolt = <5000000>; |
| regulator-max-microvolt = <5000000>; |
| regulator-always-on; |
| }; |
| |
| pci_vdd_reg: regulator@1 { |
| compatible = "regulator-fixed"; |
| reg = <1>; |
| regulator-name = "vdd_1v05"; |
| regulator-min-microvolt = <1050000>; |
| regulator-max-microvolt = <1050000>; |
| gpio = <&pmic 2 0>; |
| enable-active-high; |
| }; |
| }; |
| }; |
