blob: a6942c75cbbbbf4de002588576306cd97c205193 [file] [log] [blame]
/*
* Copyright (C) 2013 STMicroelectronics R&D Limited
* <stlinux-devel@stlinux.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/ {
clocks {
/*
* Fixed 30MHz oscillator inputs to SoC
*/
CLK_SYSIN: CLK_SYSIN {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <30000000>;
clock-output-names = "CLK_SYSIN";
};
/*
* ARM Peripheral clock for timers
*/
arm_periph_clk: arm_periph_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <600000000>;
};
/*
* Bootloader initialized system infrastructure clock for
* serial devices.
*/
CLK_S_ICN_REG_0: clockgenA0@4 {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <100000000>;
clock-output-names = "CLK_S_ICN_REG_0";
};
CLK_S_GMAC0_PHY: clockgenA1@7 {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <25000000>;
clock-output-names = "CLK_S_GMAC0_PHY";
};
CLK_S_ETH1_PHY: clockgenA0@7 {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <25000000>;
clock-output-names = "CLK_S_ETH1_PHY";
};
};
};