arch/arm/boot/dts/kirkwood-openblocks_a7.dts

/*
 * Device Tree file for OpenBlocks A7 board
 *
 * Copyright (C) 2013 Free Electrons
 *
 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2.  This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 */

/dts-v1/;

#include "kirkwood.dtsi"
#include "kirkwood-6282.dtsi"

/ {
	model = "Plat'Home OpenBlocksA7";
	compatible = "plathome,openblocks-a7", "marvell,kirkwood-88f6283", "marvell,kirkwood";

	memory {
		device_type = "memory";
		reg = <0x00000000 0x40000000>; /* 1 GB */
	};

	chosen {
		bootargs = "console=ttyS0,115200n8 earlyprintk";
	};

	ocp@f1000000 {
		serial@12000 {
			status = "ok";
			pinctrl-0 = <&pmx_uart0>;
			pinctrl-names = "default";
		};

		serial@12100 {
			status = "ok";
			pinctrl-0 = <&pmx_uart1>;
			pinctrl-names = "default";
		};

		sata@80000 {
			nr-ports = <1>;
			status = "okay";
		};

		i2c@11100 {
			status = "okay";
			pinctrl-0 = <&pmx_twsi1>;
			pinctrl-names = "default";

			s24c02: s24c02@50 {
				compatible = "atmel,24c02";
				reg = <0x50>;
			};
		};

		pinctrl: pinctrl@10000 {
			pinctrl-0 = <&pmx_dip_switches &pmx_gpio_header>;
			pinctrl-names = "default";

			pmx_uart0: pmx-uart0 {
				marvell,pins = "mpp10", "mpp11", "mpp15",
					"mpp16";
				marvell,function = "uart0";
			};

			pmx_uart1: pmx-uart1 {
				marvell,pins = "mpp13", "mpp14", "mpp8",
					"mpp9";
				marvell,function = "uart1";
			};

			pmx_sysrst: pmx-sysrst {
				marvell,pins = "mpp6";
				marvell,function = "sysrst";
			};

			pmx_dip_switches: pmx-dip-switches {
				marvell,pins = "mpp44", "mpp45", "mpp46", "mpp47";
				marvell,function = "gpio";
			};

			/*
			 * Accessible on connector J202. The MPP
			 * listed below are pin 1-7, pin 8 is unused,
			 * pin 9 is external reset input and pin 10 is
			 * ground.
			 */
			pmx_gpio_header: pmx-gpio-header {
				marvell,pins = "mpp17", "mpp7", "mpp29", "mpp28",
					       "mpp35", "mpp34", "mpp40";
				marvell,function = "gpio";
			};

			pmx_gpio_init: pmx-init {
				marvell,pins = "mpp38";
				marvell,function = "gpio";
			};

			pmx_usb_oc: pmx-usb-oc {
				marvell,pins = "mpp39";
				marvell,function = "gpio";
			};

			pmx_leds: pmx-leds {
				marvell,pins = "mpp41", "mpp42", "mpp43";
				marvell,function = "gpio";
			};

			pmx_ge1: pmx-ge1 {
				marvell,pins = "mpp20", "mpp21", "mpp22", "mpp23",
					       "mpp24", "mpp25", "mpp26", "mpp27",
					       "mpp30", "mpp31", "mpp32", "mpp33";
				marvell,function = "ge1";
			};
		};
	};

	gpio-leds {
		compatible = "gpio-leds";
		pinctrl-0 = <&pmx_leds>;
		pinctrl-names = "default";

		led-red {
			label = "obsa7:red:stat";
			gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
		};

		led-green {
			label = "obsa7:green:stat";
			gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
		};

		led-yellow {
			label = "obsa7:yellow:stat";
			gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
		};
        };

	gpio_keys {
		compatible = "gpio-keys";
		pinctrl-0 = <&pmx_gpio_init>;
		pinctrl-names = "default";
		#address-cells = <1>;
		#size-cells = <0>;

		button@1 {
			label = "Init Button";
			linux,code = <KEY_POWER>;
			gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
		};
	};
};

&nand {
	chip-delay = <25>;
	status = "okay";
	pinctrl-0 = <&pmx_nand>;
	pinctrl-names = "default";

	partition@0 {
		label = "uboot";
		reg = <0x0 0x1c0000>;
	};

	partition@1c0000 {
		label = "env";
		reg = <0x1c0000 0x2c0000>;
	};

	partition@480000 {
		label = "test";
		reg = <0x480000 0x160000>;
	};

	partition@5e0000 {
		label = "conf";
		reg = <0x5e0000 0x540000>;
	};

	partition@b20000 {
		label = "linux";
		reg = <0xb20000 0x3d40000>;
	};

	partition@4860000 {
		label = "user";
		reg = <0x4860000 0xb7a0000>;
	};
};

&mdio {
	status = "okay";

	ethphy0: ethernet-phy@0 {
		reg = <0>;
	};

	ethphy1: ethernet-phy@1 {
		reg = <1>;
	};
};

&eth0 {
	status = "okay";
	ethernet0-port@0 {
		phy-handle = <&ethphy0>;
	};
};

&eth1 {
	status = "okay";
	pinctrl-0 = <&pmx_ge1>;
	pinctrl-names = "default";
	ethernet1-port@0 {
		phy-handle = <&ethphy1>;
	};
};