| /* arch/arm/mach-s3c2410/include/mach/spi.h |
| * |
| * Copyright (c) 2006 Simtec Electronics |
| * Ben Dooks <ben@simtec.co.uk> |
| * |
| * S3C2410 - SPI Controller platform_device info |
| * |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License version 2 as |
| * published by the Free Software Foundation. |
| */ |
| |
| #ifndef __ASM_ARCH_SPI_H |
| #define __ASM_ARCH_SPI_H __FILE__ |
| |
| struct s3c2410_spi_info { |
| int pin_cs; /* simple gpio cs */ |
| unsigned int num_cs; /* total chipselects */ |
| int bus_num; /* bus number to use. */ |
| |
| unsigned int use_fiq:1; /* use fiq */ |
| |
| void (*gpio_setup)(struct s3c2410_spi_info *spi, int enable); |
| void (*set_cs)(struct s3c2410_spi_info *spi, int cs, int pol); |
| }; |
| |
| /* Standard setup / suspend routines for SPI GPIO pins. */ |
| |
| extern void s3c24xx_spi_gpiocfg_bus0_gpe11_12_13(struct s3c2410_spi_info *spi, |
| int enable); |
| |
| extern void s3c24xx_spi_gpiocfg_bus1_gpg5_6_7(struct s3c2410_spi_info *spi, |
| int enable); |
| |
| extern void s3c24xx_spi_gpiocfg_bus1_gpd8_9_10(struct s3c2410_spi_info *spi, |
| int enable); |
| |
| #endif /* __ASM_ARCH_SPI_H */ |
