Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* smp.c: Sparc64 SMP support. |
| 2 | * |
| 3 | * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu) |
| 4 | */ |
| 5 | |
| 6 | #include <linux/module.h> |
| 7 | #include <linux/kernel.h> |
| 8 | #include <linux/sched.h> |
| 9 | #include <linux/mm.h> |
| 10 | #include <linux/pagemap.h> |
| 11 | #include <linux/threads.h> |
| 12 | #include <linux/smp.h> |
| 13 | #include <linux/smp_lock.h> |
| 14 | #include <linux/interrupt.h> |
| 15 | #include <linux/kernel_stat.h> |
| 16 | #include <linux/delay.h> |
| 17 | #include <linux/init.h> |
| 18 | #include <linux/spinlock.h> |
| 19 | #include <linux/fs.h> |
| 20 | #include <linux/seq_file.h> |
| 21 | #include <linux/cache.h> |
| 22 | #include <linux/jiffies.h> |
| 23 | #include <linux/profile.h> |
| 24 | #include <linux/bootmem.h> |
| 25 | |
| 26 | #include <asm/head.h> |
| 27 | #include <asm/ptrace.h> |
| 28 | #include <asm/atomic.h> |
| 29 | #include <asm/tlbflush.h> |
| 30 | #include <asm/mmu_context.h> |
| 31 | #include <asm/cpudata.h> |
| 32 | |
| 33 | #include <asm/irq.h> |
Al Viro | 6d24c8d | 2006-10-08 08:23:28 -0400 | [diff] [blame] | 34 | #include <asm/irq_regs.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 35 | #include <asm/page.h> |
| 36 | #include <asm/pgtable.h> |
| 37 | #include <asm/oplib.h> |
| 38 | #include <asm/uaccess.h> |
| 39 | #include <asm/timer.h> |
| 40 | #include <asm/starfire.h> |
| 41 | #include <asm/tlb.h> |
David S. Miller | 56fb4df | 2006-02-26 23:24:22 -0800 | [diff] [blame] | 42 | #include <asm/sections.h> |
David S. Miller | 07f8e5f | 2006-06-21 23:34:02 -0700 | [diff] [blame] | 43 | #include <asm/prom.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 44 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 45 | extern void calibrate_delay(void); |
| 46 | |
| 47 | /* Please don't make this stuff initdata!!! --DaveM */ |
David S. Miller | 777a447 | 2007-02-22 06:24:10 -0800 | [diff] [blame] | 48 | unsigned char boot_cpu_id; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 49 | |
Andrew Morton | c12a828 | 2005-07-12 12:09:43 -0700 | [diff] [blame] | 50 | cpumask_t cpu_online_map __read_mostly = CPU_MASK_NONE; |
| 51 | cpumask_t phys_cpu_present_map __read_mostly = CPU_MASK_NONE; |
David S. Miller | 8935dce | 2006-03-08 16:09:19 -0800 | [diff] [blame] | 52 | cpumask_t cpu_sibling_map[NR_CPUS] __read_mostly = |
| 53 | { [0 ... NR_CPUS-1] = CPU_MASK_NONE }; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 54 | static cpumask_t smp_commenced_mask; |
| 55 | static cpumask_t cpu_callout_map; |
| 56 | |
| 57 | void smp_info(struct seq_file *m) |
| 58 | { |
| 59 | int i; |
| 60 | |
| 61 | seq_printf(m, "State:\n"); |
Andrew Morton | 394e390 | 2006-03-23 03:01:05 -0800 | [diff] [blame] | 62 | for_each_online_cpu(i) |
| 63 | seq_printf(m, "CPU%d:\t\tonline\n", i); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 64 | } |
| 65 | |
| 66 | void smp_bogo(struct seq_file *m) |
| 67 | { |
| 68 | int i; |
| 69 | |
Andrew Morton | 394e390 | 2006-03-23 03:01:05 -0800 | [diff] [blame] | 70 | for_each_online_cpu(i) |
| 71 | seq_printf(m, |
| 72 | "Cpu%dBogo\t: %lu.%02lu\n" |
| 73 | "Cpu%dClkTck\t: %016lx\n", |
| 74 | i, cpu_data(i).udelay_val / (500000/HZ), |
| 75 | (cpu_data(i).udelay_val / (5000/HZ)) % 100, |
| 76 | i, cpu_data(i).clock_tick); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 77 | } |
| 78 | |
| 79 | void __init smp_store_cpu_info(int id) |
| 80 | { |
David S. Miller | 07f8e5f | 2006-06-21 23:34:02 -0700 | [diff] [blame] | 81 | struct device_node *dp; |
| 82 | int def; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 83 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 84 | cpu_data(id).udelay_val = loops_per_jiffy; |
| 85 | |
David S. Miller | 07f8e5f | 2006-06-21 23:34:02 -0700 | [diff] [blame] | 86 | cpu_find_by_mid(id, &dp); |
| 87 | cpu_data(id).clock_tick = |
| 88 | of_getintprop_default(dp, "clock-frequency", 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 89 | |
David S. Miller | f03b8a5 | 2006-02-15 00:35:50 -0800 | [diff] [blame] | 90 | def = ((tlb_type == hypervisor) ? (8 * 1024) : (16 * 1024)); |
David S. Miller | 07f8e5f | 2006-06-21 23:34:02 -0700 | [diff] [blame] | 91 | cpu_data(id).dcache_size = |
| 92 | of_getintprop_default(dp, "dcache-size", def); |
David S. Miller | f03b8a5 | 2006-02-15 00:35:50 -0800 | [diff] [blame] | 93 | |
| 94 | def = 32; |
David S. Miller | 80dc0d6 | 2005-09-26 00:32:17 -0700 | [diff] [blame] | 95 | cpu_data(id).dcache_line_size = |
David S. Miller | 07f8e5f | 2006-06-21 23:34:02 -0700 | [diff] [blame] | 96 | of_getintprop_default(dp, "dcache-line-size", def); |
David S. Miller | f03b8a5 | 2006-02-15 00:35:50 -0800 | [diff] [blame] | 97 | |
| 98 | def = 16 * 1024; |
David S. Miller | 07f8e5f | 2006-06-21 23:34:02 -0700 | [diff] [blame] | 99 | cpu_data(id).icache_size = |
| 100 | of_getintprop_default(dp, "icache-size", def); |
David S. Miller | f03b8a5 | 2006-02-15 00:35:50 -0800 | [diff] [blame] | 101 | |
| 102 | def = 32; |
David S. Miller | 80dc0d6 | 2005-09-26 00:32:17 -0700 | [diff] [blame] | 103 | cpu_data(id).icache_line_size = |
David S. Miller | 07f8e5f | 2006-06-21 23:34:02 -0700 | [diff] [blame] | 104 | of_getintprop_default(dp, "icache-line-size", def); |
David S. Miller | f03b8a5 | 2006-02-15 00:35:50 -0800 | [diff] [blame] | 105 | |
| 106 | def = ((tlb_type == hypervisor) ? |
| 107 | (3 * 1024 * 1024) : |
| 108 | (4 * 1024 * 1024)); |
David S. Miller | 07f8e5f | 2006-06-21 23:34:02 -0700 | [diff] [blame] | 109 | cpu_data(id).ecache_size = |
| 110 | of_getintprop_default(dp, "ecache-size", def); |
David S. Miller | f03b8a5 | 2006-02-15 00:35:50 -0800 | [diff] [blame] | 111 | |
| 112 | def = 64; |
David S. Miller | 80dc0d6 | 2005-09-26 00:32:17 -0700 | [diff] [blame] | 113 | cpu_data(id).ecache_line_size = |
David S. Miller | 07f8e5f | 2006-06-21 23:34:02 -0700 | [diff] [blame] | 114 | of_getintprop_default(dp, "ecache-line-size", def); |
David S. Miller | f03b8a5 | 2006-02-15 00:35:50 -0800 | [diff] [blame] | 115 | |
David S. Miller | 80dc0d6 | 2005-09-26 00:32:17 -0700 | [diff] [blame] | 116 | printk("CPU[%d]: Caches " |
| 117 | "D[sz(%d):line_sz(%d)] " |
| 118 | "I[sz(%d):line_sz(%d)] " |
| 119 | "E[sz(%d):line_sz(%d)]\n", |
| 120 | id, |
| 121 | cpu_data(id).dcache_size, cpu_data(id).dcache_line_size, |
| 122 | cpu_data(id).icache_size, cpu_data(id).icache_line_size, |
| 123 | cpu_data(id).ecache_size, cpu_data(id).ecache_line_size); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 124 | } |
| 125 | |
David S. Miller | 112f487 | 2007-03-05 15:28:37 -0800 | [diff] [blame] | 126 | extern void setup_sparc64_timer(void); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 127 | |
| 128 | static volatile unsigned long callin_flag = 0; |
| 129 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 130 | void __init smp_callin(void) |
| 131 | { |
| 132 | int cpuid = hard_smp_processor_id(); |
| 133 | |
David S. Miller | 56fb4df | 2006-02-26 23:24:22 -0800 | [diff] [blame] | 134 | __local_per_cpu_offset = __per_cpu_offset(cpuid); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 135 | |
David S. Miller | 4a07e64 | 2006-02-14 13:49:32 -0800 | [diff] [blame] | 136 | if (tlb_type == hypervisor) |
David S. Miller | 490384e | 2006-02-11 14:41:18 -0800 | [diff] [blame] | 137 | sun4v_ktsb_register(); |
David S. Miller | 481295f | 2006-02-07 21:51:08 -0800 | [diff] [blame] | 138 | |
David S. Miller | 56fb4df | 2006-02-26 23:24:22 -0800 | [diff] [blame] | 139 | __flush_tlb_all(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 140 | |
David S. Miller | 112f487 | 2007-03-05 15:28:37 -0800 | [diff] [blame] | 141 | setup_sparc64_timer(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 142 | |
David S. Miller | 816242d | 2005-05-23 15:52:08 -0700 | [diff] [blame] | 143 | if (cheetah_pcache_forced_on) |
| 144 | cheetah_enable_pcache(); |
| 145 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 146 | local_irq_enable(); |
| 147 | |
| 148 | calibrate_delay(); |
| 149 | smp_store_cpu_info(cpuid); |
| 150 | callin_flag = 1; |
| 151 | __asm__ __volatile__("membar #Sync\n\t" |
| 152 | "flush %%g6" : : : "memory"); |
| 153 | |
| 154 | /* Clear this or we will die instantly when we |
| 155 | * schedule back to this idler... |
| 156 | */ |
David S. Miller | db7d9a4 | 2005-07-24 19:36:26 -0700 | [diff] [blame] | 157 | current_thread_info()->new_child = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 158 | |
| 159 | /* Attach to the address space of init_task. */ |
| 160 | atomic_inc(&init_mm.mm_count); |
| 161 | current->active_mm = &init_mm; |
| 162 | |
| 163 | while (!cpu_isset(cpuid, smp_commenced_mask)) |
David S. Miller | 4f07118 | 2005-08-29 12:46:22 -0700 | [diff] [blame] | 164 | rmb(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 165 | |
| 166 | cpu_set(cpuid, cpu_online_map); |
Nick Piggin | 5bfb5d6 | 2005-11-08 21:39:01 -0800 | [diff] [blame] | 167 | |
| 168 | /* idle thread is expected to have preempt disabled */ |
| 169 | preempt_disable(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 170 | } |
| 171 | |
| 172 | void cpu_panic(void) |
| 173 | { |
| 174 | printk("CPU[%d]: Returns from cpu_idle!\n", smp_processor_id()); |
| 175 | panic("SMP bolixed\n"); |
| 176 | } |
| 177 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 178 | /* This tick register synchronization scheme is taken entirely from |
| 179 | * the ia64 port, see arch/ia64/kernel/smpboot.c for details and credit. |
| 180 | * |
| 181 | * The only change I've made is to rework it so that the master |
| 182 | * initiates the synchonization instead of the slave. -DaveM |
| 183 | */ |
| 184 | |
| 185 | #define MASTER 0 |
| 186 | #define SLAVE (SMP_CACHE_BYTES/sizeof(unsigned long)) |
| 187 | |
| 188 | #define NUM_ROUNDS 64 /* magic value */ |
| 189 | #define NUM_ITERS 5 /* likewise */ |
| 190 | |
| 191 | static DEFINE_SPINLOCK(itc_sync_lock); |
| 192 | static unsigned long go[SLAVE + 1]; |
| 193 | |
| 194 | #define DEBUG_TICK_SYNC 0 |
| 195 | |
| 196 | static inline long get_delta (long *rt, long *master) |
| 197 | { |
| 198 | unsigned long best_t0 = 0, best_t1 = ~0UL, best_tm = 0; |
| 199 | unsigned long tcenter, t0, t1, tm; |
| 200 | unsigned long i; |
| 201 | |
| 202 | for (i = 0; i < NUM_ITERS; i++) { |
| 203 | t0 = tick_ops->get_tick(); |
| 204 | go[MASTER] = 1; |
David S. Miller | 4f07118 | 2005-08-29 12:46:22 -0700 | [diff] [blame] | 205 | membar_storeload(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 206 | while (!(tm = go[SLAVE])) |
David S. Miller | 4f07118 | 2005-08-29 12:46:22 -0700 | [diff] [blame] | 207 | rmb(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 208 | go[SLAVE] = 0; |
David S. Miller | 4f07118 | 2005-08-29 12:46:22 -0700 | [diff] [blame] | 209 | wmb(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 210 | t1 = tick_ops->get_tick(); |
| 211 | |
| 212 | if (t1 - t0 < best_t1 - best_t0) |
| 213 | best_t0 = t0, best_t1 = t1, best_tm = tm; |
| 214 | } |
| 215 | |
| 216 | *rt = best_t1 - best_t0; |
| 217 | *master = best_tm - best_t0; |
| 218 | |
| 219 | /* average best_t0 and best_t1 without overflow: */ |
| 220 | tcenter = (best_t0/2 + best_t1/2); |
| 221 | if (best_t0 % 2 + best_t1 % 2 == 2) |
| 222 | tcenter++; |
| 223 | return tcenter - best_tm; |
| 224 | } |
| 225 | |
| 226 | void smp_synchronize_tick_client(void) |
| 227 | { |
| 228 | long i, delta, adj, adjust_latency = 0, done = 0; |
| 229 | unsigned long flags, rt, master_time_stamp, bound; |
| 230 | #if DEBUG_TICK_SYNC |
| 231 | struct { |
| 232 | long rt; /* roundtrip time */ |
| 233 | long master; /* master's timestamp */ |
| 234 | long diff; /* difference between midpoint and master's timestamp */ |
| 235 | long lat; /* estimate of itc adjustment latency */ |
| 236 | } t[NUM_ROUNDS]; |
| 237 | #endif |
| 238 | |
| 239 | go[MASTER] = 1; |
| 240 | |
| 241 | while (go[MASTER]) |
David S. Miller | 4f07118 | 2005-08-29 12:46:22 -0700 | [diff] [blame] | 242 | rmb(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 243 | |
| 244 | local_irq_save(flags); |
| 245 | { |
| 246 | for (i = 0; i < NUM_ROUNDS; i++) { |
| 247 | delta = get_delta(&rt, &master_time_stamp); |
| 248 | if (delta == 0) { |
| 249 | done = 1; /* let's lock on to this... */ |
| 250 | bound = rt; |
| 251 | } |
| 252 | |
| 253 | if (!done) { |
| 254 | if (i > 0) { |
| 255 | adjust_latency += -delta; |
| 256 | adj = -delta + adjust_latency/4; |
| 257 | } else |
| 258 | adj = -delta; |
| 259 | |
David S. Miller | 112f487 | 2007-03-05 15:28:37 -0800 | [diff] [blame] | 260 | tick_ops->add_tick(adj); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 261 | } |
| 262 | #if DEBUG_TICK_SYNC |
| 263 | t[i].rt = rt; |
| 264 | t[i].master = master_time_stamp; |
| 265 | t[i].diff = delta; |
| 266 | t[i].lat = adjust_latency/4; |
| 267 | #endif |
| 268 | } |
| 269 | } |
| 270 | local_irq_restore(flags); |
| 271 | |
| 272 | #if DEBUG_TICK_SYNC |
| 273 | for (i = 0; i < NUM_ROUNDS; i++) |
| 274 | printk("rt=%5ld master=%5ld diff=%5ld adjlat=%5ld\n", |
| 275 | t[i].rt, t[i].master, t[i].diff, t[i].lat); |
| 276 | #endif |
| 277 | |
| 278 | printk(KERN_INFO "CPU %d: synchronized TICK with master CPU (last diff %ld cycles," |
| 279 | "maxerr %lu cycles)\n", smp_processor_id(), delta, rt); |
| 280 | } |
| 281 | |
| 282 | static void smp_start_sync_tick_client(int cpu); |
| 283 | |
| 284 | static void smp_synchronize_one_tick(int cpu) |
| 285 | { |
| 286 | unsigned long flags, i; |
| 287 | |
| 288 | go[MASTER] = 0; |
| 289 | |
| 290 | smp_start_sync_tick_client(cpu); |
| 291 | |
| 292 | /* wait for client to be ready */ |
| 293 | while (!go[MASTER]) |
David S. Miller | 4f07118 | 2005-08-29 12:46:22 -0700 | [diff] [blame] | 294 | rmb(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 295 | |
| 296 | /* now let the client proceed into his loop */ |
| 297 | go[MASTER] = 0; |
David S. Miller | 4f07118 | 2005-08-29 12:46:22 -0700 | [diff] [blame] | 298 | membar_storeload(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 299 | |
| 300 | spin_lock_irqsave(&itc_sync_lock, flags); |
| 301 | { |
| 302 | for (i = 0; i < NUM_ROUNDS*NUM_ITERS; i++) { |
| 303 | while (!go[MASTER]) |
David S. Miller | 4f07118 | 2005-08-29 12:46:22 -0700 | [diff] [blame] | 304 | rmb(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 305 | go[MASTER] = 0; |
David S. Miller | 4f07118 | 2005-08-29 12:46:22 -0700 | [diff] [blame] | 306 | wmb(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 307 | go[SLAVE] = tick_ops->get_tick(); |
David S. Miller | 4f07118 | 2005-08-29 12:46:22 -0700 | [diff] [blame] | 308 | membar_storeload(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 309 | } |
| 310 | } |
| 311 | spin_unlock_irqrestore(&itc_sync_lock, flags); |
| 312 | } |
| 313 | |
David S. Miller | 72aff53 | 2006-02-17 01:29:17 -0800 | [diff] [blame] | 314 | extern void sun4v_init_mondo_queues(int use_bootmem, int cpu, int alloc, int load); |
| 315 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 316 | extern unsigned long sparc64_cpu_startup; |
| 317 | |
| 318 | /* The OBP cpu startup callback truncates the 3rd arg cookie to |
| 319 | * 32-bits (I think) so to be safe we have it read the pointer |
| 320 | * contained here so we work on >4GB machines. -DaveM |
| 321 | */ |
| 322 | static struct thread_info *cpu_new_thread = NULL; |
| 323 | |
| 324 | static int __devinit smp_boot_one_cpu(unsigned int cpu) |
| 325 | { |
| 326 | unsigned long entry = |
| 327 | (unsigned long)(&sparc64_cpu_startup); |
| 328 | unsigned long cookie = |
| 329 | (unsigned long)(&cpu_new_thread); |
| 330 | struct task_struct *p; |
David S. Miller | 7890f79 | 2006-02-15 02:26:54 -0800 | [diff] [blame] | 331 | int timeout, ret; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 332 | |
| 333 | p = fork_idle(cpu); |
| 334 | callin_flag = 0; |
Al Viro | f316964 | 2006-01-12 01:05:42 -0800 | [diff] [blame] | 335 | cpu_new_thread = task_thread_info(p); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 336 | cpu_set(cpu, cpu_callout_map); |
| 337 | |
David S. Miller | 7890f79 | 2006-02-15 02:26:54 -0800 | [diff] [blame] | 338 | if (tlb_type == hypervisor) { |
David S. Miller | 72aff53 | 2006-02-17 01:29:17 -0800 | [diff] [blame] | 339 | /* Alloc the mondo queues, cpu will load them. */ |
| 340 | sun4v_init_mondo_queues(0, cpu, 1, 0); |
| 341 | |
David S. Miller | 7890f79 | 2006-02-15 02:26:54 -0800 | [diff] [blame] | 342 | prom_startcpu_cpuid(cpu, entry, cookie); |
| 343 | } else { |
David S. Miller | 07f8e5f | 2006-06-21 23:34:02 -0700 | [diff] [blame] | 344 | struct device_node *dp; |
David S. Miller | 7890f79 | 2006-02-15 02:26:54 -0800 | [diff] [blame] | 345 | |
David S. Miller | 07f8e5f | 2006-06-21 23:34:02 -0700 | [diff] [blame] | 346 | cpu_find_by_mid(cpu, &dp); |
| 347 | prom_startcpu(dp->node, entry, cookie); |
David S. Miller | 7890f79 | 2006-02-15 02:26:54 -0800 | [diff] [blame] | 348 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 349 | |
| 350 | for (timeout = 0; timeout < 5000000; timeout++) { |
| 351 | if (callin_flag) |
| 352 | break; |
| 353 | udelay(100); |
| 354 | } |
David S. Miller | 72aff53 | 2006-02-17 01:29:17 -0800 | [diff] [blame] | 355 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 356 | if (callin_flag) { |
| 357 | ret = 0; |
| 358 | } else { |
| 359 | printk("Processor %d is stuck.\n", cpu); |
| 360 | cpu_clear(cpu, cpu_callout_map); |
| 361 | ret = -ENODEV; |
| 362 | } |
| 363 | cpu_new_thread = NULL; |
| 364 | |
| 365 | return ret; |
| 366 | } |
| 367 | |
| 368 | static void spitfire_xcall_helper(u64 data0, u64 data1, u64 data2, u64 pstate, unsigned long cpu) |
| 369 | { |
| 370 | u64 result, target; |
| 371 | int stuck, tmp; |
| 372 | |
| 373 | if (this_is_starfire) { |
| 374 | /* map to real upaid */ |
| 375 | cpu = (((cpu & 0x3c) << 1) | |
| 376 | ((cpu & 0x40) >> 4) | |
| 377 | (cpu & 0x3)); |
| 378 | } |
| 379 | |
| 380 | target = (cpu << 14) | 0x70; |
| 381 | again: |
| 382 | /* Ok, this is the real Spitfire Errata #54. |
| 383 | * One must read back from a UDB internal register |
| 384 | * after writes to the UDB interrupt dispatch, but |
| 385 | * before the membar Sync for that write. |
| 386 | * So we use the high UDB control register (ASI 0x7f, |
| 387 | * ADDR 0x20) for the dummy read. -DaveM |
| 388 | */ |
| 389 | tmp = 0x40; |
| 390 | __asm__ __volatile__( |
| 391 | "wrpr %1, %2, %%pstate\n\t" |
| 392 | "stxa %4, [%0] %3\n\t" |
| 393 | "stxa %5, [%0+%8] %3\n\t" |
| 394 | "add %0, %8, %0\n\t" |
| 395 | "stxa %6, [%0+%8] %3\n\t" |
| 396 | "membar #Sync\n\t" |
| 397 | "stxa %%g0, [%7] %3\n\t" |
| 398 | "membar #Sync\n\t" |
| 399 | "mov 0x20, %%g1\n\t" |
| 400 | "ldxa [%%g1] 0x7f, %%g0\n\t" |
| 401 | "membar #Sync" |
| 402 | : "=r" (tmp) |
| 403 | : "r" (pstate), "i" (PSTATE_IE), "i" (ASI_INTR_W), |
| 404 | "r" (data0), "r" (data1), "r" (data2), "r" (target), |
| 405 | "r" (0x10), "0" (tmp) |
| 406 | : "g1"); |
| 407 | |
| 408 | /* NOTE: PSTATE_IE is still clear. */ |
| 409 | stuck = 100000; |
| 410 | do { |
| 411 | __asm__ __volatile__("ldxa [%%g0] %1, %0" |
| 412 | : "=r" (result) |
| 413 | : "i" (ASI_INTR_DISPATCH_STAT)); |
| 414 | if (result == 0) { |
| 415 | __asm__ __volatile__("wrpr %0, 0x0, %%pstate" |
| 416 | : : "r" (pstate)); |
| 417 | return; |
| 418 | } |
| 419 | stuck -= 1; |
| 420 | if (stuck == 0) |
| 421 | break; |
| 422 | } while (result & 0x1); |
| 423 | __asm__ __volatile__("wrpr %0, 0x0, %%pstate" |
| 424 | : : "r" (pstate)); |
| 425 | if (stuck == 0) { |
| 426 | printk("CPU[%d]: mondo stuckage result[%016lx]\n", |
| 427 | smp_processor_id(), result); |
| 428 | } else { |
| 429 | udelay(2); |
| 430 | goto again; |
| 431 | } |
| 432 | } |
| 433 | |
| 434 | static __inline__ void spitfire_xcall_deliver(u64 data0, u64 data1, u64 data2, cpumask_t mask) |
| 435 | { |
| 436 | u64 pstate; |
| 437 | int i; |
| 438 | |
| 439 | __asm__ __volatile__("rdpr %%pstate, %0" : "=r" (pstate)); |
| 440 | for_each_cpu_mask(i, mask) |
| 441 | spitfire_xcall_helper(data0, data1, data2, pstate, i); |
| 442 | } |
| 443 | |
| 444 | /* Cheetah now allows to send the whole 64-bytes of data in the interrupt |
| 445 | * packet, but we have no use for that. However we do take advantage of |
| 446 | * the new pipelining feature (ie. dispatch to multiple cpus simultaneously). |
| 447 | */ |
| 448 | static void cheetah_xcall_deliver(u64 data0, u64 data1, u64 data2, cpumask_t mask) |
| 449 | { |
| 450 | u64 pstate, ver; |
David S. Miller | 92704a1 | 2006-02-26 23:27:19 -0800 | [diff] [blame] | 451 | int nack_busy_id, is_jbus; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 452 | |
| 453 | if (cpus_empty(mask)) |
| 454 | return; |
| 455 | |
| 456 | /* Unfortunately, someone at Sun had the brilliant idea to make the |
| 457 | * busy/nack fields hard-coded by ITID number for this Ultra-III |
| 458 | * derivative processor. |
| 459 | */ |
| 460 | __asm__ ("rdpr %%ver, %0" : "=r" (ver)); |
David S. Miller | 92704a1 | 2006-02-26 23:27:19 -0800 | [diff] [blame] | 461 | is_jbus = ((ver >> 32) == __JALAPENO_ID || |
| 462 | (ver >> 32) == __SERRANO_ID); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 463 | |
| 464 | __asm__ __volatile__("rdpr %%pstate, %0" : "=r" (pstate)); |
| 465 | |
| 466 | retry: |
| 467 | __asm__ __volatile__("wrpr %0, %1, %%pstate\n\t" |
| 468 | : : "r" (pstate), "i" (PSTATE_IE)); |
| 469 | |
| 470 | /* Setup the dispatch data registers. */ |
| 471 | __asm__ __volatile__("stxa %0, [%3] %6\n\t" |
| 472 | "stxa %1, [%4] %6\n\t" |
| 473 | "stxa %2, [%5] %6\n\t" |
| 474 | "membar #Sync\n\t" |
| 475 | : /* no outputs */ |
| 476 | : "r" (data0), "r" (data1), "r" (data2), |
| 477 | "r" (0x40), "r" (0x50), "r" (0x60), |
| 478 | "i" (ASI_INTR_W)); |
| 479 | |
| 480 | nack_busy_id = 0; |
| 481 | { |
| 482 | int i; |
| 483 | |
| 484 | for_each_cpu_mask(i, mask) { |
| 485 | u64 target = (i << 14) | 0x70; |
| 486 | |
David S. Miller | 92704a1 | 2006-02-26 23:27:19 -0800 | [diff] [blame] | 487 | if (!is_jbus) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 488 | target |= (nack_busy_id << 24); |
| 489 | __asm__ __volatile__( |
| 490 | "stxa %%g0, [%0] %1\n\t" |
| 491 | "membar #Sync\n\t" |
| 492 | : /* no outputs */ |
| 493 | : "r" (target), "i" (ASI_INTR_W)); |
| 494 | nack_busy_id++; |
| 495 | } |
| 496 | } |
| 497 | |
| 498 | /* Now, poll for completion. */ |
| 499 | { |
| 500 | u64 dispatch_stat; |
| 501 | long stuck; |
| 502 | |
| 503 | stuck = 100000 * nack_busy_id; |
| 504 | do { |
| 505 | __asm__ __volatile__("ldxa [%%g0] %1, %0" |
| 506 | : "=r" (dispatch_stat) |
| 507 | : "i" (ASI_INTR_DISPATCH_STAT)); |
| 508 | if (dispatch_stat == 0UL) { |
| 509 | __asm__ __volatile__("wrpr %0, 0x0, %%pstate" |
| 510 | : : "r" (pstate)); |
| 511 | return; |
| 512 | } |
| 513 | if (!--stuck) |
| 514 | break; |
| 515 | } while (dispatch_stat & 0x5555555555555555UL); |
| 516 | |
| 517 | __asm__ __volatile__("wrpr %0, 0x0, %%pstate" |
| 518 | : : "r" (pstate)); |
| 519 | |
| 520 | if ((dispatch_stat & ~(0x5555555555555555UL)) == 0) { |
| 521 | /* Busy bits will not clear, continue instead |
| 522 | * of freezing up on this cpu. |
| 523 | */ |
| 524 | printk("CPU[%d]: mondo stuckage result[%016lx]\n", |
| 525 | smp_processor_id(), dispatch_stat); |
| 526 | } else { |
| 527 | int i, this_busy_nack = 0; |
| 528 | |
| 529 | /* Delay some random time with interrupts enabled |
| 530 | * to prevent deadlock. |
| 531 | */ |
| 532 | udelay(2 * nack_busy_id); |
| 533 | |
| 534 | /* Clear out the mask bits for cpus which did not |
| 535 | * NACK us. |
| 536 | */ |
| 537 | for_each_cpu_mask(i, mask) { |
| 538 | u64 check_mask; |
| 539 | |
David S. Miller | 92704a1 | 2006-02-26 23:27:19 -0800 | [diff] [blame] | 540 | if (is_jbus) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 541 | check_mask = (0x2UL << (2*i)); |
| 542 | else |
| 543 | check_mask = (0x2UL << |
| 544 | this_busy_nack); |
| 545 | if ((dispatch_stat & check_mask) == 0) |
| 546 | cpu_clear(i, mask); |
| 547 | this_busy_nack += 2; |
| 548 | } |
| 549 | |
| 550 | goto retry; |
| 551 | } |
| 552 | } |
| 553 | } |
| 554 | |
David S. Miller | 1d2f1f9 | 2006-02-08 16:41:20 -0800 | [diff] [blame] | 555 | /* Multi-cpu list version. */ |
David S. Miller | a43fe0e | 2006-02-04 03:10:53 -0800 | [diff] [blame] | 556 | static void hypervisor_xcall_deliver(u64 data0, u64 data1, u64 data2, cpumask_t mask) |
| 557 | { |
David S. Miller | b830ab6 | 2006-02-28 15:10:26 -0800 | [diff] [blame] | 558 | struct trap_per_cpu *tb; |
| 559 | u16 *cpu_list; |
| 560 | u64 *mondo; |
| 561 | cpumask_t error_mask; |
| 562 | unsigned long flags, status; |
David S. Miller | 3cab0c3 | 2006-03-02 21:50:47 -0800 | [diff] [blame] | 563 | int cnt, retries, this_cpu, prev_sent, i; |
David S. Miller | 1d2f1f9 | 2006-02-08 16:41:20 -0800 | [diff] [blame] | 564 | |
David S. Miller | b830ab6 | 2006-02-28 15:10:26 -0800 | [diff] [blame] | 565 | /* We have to do this whole thing with interrupts fully disabled. |
| 566 | * Otherwise if we send an xcall from interrupt context it will |
| 567 | * corrupt both our mondo block and cpu list state. |
| 568 | * |
| 569 | * One consequence of this is that we cannot use timeout mechanisms |
| 570 | * that depend upon interrupts being delivered locally. So, for |
| 571 | * example, we cannot sample jiffies and expect it to advance. |
| 572 | * |
| 573 | * Fortunately, udelay() uses %stick/%tick so we can use that. |
| 574 | */ |
| 575 | local_irq_save(flags); |
| 576 | |
| 577 | this_cpu = smp_processor_id(); |
| 578 | tb = &trap_block[this_cpu]; |
| 579 | |
| 580 | mondo = __va(tb->cpu_mondo_block_pa); |
David S. Miller | 1d2f1f9 | 2006-02-08 16:41:20 -0800 | [diff] [blame] | 581 | mondo[0] = data0; |
| 582 | mondo[1] = data1; |
| 583 | mondo[2] = data2; |
| 584 | wmb(); |
| 585 | |
David S. Miller | b830ab6 | 2006-02-28 15:10:26 -0800 | [diff] [blame] | 586 | cpu_list = __va(tb->cpu_list_pa); |
| 587 | |
| 588 | /* Setup the initial cpu list. */ |
| 589 | cnt = 0; |
| 590 | for_each_cpu_mask(i, mask) |
| 591 | cpu_list[cnt++] = i; |
| 592 | |
| 593 | cpus_clear(error_mask); |
David S. Miller | 1d2f1f9 | 2006-02-08 16:41:20 -0800 | [diff] [blame] | 594 | retries = 0; |
David S. Miller | 3cab0c3 | 2006-03-02 21:50:47 -0800 | [diff] [blame] | 595 | prev_sent = 0; |
David S. Miller | 1d2f1f9 | 2006-02-08 16:41:20 -0800 | [diff] [blame] | 596 | do { |
David S. Miller | 3cab0c3 | 2006-03-02 21:50:47 -0800 | [diff] [blame] | 597 | int forward_progress, n_sent; |
David S. Miller | 1d2f1f9 | 2006-02-08 16:41:20 -0800 | [diff] [blame] | 598 | |
David S. Miller | b830ab6 | 2006-02-28 15:10:26 -0800 | [diff] [blame] | 599 | status = sun4v_cpu_mondo_send(cnt, |
| 600 | tb->cpu_list_pa, |
| 601 | tb->cpu_mondo_block_pa); |
David S. Miller | 1d2f1f9 | 2006-02-08 16:41:20 -0800 | [diff] [blame] | 602 | |
David S. Miller | b830ab6 | 2006-02-28 15:10:26 -0800 | [diff] [blame] | 603 | /* HV_EOK means all cpus received the xcall, we're done. */ |
| 604 | if (likely(status == HV_EOK)) |
David S. Miller | 1d2f1f9 | 2006-02-08 16:41:20 -0800 | [diff] [blame] | 605 | break; |
| 606 | |
David S. Miller | 3cab0c3 | 2006-03-02 21:50:47 -0800 | [diff] [blame] | 607 | /* First, see if we made any forward progress. |
| 608 | * |
| 609 | * The hypervisor indicates successful sends by setting |
| 610 | * cpu list entries to the value 0xffff. |
David S. Miller | b830ab6 | 2006-02-28 15:10:26 -0800 | [diff] [blame] | 611 | */ |
David S. Miller | 3cab0c3 | 2006-03-02 21:50:47 -0800 | [diff] [blame] | 612 | n_sent = 0; |
David S. Miller | b830ab6 | 2006-02-28 15:10:26 -0800 | [diff] [blame] | 613 | for (i = 0; i < cnt; i++) { |
David S. Miller | 3cab0c3 | 2006-03-02 21:50:47 -0800 | [diff] [blame] | 614 | if (likely(cpu_list[i] == 0xffff)) |
| 615 | n_sent++; |
David S. Miller | 1d2f1f9 | 2006-02-08 16:41:20 -0800 | [diff] [blame] | 616 | } |
| 617 | |
David S. Miller | 3cab0c3 | 2006-03-02 21:50:47 -0800 | [diff] [blame] | 618 | forward_progress = 0; |
| 619 | if (n_sent > prev_sent) |
| 620 | forward_progress = 1; |
| 621 | |
| 622 | prev_sent = n_sent; |
| 623 | |
David S. Miller | b830ab6 | 2006-02-28 15:10:26 -0800 | [diff] [blame] | 624 | /* If we get a HV_ECPUERROR, then one or more of the cpus |
| 625 | * in the list are in error state. Use the cpu_state() |
| 626 | * hypervisor call to find out which cpus are in error state. |
| 627 | */ |
| 628 | if (unlikely(status == HV_ECPUERROR)) { |
| 629 | for (i = 0; i < cnt; i++) { |
| 630 | long err; |
| 631 | u16 cpu; |
David S. Miller | 1d2f1f9 | 2006-02-08 16:41:20 -0800 | [diff] [blame] | 632 | |
David S. Miller | b830ab6 | 2006-02-28 15:10:26 -0800 | [diff] [blame] | 633 | cpu = cpu_list[i]; |
| 634 | if (cpu == 0xffff) |
| 635 | continue; |
| 636 | |
| 637 | err = sun4v_cpu_state(cpu); |
| 638 | if (err >= 0 && |
| 639 | err == HV_CPU_STATE_ERROR) { |
David S. Miller | 3cab0c3 | 2006-03-02 21:50:47 -0800 | [diff] [blame] | 640 | cpu_list[i] = 0xffff; |
David S. Miller | b830ab6 | 2006-02-28 15:10:26 -0800 | [diff] [blame] | 641 | cpu_set(cpu, error_mask); |
| 642 | } |
| 643 | } |
| 644 | } else if (unlikely(status != HV_EWOULDBLOCK)) |
| 645 | goto fatal_mondo_error; |
| 646 | |
David S. Miller | 3cab0c3 | 2006-03-02 21:50:47 -0800 | [diff] [blame] | 647 | /* Don't bother rewriting the CPU list, just leave the |
| 648 | * 0xffff and non-0xffff entries in there and the |
| 649 | * hypervisor will do the right thing. |
| 650 | * |
| 651 | * Only advance timeout state if we didn't make any |
| 652 | * forward progress. |
| 653 | */ |
David S. Miller | b830ab6 | 2006-02-28 15:10:26 -0800 | [diff] [blame] | 654 | if (unlikely(!forward_progress)) { |
| 655 | if (unlikely(++retries > 10000)) |
| 656 | goto fatal_mondo_timeout; |
| 657 | |
| 658 | /* Delay a little bit to let other cpus catch up |
| 659 | * on their cpu mondo queue work. |
| 660 | */ |
| 661 | udelay(2 * cnt); |
| 662 | } |
David S. Miller | 1d2f1f9 | 2006-02-08 16:41:20 -0800 | [diff] [blame] | 663 | } while (1); |
| 664 | |
David S. Miller | b830ab6 | 2006-02-28 15:10:26 -0800 | [diff] [blame] | 665 | local_irq_restore(flags); |
| 666 | |
| 667 | if (unlikely(!cpus_empty(error_mask))) |
| 668 | goto fatal_mondo_cpu_error; |
| 669 | |
| 670 | return; |
| 671 | |
| 672 | fatal_mondo_cpu_error: |
| 673 | printk(KERN_CRIT "CPU[%d]: SUN4V mondo cpu error, some target cpus " |
| 674 | "were in error state\n", |
| 675 | this_cpu); |
| 676 | printk(KERN_CRIT "CPU[%d]: Error mask [ ", this_cpu); |
| 677 | for_each_cpu_mask(i, error_mask) |
| 678 | printk("%d ", i); |
| 679 | printk("]\n"); |
| 680 | return; |
| 681 | |
| 682 | fatal_mondo_timeout: |
| 683 | local_irq_restore(flags); |
| 684 | printk(KERN_CRIT "CPU[%d]: SUN4V mondo timeout, no forward " |
| 685 | " progress after %d retries.\n", |
| 686 | this_cpu, retries); |
| 687 | goto dump_cpu_list_and_out; |
| 688 | |
| 689 | fatal_mondo_error: |
| 690 | local_irq_restore(flags); |
| 691 | printk(KERN_CRIT "CPU[%d]: Unexpected SUN4V mondo error %lu\n", |
| 692 | this_cpu, status); |
| 693 | printk(KERN_CRIT "CPU[%d]: Args were cnt(%d) cpulist_pa(%lx) " |
| 694 | "mondo_block_pa(%lx)\n", |
| 695 | this_cpu, cnt, tb->cpu_list_pa, tb->cpu_mondo_block_pa); |
| 696 | |
| 697 | dump_cpu_list_and_out: |
| 698 | printk(KERN_CRIT "CPU[%d]: CPU list [ ", this_cpu); |
| 699 | for (i = 0; i < cnt; i++) |
| 700 | printk("%u ", cpu_list[i]); |
| 701 | printk("]\n"); |
David S. Miller | a43fe0e | 2006-02-04 03:10:53 -0800 | [diff] [blame] | 702 | } |
| 703 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 704 | /* Send cross call to all processors mentioned in MASK |
| 705 | * except self. |
| 706 | */ |
| 707 | static void smp_cross_call_masked(unsigned long *func, u32 ctx, u64 data1, u64 data2, cpumask_t mask) |
| 708 | { |
| 709 | u64 data0 = (((u64)ctx)<<32 | (((u64)func) & 0xffffffff)); |
| 710 | int this_cpu = get_cpu(); |
| 711 | |
| 712 | cpus_and(mask, mask, cpu_online_map); |
| 713 | cpu_clear(this_cpu, mask); |
| 714 | |
| 715 | if (tlb_type == spitfire) |
| 716 | spitfire_xcall_deliver(data0, data1, data2, mask); |
David S. Miller | a43fe0e | 2006-02-04 03:10:53 -0800 | [diff] [blame] | 717 | else if (tlb_type == cheetah || tlb_type == cheetah_plus) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 718 | cheetah_xcall_deliver(data0, data1, data2, mask); |
David S. Miller | a43fe0e | 2006-02-04 03:10:53 -0800 | [diff] [blame] | 719 | else |
| 720 | hypervisor_xcall_deliver(data0, data1, data2, mask); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 721 | /* NOTE: Caller runs local copy on master. */ |
| 722 | |
| 723 | put_cpu(); |
| 724 | } |
| 725 | |
| 726 | extern unsigned long xcall_sync_tick; |
| 727 | |
| 728 | static void smp_start_sync_tick_client(int cpu) |
| 729 | { |
| 730 | cpumask_t mask = cpumask_of_cpu(cpu); |
| 731 | |
| 732 | smp_cross_call_masked(&xcall_sync_tick, |
| 733 | 0, 0, 0, mask); |
| 734 | } |
| 735 | |
| 736 | /* Send cross call to all processors except self. */ |
| 737 | #define smp_cross_call(func, ctx, data1, data2) \ |
| 738 | smp_cross_call_masked(func, ctx, data1, data2, cpu_online_map) |
| 739 | |
| 740 | struct call_data_struct { |
| 741 | void (*func) (void *info); |
| 742 | void *info; |
| 743 | atomic_t finished; |
| 744 | int wait; |
| 745 | }; |
| 746 | |
David S. Miller | aa1d1a0 | 2006-04-06 16:54:33 -0700 | [diff] [blame] | 747 | static __cacheline_aligned_in_smp DEFINE_SPINLOCK(call_lock); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 748 | static struct call_data_struct *call_data; |
| 749 | |
| 750 | extern unsigned long xcall_call_function; |
| 751 | |
David S. Miller | aa1d1a0 | 2006-04-06 16:54:33 -0700 | [diff] [blame] | 752 | /** |
| 753 | * smp_call_function(): Run a function on all other CPUs. |
| 754 | * @func: The function to run. This must be fast and non-blocking. |
| 755 | * @info: An arbitrary pointer to pass to the function. |
| 756 | * @nonatomic: currently unused. |
| 757 | * @wait: If true, wait (atomically) until function has completed on other CPUs. |
| 758 | * |
| 759 | * Returns 0 on success, else a negative status code. Does not return until |
| 760 | * remote CPUs are nearly ready to execute <<func>> or are or have executed. |
| 761 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 762 | * You must not call this function with disabled interrupts or from a |
| 763 | * hardware interrupt handler or from a bottom half handler. |
| 764 | */ |
David S. Miller | bd40791 | 2006-01-31 18:31:38 -0800 | [diff] [blame] | 765 | static int smp_call_function_mask(void (*func)(void *info), void *info, |
| 766 | int nonatomic, int wait, cpumask_t mask) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 767 | { |
| 768 | struct call_data_struct data; |
David S. Miller | ee29074 | 2006-03-06 22:50:44 -0800 | [diff] [blame] | 769 | int cpus; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 770 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 771 | /* Can deadlock when called with interrupts disabled */ |
| 772 | WARN_ON(irqs_disabled()); |
| 773 | |
| 774 | data.func = func; |
| 775 | data.info = info; |
| 776 | atomic_set(&data.finished, 0); |
| 777 | data.wait = wait; |
| 778 | |
| 779 | spin_lock(&call_lock); |
| 780 | |
David S. Miller | ee29074 | 2006-03-06 22:50:44 -0800 | [diff] [blame] | 781 | cpu_clear(smp_processor_id(), mask); |
| 782 | cpus = cpus_weight(mask); |
| 783 | if (!cpus) |
| 784 | goto out_unlock; |
| 785 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 786 | call_data = &data; |
David S. Miller | aa1d1a0 | 2006-04-06 16:54:33 -0700 | [diff] [blame] | 787 | mb(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 788 | |
David S. Miller | bd40791 | 2006-01-31 18:31:38 -0800 | [diff] [blame] | 789 | smp_cross_call_masked(&xcall_call_function, 0, 0, 0, mask); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 790 | |
David S. Miller | aa1d1a0 | 2006-04-06 16:54:33 -0700 | [diff] [blame] | 791 | /* Wait for response */ |
| 792 | while (atomic_read(&data.finished) != cpus) |
| 793 | cpu_relax(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 794 | |
David S. Miller | ee29074 | 2006-03-06 22:50:44 -0800 | [diff] [blame] | 795 | out_unlock: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 796 | spin_unlock(&call_lock); |
| 797 | |
| 798 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 799 | } |
| 800 | |
David S. Miller | bd40791 | 2006-01-31 18:31:38 -0800 | [diff] [blame] | 801 | int smp_call_function(void (*func)(void *info), void *info, |
| 802 | int nonatomic, int wait) |
| 803 | { |
| 804 | return smp_call_function_mask(func, info, nonatomic, wait, |
| 805 | cpu_online_map); |
| 806 | } |
| 807 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 808 | void smp_call_function_client(int irq, struct pt_regs *regs) |
| 809 | { |
| 810 | void (*func) (void *info) = call_data->func; |
| 811 | void *info = call_data->info; |
| 812 | |
| 813 | clear_softint(1 << irq); |
| 814 | if (call_data->wait) { |
| 815 | /* let initiator proceed only after completion */ |
| 816 | func(info); |
| 817 | atomic_inc(&call_data->finished); |
| 818 | } else { |
| 819 | /* let initiator proceed after getting data */ |
| 820 | atomic_inc(&call_data->finished); |
| 821 | func(info); |
| 822 | } |
| 823 | } |
| 824 | |
David S. Miller | bd40791 | 2006-01-31 18:31:38 -0800 | [diff] [blame] | 825 | static void tsb_sync(void *info) |
| 826 | { |
David S. Miller | 6f25f39 | 2006-03-28 13:29:26 -0800 | [diff] [blame] | 827 | struct trap_per_cpu *tp = &trap_block[raw_smp_processor_id()]; |
David S. Miller | bd40791 | 2006-01-31 18:31:38 -0800 | [diff] [blame] | 828 | struct mm_struct *mm = info; |
| 829 | |
David S. Miller | 6f25f39 | 2006-03-28 13:29:26 -0800 | [diff] [blame] | 830 | /* It is not valid to test "currrent->active_mm == mm" here. |
| 831 | * |
| 832 | * The value of "current" is not changed atomically with |
| 833 | * switch_mm(). But that's OK, we just need to check the |
| 834 | * current cpu's trap block PGD physical address. |
| 835 | */ |
| 836 | if (tp->pgd_paddr == __pa(mm->pgd)) |
David S. Miller | bd40791 | 2006-01-31 18:31:38 -0800 | [diff] [blame] | 837 | tsb_context_switch(mm); |
| 838 | } |
| 839 | |
| 840 | void smp_tsb_sync(struct mm_struct *mm) |
| 841 | { |
| 842 | smp_call_function_mask(tsb_sync, mm, 0, 1, mm->cpu_vm_mask); |
| 843 | } |
| 844 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 845 | extern unsigned long xcall_flush_tlb_mm; |
| 846 | extern unsigned long xcall_flush_tlb_pending; |
| 847 | extern unsigned long xcall_flush_tlb_kernel_range; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 848 | extern unsigned long xcall_report_regs; |
| 849 | extern unsigned long xcall_receive_signal; |
David S. Miller | ee29074 | 2006-03-06 22:50:44 -0800 | [diff] [blame] | 850 | extern unsigned long xcall_new_mmu_context_version; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 851 | |
| 852 | #ifdef DCACHE_ALIASING_POSSIBLE |
| 853 | extern unsigned long xcall_flush_dcache_page_cheetah; |
| 854 | #endif |
| 855 | extern unsigned long xcall_flush_dcache_page_spitfire; |
| 856 | |
| 857 | #ifdef CONFIG_DEBUG_DCFLUSH |
| 858 | extern atomic_t dcpage_flushes; |
| 859 | extern atomic_t dcpage_flushes_xcall; |
| 860 | #endif |
| 861 | |
| 862 | static __inline__ void __local_flush_dcache_page(struct page *page) |
| 863 | { |
| 864 | #ifdef DCACHE_ALIASING_POSSIBLE |
| 865 | __flush_dcache_page(page_address(page), |
| 866 | ((tlb_type == spitfire) && |
| 867 | page_mapping(page) != NULL)); |
| 868 | #else |
| 869 | if (page_mapping(page) != NULL && |
| 870 | tlb_type == spitfire) |
| 871 | __flush_icache_page(__pa(page_address(page))); |
| 872 | #endif |
| 873 | } |
| 874 | |
| 875 | void smp_flush_dcache_page_impl(struct page *page, int cpu) |
| 876 | { |
| 877 | cpumask_t mask = cpumask_of_cpu(cpu); |
David S. Miller | a43fe0e | 2006-02-04 03:10:53 -0800 | [diff] [blame] | 878 | int this_cpu; |
| 879 | |
| 880 | if (tlb_type == hypervisor) |
| 881 | return; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 882 | |
| 883 | #ifdef CONFIG_DEBUG_DCFLUSH |
| 884 | atomic_inc(&dcpage_flushes); |
| 885 | #endif |
David S. Miller | a43fe0e | 2006-02-04 03:10:53 -0800 | [diff] [blame] | 886 | |
| 887 | this_cpu = get_cpu(); |
| 888 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 889 | if (cpu == this_cpu) { |
| 890 | __local_flush_dcache_page(page); |
| 891 | } else if (cpu_online(cpu)) { |
| 892 | void *pg_addr = page_address(page); |
| 893 | u64 data0; |
| 894 | |
| 895 | if (tlb_type == spitfire) { |
| 896 | data0 = |
| 897 | ((u64)&xcall_flush_dcache_page_spitfire); |
| 898 | if (page_mapping(page) != NULL) |
| 899 | data0 |= ((u64)1 << 32); |
| 900 | spitfire_xcall_deliver(data0, |
| 901 | __pa(pg_addr), |
| 902 | (u64) pg_addr, |
| 903 | mask); |
David S. Miller | a43fe0e | 2006-02-04 03:10:53 -0800 | [diff] [blame] | 904 | } else if (tlb_type == cheetah || tlb_type == cheetah_plus) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 905 | #ifdef DCACHE_ALIASING_POSSIBLE |
| 906 | data0 = |
| 907 | ((u64)&xcall_flush_dcache_page_cheetah); |
| 908 | cheetah_xcall_deliver(data0, |
| 909 | __pa(pg_addr), |
| 910 | 0, mask); |
| 911 | #endif |
| 912 | } |
| 913 | #ifdef CONFIG_DEBUG_DCFLUSH |
| 914 | atomic_inc(&dcpage_flushes_xcall); |
| 915 | #endif |
| 916 | } |
| 917 | |
| 918 | put_cpu(); |
| 919 | } |
| 920 | |
| 921 | void flush_dcache_page_all(struct mm_struct *mm, struct page *page) |
| 922 | { |
| 923 | void *pg_addr = page_address(page); |
| 924 | cpumask_t mask = cpu_online_map; |
| 925 | u64 data0; |
David S. Miller | a43fe0e | 2006-02-04 03:10:53 -0800 | [diff] [blame] | 926 | int this_cpu; |
| 927 | |
| 928 | if (tlb_type == hypervisor) |
| 929 | return; |
| 930 | |
| 931 | this_cpu = get_cpu(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 932 | |
| 933 | cpu_clear(this_cpu, mask); |
| 934 | |
| 935 | #ifdef CONFIG_DEBUG_DCFLUSH |
| 936 | atomic_inc(&dcpage_flushes); |
| 937 | #endif |
| 938 | if (cpus_empty(mask)) |
| 939 | goto flush_self; |
| 940 | if (tlb_type == spitfire) { |
| 941 | data0 = ((u64)&xcall_flush_dcache_page_spitfire); |
| 942 | if (page_mapping(page) != NULL) |
| 943 | data0 |= ((u64)1 << 32); |
| 944 | spitfire_xcall_deliver(data0, |
| 945 | __pa(pg_addr), |
| 946 | (u64) pg_addr, |
| 947 | mask); |
David S. Miller | a43fe0e | 2006-02-04 03:10:53 -0800 | [diff] [blame] | 948 | } else if (tlb_type == cheetah || tlb_type == cheetah_plus) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 949 | #ifdef DCACHE_ALIASING_POSSIBLE |
| 950 | data0 = ((u64)&xcall_flush_dcache_page_cheetah); |
| 951 | cheetah_xcall_deliver(data0, |
| 952 | __pa(pg_addr), |
| 953 | 0, mask); |
| 954 | #endif |
| 955 | } |
| 956 | #ifdef CONFIG_DEBUG_DCFLUSH |
| 957 | atomic_inc(&dcpage_flushes_xcall); |
| 958 | #endif |
| 959 | flush_self: |
| 960 | __local_flush_dcache_page(page); |
| 961 | |
| 962 | put_cpu(); |
| 963 | } |
| 964 | |
David S. Miller | a0663a7 | 2006-02-23 14:19:28 -0800 | [diff] [blame] | 965 | static void __smp_receive_signal_mask(cpumask_t mask) |
| 966 | { |
| 967 | smp_cross_call_masked(&xcall_receive_signal, 0, 0, 0, mask); |
| 968 | } |
| 969 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 970 | void smp_receive_signal(int cpu) |
| 971 | { |
| 972 | cpumask_t mask = cpumask_of_cpu(cpu); |
| 973 | |
David S. Miller | a0663a7 | 2006-02-23 14:19:28 -0800 | [diff] [blame] | 974 | if (cpu_online(cpu)) |
| 975 | __smp_receive_signal_mask(mask); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 976 | } |
| 977 | |
| 978 | void smp_receive_signal_client(int irq, struct pt_regs *regs) |
| 979 | { |
David S. Miller | ee29074 | 2006-03-06 22:50:44 -0800 | [diff] [blame] | 980 | clear_softint(1 << irq); |
| 981 | } |
| 982 | |
| 983 | void smp_new_mmu_context_version_client(int irq, struct pt_regs *regs) |
| 984 | { |
David S. Miller | a0663a7 | 2006-02-23 14:19:28 -0800 | [diff] [blame] | 985 | struct mm_struct *mm; |
David S. Miller | ee29074 | 2006-03-06 22:50:44 -0800 | [diff] [blame] | 986 | unsigned long flags; |
David S. Miller | a0663a7 | 2006-02-23 14:19:28 -0800 | [diff] [blame] | 987 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 988 | clear_softint(1 << irq); |
David S. Miller | a0663a7 | 2006-02-23 14:19:28 -0800 | [diff] [blame] | 989 | |
| 990 | /* See if we need to allocate a new TLB context because |
| 991 | * the version of the one we are using is now out of date. |
| 992 | */ |
| 993 | mm = current->active_mm; |
David S. Miller | ee29074 | 2006-03-06 22:50:44 -0800 | [diff] [blame] | 994 | if (unlikely(!mm || (mm == &init_mm))) |
| 995 | return; |
David S. Miller | a0663a7 | 2006-02-23 14:19:28 -0800 | [diff] [blame] | 996 | |
David S. Miller | ee29074 | 2006-03-06 22:50:44 -0800 | [diff] [blame] | 997 | spin_lock_irqsave(&mm->context.lock, flags); |
David S. Miller | aac0aad | 2006-02-27 17:56:51 -0800 | [diff] [blame] | 998 | |
David S. Miller | ee29074 | 2006-03-06 22:50:44 -0800 | [diff] [blame] | 999 | if (unlikely(!CTX_VALID(mm->context))) |
| 1000 | get_new_mmu_context(mm); |
David S. Miller | aac0aad | 2006-02-27 17:56:51 -0800 | [diff] [blame] | 1001 | |
David S. Miller | ee29074 | 2006-03-06 22:50:44 -0800 | [diff] [blame] | 1002 | spin_unlock_irqrestore(&mm->context.lock, flags); |
David S. Miller | aac0aad | 2006-02-27 17:56:51 -0800 | [diff] [blame] | 1003 | |
David S. Miller | ee29074 | 2006-03-06 22:50:44 -0800 | [diff] [blame] | 1004 | load_secondary_context(mm); |
| 1005 | __flush_tlb_mm(CTX_HWBITS(mm->context), |
| 1006 | SECONDARY_CONTEXT); |
David S. Miller | a0663a7 | 2006-02-23 14:19:28 -0800 | [diff] [blame] | 1007 | } |
| 1008 | |
| 1009 | void smp_new_mmu_context_version(void) |
| 1010 | { |
David S. Miller | ee29074 | 2006-03-06 22:50:44 -0800 | [diff] [blame] | 1011 | smp_cross_call(&xcall_new_mmu_context_version, 0, 0, 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1012 | } |
| 1013 | |
| 1014 | void smp_report_regs(void) |
| 1015 | { |
| 1016 | smp_cross_call(&xcall_report_regs, 0, 0, 0); |
| 1017 | } |
| 1018 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1019 | /* We know that the window frames of the user have been flushed |
| 1020 | * to the stack before we get here because all callers of us |
| 1021 | * are flush_tlb_*() routines, and these run after flush_cache_*() |
| 1022 | * which performs the flushw. |
| 1023 | * |
| 1024 | * The SMP TLB coherency scheme we use works as follows: |
| 1025 | * |
| 1026 | * 1) mm->cpu_vm_mask is a bit mask of which cpus an address |
| 1027 | * space has (potentially) executed on, this is the heuristic |
| 1028 | * we use to avoid doing cross calls. |
| 1029 | * |
| 1030 | * Also, for flushing from kswapd and also for clones, we |
| 1031 | * use cpu_vm_mask as the list of cpus to make run the TLB. |
| 1032 | * |
| 1033 | * 2) TLB context numbers are shared globally across all processors |
| 1034 | * in the system, this allows us to play several games to avoid |
| 1035 | * cross calls. |
| 1036 | * |
| 1037 | * One invariant is that when a cpu switches to a process, and |
| 1038 | * that processes tsk->active_mm->cpu_vm_mask does not have the |
| 1039 | * current cpu's bit set, that tlb context is flushed locally. |
| 1040 | * |
| 1041 | * If the address space is non-shared (ie. mm->count == 1) we avoid |
| 1042 | * cross calls when we want to flush the currently running process's |
| 1043 | * tlb state. This is done by clearing all cpu bits except the current |
| 1044 | * processor's in current->active_mm->cpu_vm_mask and performing the |
| 1045 | * flush locally only. This will force any subsequent cpus which run |
| 1046 | * this task to flush the context from the local tlb if the process |
| 1047 | * migrates to another cpu (again). |
| 1048 | * |
| 1049 | * 3) For shared address spaces (threads) and swapping we bite the |
| 1050 | * bullet for most cases and perform the cross call (but only to |
| 1051 | * the cpus listed in cpu_vm_mask). |
| 1052 | * |
| 1053 | * The performance gain from "optimizing" away the cross call for threads is |
| 1054 | * questionable (in theory the big win for threads is the massive sharing of |
| 1055 | * address space state across processors). |
| 1056 | */ |
David S. Miller | 62dbec7 | 2005-11-07 14:09:58 -0800 | [diff] [blame] | 1057 | |
| 1058 | /* This currently is only used by the hugetlb arch pre-fault |
| 1059 | * hook on UltraSPARC-III+ and later when changing the pagesize |
| 1060 | * bits of the context register for an address space. |
| 1061 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1062 | void smp_flush_tlb_mm(struct mm_struct *mm) |
| 1063 | { |
David S. Miller | 62dbec7 | 2005-11-07 14:09:58 -0800 | [diff] [blame] | 1064 | u32 ctx = CTX_HWBITS(mm->context); |
| 1065 | int cpu = get_cpu(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1066 | |
David S. Miller | 62dbec7 | 2005-11-07 14:09:58 -0800 | [diff] [blame] | 1067 | if (atomic_read(&mm->mm_users) == 1) { |
| 1068 | mm->cpu_vm_mask = cpumask_of_cpu(cpu); |
| 1069 | goto local_flush_and_out; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1070 | } |
David S. Miller | 62dbec7 | 2005-11-07 14:09:58 -0800 | [diff] [blame] | 1071 | |
| 1072 | smp_cross_call_masked(&xcall_flush_tlb_mm, |
| 1073 | ctx, 0, 0, |
| 1074 | mm->cpu_vm_mask); |
| 1075 | |
| 1076 | local_flush_and_out: |
| 1077 | __flush_tlb_mm(ctx, SECONDARY_CONTEXT); |
| 1078 | |
| 1079 | put_cpu(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1080 | } |
| 1081 | |
| 1082 | void smp_flush_tlb_pending(struct mm_struct *mm, unsigned long nr, unsigned long *vaddrs) |
| 1083 | { |
| 1084 | u32 ctx = CTX_HWBITS(mm->context); |
| 1085 | int cpu = get_cpu(); |
| 1086 | |
Hugh Dickins | dedeb00 | 2005-11-07 14:09:01 -0800 | [diff] [blame] | 1087 | if (mm == current->active_mm && atomic_read(&mm->mm_users) == 1) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1088 | mm->cpu_vm_mask = cpumask_of_cpu(cpu); |
Hugh Dickins | dedeb00 | 2005-11-07 14:09:01 -0800 | [diff] [blame] | 1089 | else |
| 1090 | smp_cross_call_masked(&xcall_flush_tlb_pending, |
| 1091 | ctx, nr, (unsigned long) vaddrs, |
| 1092 | mm->cpu_vm_mask); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1093 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1094 | __flush_tlb_pending(ctx, nr, vaddrs); |
| 1095 | |
| 1096 | put_cpu(); |
| 1097 | } |
| 1098 | |
| 1099 | void smp_flush_tlb_kernel_range(unsigned long start, unsigned long end) |
| 1100 | { |
| 1101 | start &= PAGE_MASK; |
| 1102 | end = PAGE_ALIGN(end); |
| 1103 | if (start != end) { |
| 1104 | smp_cross_call(&xcall_flush_tlb_kernel_range, |
| 1105 | 0, start, end); |
| 1106 | |
| 1107 | __flush_tlb_kernel_range(start, end); |
| 1108 | } |
| 1109 | } |
| 1110 | |
| 1111 | /* CPU capture. */ |
| 1112 | /* #define CAPTURE_DEBUG */ |
| 1113 | extern unsigned long xcall_capture; |
| 1114 | |
| 1115 | static atomic_t smp_capture_depth = ATOMIC_INIT(0); |
| 1116 | static atomic_t smp_capture_registry = ATOMIC_INIT(0); |
| 1117 | static unsigned long penguins_are_doing_time; |
| 1118 | |
| 1119 | void smp_capture(void) |
| 1120 | { |
| 1121 | int result = atomic_add_ret(1, &smp_capture_depth); |
| 1122 | |
| 1123 | if (result == 1) { |
| 1124 | int ncpus = num_online_cpus(); |
| 1125 | |
| 1126 | #ifdef CAPTURE_DEBUG |
| 1127 | printk("CPU[%d]: Sending penguins to jail...", |
| 1128 | smp_processor_id()); |
| 1129 | #endif |
| 1130 | penguins_are_doing_time = 1; |
David S. Miller | 4f07118 | 2005-08-29 12:46:22 -0700 | [diff] [blame] | 1131 | membar_storestore_loadstore(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1132 | atomic_inc(&smp_capture_registry); |
| 1133 | smp_cross_call(&xcall_capture, 0, 0, 0); |
| 1134 | while (atomic_read(&smp_capture_registry) != ncpus) |
David S. Miller | 4f07118 | 2005-08-29 12:46:22 -0700 | [diff] [blame] | 1135 | rmb(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1136 | #ifdef CAPTURE_DEBUG |
| 1137 | printk("done\n"); |
| 1138 | #endif |
| 1139 | } |
| 1140 | } |
| 1141 | |
| 1142 | void smp_release(void) |
| 1143 | { |
| 1144 | if (atomic_dec_and_test(&smp_capture_depth)) { |
| 1145 | #ifdef CAPTURE_DEBUG |
| 1146 | printk("CPU[%d]: Giving pardon to " |
| 1147 | "imprisoned penguins\n", |
| 1148 | smp_processor_id()); |
| 1149 | #endif |
| 1150 | penguins_are_doing_time = 0; |
David S. Miller | 4f07118 | 2005-08-29 12:46:22 -0700 | [diff] [blame] | 1151 | membar_storeload_storestore(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1152 | atomic_dec(&smp_capture_registry); |
| 1153 | } |
| 1154 | } |
| 1155 | |
| 1156 | /* Imprisoned penguins run with %pil == 15, but PSTATE_IE set, so they |
| 1157 | * can service tlb flush xcalls... |
| 1158 | */ |
| 1159 | extern void prom_world(int); |
David S. Miller | 96c6e0d | 2006-01-31 18:32:29 -0800 | [diff] [blame] | 1160 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1161 | void smp_penguin_jailcell(int irq, struct pt_regs *regs) |
| 1162 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1163 | clear_softint(1 << irq); |
| 1164 | |
| 1165 | preempt_disable(); |
| 1166 | |
| 1167 | __asm__ __volatile__("flushw"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1168 | prom_world(1); |
| 1169 | atomic_inc(&smp_capture_registry); |
David S. Miller | 4f07118 | 2005-08-29 12:46:22 -0700 | [diff] [blame] | 1170 | membar_storeload_storestore(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1171 | while (penguins_are_doing_time) |
David S. Miller | 4f07118 | 2005-08-29 12:46:22 -0700 | [diff] [blame] | 1172 | rmb(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1173 | atomic_dec(&smp_capture_registry); |
| 1174 | prom_world(0); |
| 1175 | |
| 1176 | preempt_enable(); |
| 1177 | } |
| 1178 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1179 | void __init smp_tick_init(void) |
| 1180 | { |
| 1181 | boot_cpu_id = hard_smp_processor_id(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1182 | } |
| 1183 | |
| 1184 | /* /proc/profile writes can call this, don't __init it please. */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1185 | int setup_profiling_timer(unsigned int multiplier) |
| 1186 | { |
David S. Miller | 777a447 | 2007-02-22 06:24:10 -0800 | [diff] [blame] | 1187 | return -EINVAL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1188 | } |
| 1189 | |
David S. Miller | 9145bcf | 2006-06-10 22:02:17 -0700 | [diff] [blame] | 1190 | static void __init smp_tune_scheduling(void) |
| 1191 | { |
David S. Miller | 07f8e5f | 2006-06-21 23:34:02 -0700 | [diff] [blame] | 1192 | struct device_node *dp; |
| 1193 | int instance; |
David S. Miller | 9145bcf | 2006-06-10 22:02:17 -0700 | [diff] [blame] | 1194 | unsigned int def, smallest = ~0U; |
| 1195 | |
| 1196 | def = ((tlb_type == hypervisor) ? |
| 1197 | (3 * 1024 * 1024) : |
| 1198 | (4 * 1024 * 1024)); |
| 1199 | |
| 1200 | instance = 0; |
David S. Miller | 07f8e5f | 2006-06-21 23:34:02 -0700 | [diff] [blame] | 1201 | while (!cpu_find_by_instance(instance, &dp, NULL)) { |
David S. Miller | 9145bcf | 2006-06-10 22:02:17 -0700 | [diff] [blame] | 1202 | unsigned int val; |
| 1203 | |
David S. Miller | 07f8e5f | 2006-06-21 23:34:02 -0700 | [diff] [blame] | 1204 | val = of_getintprop_default(dp, "ecache-size", def); |
David S. Miller | 9145bcf | 2006-06-10 22:02:17 -0700 | [diff] [blame] | 1205 | if (val < smallest) |
| 1206 | smallest = val; |
| 1207 | |
| 1208 | instance++; |
| 1209 | } |
| 1210 | |
| 1211 | /* Any value less than 256K is nonsense. */ |
| 1212 | if (smallest < (256U * 1024U)) |
| 1213 | smallest = 256 * 1024; |
| 1214 | |
| 1215 | max_cache_size = smallest; |
| 1216 | |
| 1217 | if (smallest < 1U * 1024U * 1024U) |
| 1218 | printk(KERN_INFO "Using max_cache_size of %uKB\n", |
| 1219 | smallest / 1024U); |
| 1220 | else |
| 1221 | printk(KERN_INFO "Using max_cache_size of %uMB\n", |
| 1222 | smallest / 1024U / 1024U); |
| 1223 | } |
| 1224 | |
David S. Miller | 7abea92 | 2006-02-25 13:39:56 -0800 | [diff] [blame] | 1225 | /* Constrain the number of cpus to max_cpus. */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1226 | void __init smp_prepare_cpus(unsigned int max_cpus) |
| 1227 | { |
David S. Miller | 8935dce | 2006-03-08 16:09:19 -0800 | [diff] [blame] | 1228 | int i; |
| 1229 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1230 | if (num_possible_cpus() > max_cpus) { |
David S. Miller | 7abea92 | 2006-02-25 13:39:56 -0800 | [diff] [blame] | 1231 | int instance, mid; |
| 1232 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1233 | instance = 0; |
| 1234 | while (!cpu_find_by_instance(instance, NULL, &mid)) { |
| 1235 | if (mid != boot_cpu_id) { |
| 1236 | cpu_clear(mid, phys_cpu_present_map); |
David S. Miller | 7d3aee9 | 2006-03-25 13:00:17 -0800 | [diff] [blame] | 1237 | cpu_clear(mid, cpu_present_map); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1238 | if (num_possible_cpus() <= max_cpus) |
| 1239 | break; |
| 1240 | } |
| 1241 | instance++; |
| 1242 | } |
| 1243 | } |
| 1244 | |
KAMEZAWA Hiroyuki | a283a52 | 2006-04-10 22:52:52 -0700 | [diff] [blame] | 1245 | for_each_possible_cpu(i) { |
David S. Miller | 8935dce | 2006-03-08 16:09:19 -0800 | [diff] [blame] | 1246 | if (tlb_type == hypervisor) { |
| 1247 | int j; |
| 1248 | |
| 1249 | /* XXX get this mapping from machine description */ |
KAMEZAWA Hiroyuki | a283a52 | 2006-04-10 22:52:52 -0700 | [diff] [blame] | 1250 | for_each_possible_cpu(j) { |
David S. Miller | 8935dce | 2006-03-08 16:09:19 -0800 | [diff] [blame] | 1251 | if ((j >> 2) == (i >> 2)) |
| 1252 | cpu_set(j, cpu_sibling_map[i]); |
| 1253 | } |
| 1254 | } else { |
| 1255 | cpu_set(i, cpu_sibling_map[i]); |
| 1256 | } |
| 1257 | } |
| 1258 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1259 | smp_store_cpu_info(boot_cpu_id); |
David S. Miller | 9145bcf | 2006-06-10 22:02:17 -0700 | [diff] [blame] | 1260 | smp_tune_scheduling(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1261 | } |
| 1262 | |
David S. Miller | 7abea92 | 2006-02-25 13:39:56 -0800 | [diff] [blame] | 1263 | /* Set this up early so that things like the scheduler can init |
| 1264 | * properly. We use the same cpu mask for both the present and |
| 1265 | * possible cpu map. |
| 1266 | */ |
| 1267 | void __init smp_setup_cpu_possible_map(void) |
| 1268 | { |
| 1269 | int instance, mid; |
| 1270 | |
| 1271 | instance = 0; |
| 1272 | while (!cpu_find_by_instance(instance, NULL, &mid)) { |
David S. Miller | 7d3aee9 | 2006-03-25 13:00:17 -0800 | [diff] [blame] | 1273 | if (mid < NR_CPUS) { |
David S. Miller | 7abea92 | 2006-02-25 13:39:56 -0800 | [diff] [blame] | 1274 | cpu_set(mid, phys_cpu_present_map); |
David S. Miller | 7d3aee9 | 2006-03-25 13:00:17 -0800 | [diff] [blame] | 1275 | cpu_set(mid, cpu_present_map); |
| 1276 | } |
David S. Miller | 7abea92 | 2006-02-25 13:39:56 -0800 | [diff] [blame] | 1277 | instance++; |
| 1278 | } |
| 1279 | } |
| 1280 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1281 | void __devinit smp_prepare_boot_cpu(void) |
| 1282 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1283 | } |
| 1284 | |
Gautham R Shenoy | b282b6f | 2007-01-10 23:15:34 -0800 | [diff] [blame] | 1285 | int __cpuinit __cpu_up(unsigned int cpu) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1286 | { |
| 1287 | int ret = smp_boot_one_cpu(cpu); |
| 1288 | |
| 1289 | if (!ret) { |
| 1290 | cpu_set(cpu, smp_commenced_mask); |
| 1291 | while (!cpu_isset(cpu, cpu_online_map)) |
| 1292 | mb(); |
| 1293 | if (!cpu_isset(cpu, cpu_online_map)) { |
| 1294 | ret = -ENODEV; |
| 1295 | } else { |
David S. Miller | 02fead7 | 2006-02-11 23:22:47 -0800 | [diff] [blame] | 1296 | /* On SUN4V, writes to %tick and %stick are |
| 1297 | * not allowed. |
| 1298 | */ |
| 1299 | if (tlb_type != hypervisor) |
| 1300 | smp_synchronize_one_tick(cpu); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1301 | } |
| 1302 | } |
| 1303 | return ret; |
| 1304 | } |
| 1305 | |
| 1306 | void __init smp_cpus_done(unsigned int max_cpus) |
| 1307 | { |
| 1308 | unsigned long bogosum = 0; |
| 1309 | int i; |
| 1310 | |
Andrew Morton | 394e390 | 2006-03-23 03:01:05 -0800 | [diff] [blame] | 1311 | for_each_online_cpu(i) |
| 1312 | bogosum += cpu_data(i).udelay_val; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1313 | printk("Total of %ld processors activated " |
| 1314 | "(%lu.%02lu BogoMIPS).\n", |
| 1315 | (long) num_online_cpus(), |
| 1316 | bogosum/(500000/HZ), |
| 1317 | (bogosum/(5000/HZ))%100); |
| 1318 | } |
| 1319 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1320 | void smp_send_reschedule(int cpu) |
| 1321 | { |
Nick Piggin | 64c7c8f | 2005-11-08 21:39:04 -0800 | [diff] [blame] | 1322 | smp_receive_signal(cpu); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1323 | } |
| 1324 | |
| 1325 | /* This is a nop because we capture all other cpus |
| 1326 | * anyways when making the PROM active. |
| 1327 | */ |
| 1328 | void smp_send_stop(void) |
| 1329 | { |
| 1330 | } |
| 1331 | |
David S. Miller | d369ddd | 2005-07-10 15:45:11 -0700 | [diff] [blame] | 1332 | unsigned long __per_cpu_base __read_mostly; |
| 1333 | unsigned long __per_cpu_shift __read_mostly; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1334 | |
| 1335 | EXPORT_SYMBOL(__per_cpu_base); |
| 1336 | EXPORT_SYMBOL(__per_cpu_shift); |
| 1337 | |
| 1338 | void __init setup_per_cpu_areas(void) |
| 1339 | { |
| 1340 | unsigned long goal, size, i; |
| 1341 | char *ptr; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1342 | |
| 1343 | /* Copy section for each CPU (we discard the original) */ |
David S. Miller | 5a08900 | 2006-12-14 23:40:57 -0800 | [diff] [blame] | 1344 | goal = PERCPU_ENOUGH_ROOM; |
| 1345 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1346 | __per_cpu_shift = 0; |
| 1347 | for (size = 1UL; size < goal; size <<= 1UL) |
| 1348 | __per_cpu_shift++; |
| 1349 | |
David S. Miller | 56fb4df | 2006-02-26 23:24:22 -0800 | [diff] [blame] | 1350 | ptr = alloc_bootmem(size * NR_CPUS); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1351 | |
| 1352 | __per_cpu_base = ptr - __per_cpu_start; |
| 1353 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1354 | for (i = 0; i < NR_CPUS; i++, ptr += size) |
| 1355 | memcpy(ptr, __per_cpu_start, __per_cpu_end - __per_cpu_start); |
David S. Miller | 951bc82 | 2006-05-31 01:24:02 -0700 | [diff] [blame] | 1356 | |
| 1357 | /* Setup %g5 for the boot cpu. */ |
| 1358 | __local_per_cpu_offset = __per_cpu_offset(smp_processor_id()); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1359 | } |