[MIPS] Use the proper technical term for naming some of the cache macros.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index 857b726..ed35ee5 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -578,7 +578,7 @@
* secondary cache will result in any entries in the primary caches
* also getting invalidated which hopefully is a bit more economical.
*/
- if (cpu_has_subset_pcaches) {
+ if (cpu_has_inclusive_pcaches) {
unsigned long addr = (unsigned long) page_address(page);
r4k_blast_scache_page(addr);
@@ -634,7 +634,7 @@
/* Catch bad driver code */
BUG_ON(size == 0);
- if (cpu_has_subset_pcaches) {
+ if (cpu_has_inclusive_pcaches) {
if (size >= scache_size)
r4k_blast_scache();
else
@@ -662,7 +662,7 @@
/* Catch bad driver code */
BUG_ON(size == 0);
- if (cpu_has_subset_pcaches) {
+ if (cpu_has_inclusive_pcaches) {
if (size >= scache_size)
r4k_blast_scache();
else
@@ -1192,7 +1192,7 @@
printk("Unified secondary cache %ldkB %s, linesize %d bytes.\n",
scache_size >> 10, way_string[c->scache.ways], c->scache.linesz);
- c->options |= MIPS_CPU_SUBSET_CACHES;
+ c->options |= MIPS_CPU_INCLUSIVE_CACHES;
}
void au1x00_fixup_config_od(void)
