| commit | e44b8941908ec9ccf03b52713c9e7d3471bada8c | [log] [tgz] |
|---|---|---|
| author | Dale Farnsworth <dale@farnsworth.org> | Sat May 12 10:55:24 2007 +1000 |
| committer | Paul Mackerras <paulus@samba.org> | Sat May 12 11:32:49 2007 +1000 |
| tree | 750f6cf76959a64592223b32d11883bb04b8aba1 | |
| parent | ae4b3fbc7a91ea4e5685edb0310bb185a12e5943 [diff] |
[POWERPC] Add interrupt support for Marvell mv64x60 chips There are 3 interrupt groups each with its own status/mask registers. We use a separate struct irq_chip for each interrupt group and handle interrupts in two stages or levels: level 1 selects the appropriate struct irq_chip, and level 2 selects individual interrupts within that irq_chip. Signed-off-by: Dale Farnsworth <dale@farnsworth.org> Signed-off-by: Paul Mackerras <paulus@samba.org>