x86/oprofile: replace CTRL_SET_*ACTIVE macros
The patch replaces all CTRL_SET_*ACTIVE macros. 64 bit MSR functions
and 64 bit counter values are used now. The code uses bit masks from
<asm/intel_arch_perfmon.h>.
Signed-off-by: Robert Richter <robert.richter@amd.com>
diff --git a/arch/x86/oprofile/op_model_ppro.c b/arch/x86/oprofile/op_model_ppro.c
index 82db396..566b43f 100644
--- a/arch/x86/oprofile/op_model_ppro.c
+++ b/arch/x86/oprofile/op_model_ppro.c
@@ -145,16 +145,16 @@
static void ppro_start(struct op_msrs const * const msrs)
{
- unsigned int low, high;
+ u64 val;
int i;
if (!reset_value)
return;
for (i = 0; i < num_counters; ++i) {
if (reset_value[i]) {
- rdmsr(msrs->controls[i].addr, low, high);
- CTRL_SET_ACTIVE(low);
- wrmsr(msrs->controls[i].addr, low, high);
+ rdmsrl(msrs->controls[i].addr, val);
+ val |= ARCH_PERFMON_EVENTSEL0_ENABLE;
+ wrmsrl(msrs->controls[i].addr, val);
}
}
}
@@ -162,7 +162,7 @@
static void ppro_stop(struct op_msrs const * const msrs)
{
- unsigned int low, high;
+ u64 val;
int i;
if (!reset_value)
@@ -170,9 +170,9 @@
for (i = 0; i < num_counters; ++i) {
if (!reset_value[i])
continue;
- rdmsr(msrs->controls[i].addr, low, high);
- CTRL_SET_INACTIVE(low);
- wrmsr(msrs->controls[i].addr, low, high);
+ rdmsrl(msrs->controls[i].addr, val);
+ val &= ~ARCH_PERFMON_EVENTSEL0_ENABLE;
+ wrmsrl(msrs->controls[i].addr, val);
}
}
