ARM: spear: make clock driver independent of headers
Device drivers should not access MMIO registers through hardcoded
platform specific address constants. Instead, we can pass the
MMIO token to the spear clock driver in the initialization routine
to contain that knowledge in the platform code itself.
Ideally, the clock driver would use of_iomap() or similar to
get the address, and that can be used later, but for now, this
is the minimal change.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
diff --git a/arch/arm/mach-spear/generic.h b/arch/arm/mach-spear/generic.h
index af47d9b..8ba7e75 100644
--- a/arch/arm/mach-spear/generic.h
+++ b/arch/arm/mach-spear/generic.h
@@ -29,10 +29,11 @@
bool dw_dma_filter(struct dma_chan *chan, void *slave);
void __init spear_setup_of_timer(void);
-void __init spear3xx_clk_init(void);
+void __init spear3xx_clk_init(void __iomem *misc_base,
+ void __iomem *soc_config_base);
void __init spear3xx_map_io(void);
void __init spear3xx_dt_init_irq(void);
-void __init spear6xx_clk_init(void);
+void __init spear6xx_clk_init(void __iomem *misc_base);
void __init spear13xx_map_io(void);
void __init spear13xx_l2x0_init(void);
@@ -44,15 +45,15 @@
extern struct smp_operations spear13xx_smp_ops;
#ifdef CONFIG_MACH_SPEAR1310
-void __init spear1310_clk_init(void);
+void __init spear1310_clk_init(void __iomem *misc_base, void __iomem *ras_base);
#else
-static inline void spear1310_clk_init(void) {}
+static inline void spear1310_clk_init(void __iomem *misc_base, void __iomem *ras_base) {}
#endif
#ifdef CONFIG_MACH_SPEAR1340
-void __init spear1340_clk_init(void);
+void __init spear1340_clk_init(void __iomem *misc_base);
#else
-static inline void spear1340_clk_init(void) {}
+static inline void spear1340_clk_init(void __iomem *misc_base) {}
#endif
#endif /* __MACH_GENERIC_H */
diff --git a/arch/arm/mach-spear/include/mach/misc_regs.h b/arch/arm/mach-spear/include/mach/misc_regs.h
index 075812c..935639c 100644
--- a/arch/arm/mach-spear/include/mach/misc_regs.h
+++ b/arch/arm/mach-spear/include/mach/misc_regs.h
@@ -16,7 +16,7 @@
#include <mach/spear.h>
-#define MISC_BASE IOMEM(VA_SPEAR_ICM3_MISC_REG_BASE)
+#define MISC_BASE (VA_SPEAR_ICM3_MISC_REG_BASE)
#define DMA_CHN_CFG (MISC_BASE + 0x0A0)
#endif /* __MACH_MISC_REGS_H */
diff --git a/arch/arm/mach-spear/include/mach/spear.h b/arch/arm/mach-spear/include/mach/spear.h
index 2198ab9..374ddc3 100644
--- a/arch/arm/mach-spear/include/mach/spear.h
+++ b/arch/arm/mach-spear/include/mach/spear.h
@@ -19,23 +19,23 @@
/* ICM1 - Low speed connection */
#define SPEAR_ICM1_2_BASE UL(0xD0000000)
-#define VA_SPEAR_ICM1_2_BASE UL(0xFD000000)
+#define VA_SPEAR_ICM1_2_BASE IOMEM(0xFD000000)
#define SPEAR_ICM1_UART_BASE UL(0xD0000000)
-#define VA_SPEAR_ICM1_UART_BASE (VA_SPEAR_ICM1_2_BASE | SPEAR_ICM1_UART_BASE)
+#define VA_SPEAR_ICM1_UART_BASE (VA_SPEAR_ICM1_2_BASE - SPEAR_ICM1_2_BASE + SPEAR_ICM1_UART_BASE)
#define SPEAR3XX_ICM1_SSP_BASE UL(0xD0100000)
/* ML-1, 2 - Multi Layer CPU Subsystem */
#define SPEAR_ICM3_ML1_2_BASE UL(0xF0000000)
-#define VA_SPEAR6XX_ML_CPU_BASE UL(0xF0000000)
+#define VA_SPEAR6XX_ML_CPU_BASE IOMEM(0xF0000000)
/* ICM3 - Basic Subsystem */
#define SPEAR_ICM3_SMI_CTRL_BASE UL(0xFC000000)
-#define VA_SPEAR_ICM3_SMI_CTRL_BASE UL(0xFC000000)
+#define VA_SPEAR_ICM3_SMI_CTRL_BASE IOMEM(0xFC000000)
#define SPEAR_ICM3_DMA_BASE UL(0xFC400000)
#define SPEAR_ICM3_SYS_CTRL_BASE UL(0xFCA00000)
-#define VA_SPEAR_ICM3_SYS_CTRL_BASE (VA_SPEAR_ICM3_SMI_CTRL_BASE | SPEAR_ICM3_SYS_CTRL_BASE)
+#define VA_SPEAR_ICM3_SYS_CTRL_BASE (VA_SPEAR_ICM3_SMI_CTRL_BASE - SPEAR_ICM3_SMI_CTRL_BASE + SPEAR_ICM3_SYS_CTRL_BASE)
#define SPEAR_ICM3_MISC_REG_BASE UL(0xFCA80000)
-#define VA_SPEAR_ICM3_MISC_REG_BASE (VA_SPEAR_ICM3_SMI_CTRL_BASE | SPEAR_ICM3_MISC_REG_BASE)
+#define VA_SPEAR_ICM3_MISC_REG_BASE (VA_SPEAR_ICM3_SMI_CTRL_BASE - SPEAR_ICM3_SMI_CTRL_BASE + SPEAR_ICM3_MISC_REG_BASE)
/* Debug uart for linux, will be used for debug and uncompress messages */
#define SPEAR_DBG_UART_BASE SPEAR_ICM1_UART_BASE
@@ -44,20 +44,11 @@
/* Sysctl base for spear platform */
#define SPEAR_SYS_CTRL_BASE SPEAR_ICM3_SYS_CTRL_BASE
#define VA_SPEAR_SYS_CTRL_BASE VA_SPEAR_ICM3_SYS_CTRL_BASE
+#endif /* SPEAR3xx || SPEAR6XX */
/* SPEAr320 Macros */
#define SPEAR320_SOC_CONFIG_BASE UL(0xB3000000)
-#define VA_SPEAR320_SOC_CONFIG_BASE UL(0xFE000000)
-#define SPEAR320_CONTROL_REG IOMEM(VA_SPEAR320_SOC_CONFIG_BASE)
-#define SPEAR320_EXT_CTRL_REG IOMEM(VA_SPEAR320_SOC_CONFIG_BASE + 0x0018)
- #define SPEAR320_UARTX_PCLK_MASK 0x1
- #define SPEAR320_UART2_PCLK_SHIFT 8
- #define SPEAR320_UART3_PCLK_SHIFT 9
- #define SPEAR320_UART4_PCLK_SHIFT 10
- #define SPEAR320_UART5_PCLK_SHIFT 11
- #define SPEAR320_UART6_PCLK_SHIFT 12
- #define SPEAR320_RS485_PCLK_SHIFT 13
-#endif /* SPEAR3xx || SPEAR6XX */
+#define VA_SPEAR320_SOC_CONFIG_BASE IOMEM(0xFE000000)
#ifdef CONFIG_ARCH_SPEAR13XX
@@ -79,6 +70,9 @@
#define A9SM_AND_MPMC_BASE UL(0xEC000000)
#define VA_A9SM_AND_MPMC_BASE IOMEM(0xFC000000)
+#define SPEAR1310_RAS_BASE UL(0xD8400000)
+#define VA_SPEAR1310_RAS_BASE IOMEM(UL(0xFA400000))
+
/* A9SM peripheral offsets */
#define A9SM_PERIP_BASE UL(0xEC800000)
#define VA_A9SM_PERIP_BASE IOMEM(0xFC800000)
diff --git a/arch/arm/mach-spear/spear1310.c b/arch/arm/mach-spear/spear1310.c
index fe868b2..ed3b5c2 100644
--- a/arch/arm/mach-spear/spear1310.c
+++ b/arch/arm/mach-spear/spear1310.c
@@ -30,8 +30,6 @@
#define SPEAR1310_RAS_GRP1_BASE UL(0xD8000000)
#define VA_SPEAR1310_RAS_GRP1_BASE UL(0xFA000000)
-#define SPEAR1310_RAS_BASE UL(0xD8400000)
-#define VA_SPEAR1310_RAS_BASE IOMEM(UL(0xFA400000))
static struct arasan_cf_pdata cf_pdata = {
.cf_if_clk = CF_IF_CLK_166M,
diff --git a/arch/arm/mach-spear/spear13xx.c b/arch/arm/mach-spear/spear13xx.c
index 6f62dd5..1b97e86 100644
--- a/arch/arm/mach-spear/spear13xx.c
+++ b/arch/arm/mach-spear/spear13xx.c
@@ -146,9 +146,9 @@
static void __init spear13xx_clk_init(void)
{
if (of_machine_is_compatible("st,spear1310"))
- spear1310_clk_init();
+ spear1310_clk_init(VA_MISC_BASE, VA_SPEAR1310_RAS_BASE);
else if (of_machine_is_compatible("st,spear1340"))
- spear1340_clk_init();
+ spear1340_clk_init(VA_MISC_BASE);
else
pr_err("%s: Unknown machine\n", __func__);
}
diff --git a/arch/arm/mach-spear/spear320.c b/arch/arm/mach-spear/spear320.c
index b8a4bb5..6eb3eec 100644
--- a/arch/arm/mach-spear/spear320.c
+++ b/arch/arm/mach-spear/spear320.c
@@ -254,7 +254,7 @@
struct map_desc spear320_io_desc[] __initdata = {
{
- .virtual = VA_SPEAR320_SOC_CONFIG_BASE,
+ .virtual = (unsigned long)VA_SPEAR320_SOC_CONFIG_BASE,
.pfn = __phys_to_pfn(SPEAR320_SOC_CONFIG_BASE),
.length = SZ_16M,
.type = MT_DEVICE
diff --git a/arch/arm/mach-spear/spear3xx.c b/arch/arm/mach-spear/spear3xx.c
index be0c94d..0227c97 100644
--- a/arch/arm/mach-spear/spear3xx.c
+++ b/arch/arm/mach-spear/spear3xx.c
@@ -21,6 +21,7 @@
#include "pl080.h"
#include "generic.h"
#include <mach/spear.h>
+#include <mach/misc_regs.h>
/* ssp device registration */
struct pl022_ssp_controller pl022_plat_data = {
@@ -67,12 +68,12 @@
*/
struct map_desc spear3xx_io_desc[] __initdata = {
{
- .virtual = VA_SPEAR_ICM1_2_BASE,
+ .virtual = (unsigned long)VA_SPEAR_ICM1_2_BASE,
.pfn = __phys_to_pfn(SPEAR_ICM1_2_BASE),
.length = SZ_16M,
.type = MT_DEVICE
}, {
- .virtual = VA_SPEAR_ICM3_SMI_CTRL_BASE,
+ .virtual = (unsigned long)VA_SPEAR_ICM3_SMI_CTRL_BASE,
.pfn = __phys_to_pfn(SPEAR_ICM3_SMI_CTRL_BASE),
.length = SZ_16M,
.type = MT_DEVICE
@@ -90,7 +91,7 @@
char pclk_name[] = "pll3_clk";
struct clk *gpt_clk, *pclk;
- spear3xx_clk_init();
+ spear3xx_clk_init(MISC_BASE, VA_SPEAR320_SOC_CONFIG_BASE);
/* get the system timer clock */
gpt_clk = clk_get_sys("gpt0", NULL);
diff --git a/arch/arm/mach-spear/spear6xx.c b/arch/arm/mach-spear/spear6xx.c
index 78e1359..9b5ea25 100644
--- a/arch/arm/mach-spear/spear6xx.c
+++ b/arch/arm/mach-spear/spear6xx.c
@@ -27,6 +27,7 @@
#include "pl080.h"
#include "generic.h"
#include <mach/spear.h>
+#include <mach/misc_regs.h>
/* dmac device registration */
static struct pl08x_channel_data spear600_dma_info[] = {
@@ -350,17 +351,17 @@
*/
struct map_desc spear6xx_io_desc[] __initdata = {
{
- .virtual = VA_SPEAR6XX_ML_CPU_BASE,
+ .virtual = (unsigned long)VA_SPEAR6XX_ML_CPU_BASE,
.pfn = __phys_to_pfn(SPEAR_ICM3_ML1_2_BASE),
.length = 2 * SZ_16M,
.type = MT_DEVICE
}, {
- .virtual = VA_SPEAR_ICM1_2_BASE,
+ .virtual = (unsigned long)VA_SPEAR_ICM1_2_BASE,
.pfn = __phys_to_pfn(SPEAR_ICM1_2_BASE),
.length = SZ_16M,
.type = MT_DEVICE
}, {
- .virtual = VA_SPEAR_ICM3_SMI_CTRL_BASE,
+ .virtual = (unsigned long)VA_SPEAR_ICM3_SMI_CTRL_BASE,
.pfn = __phys_to_pfn(SPEAR_ICM3_SMI_CTRL_BASE),
.length = SZ_16M,
.type = MT_DEVICE
@@ -378,7 +379,7 @@
char pclk_name[] = "pll3_clk";
struct clk *gpt_clk, *pclk;
- spear6xx_clk_init();
+ spear6xx_clk_init(MISC_BASE);
/* get the system timer clock */
gpt_clk = clk_get_sys("gpt0", NULL);
