/*
 * Device Tree Source for the r8a7740 SoC
 *
 * Copyright (C) 2012 Renesas Solutions Corp.
 *
 * This file is licensed under the terms of the GNU General Public License
 * version 2.  This program is licensed "as is" without any warranty of any
 * kind, whether express or implied.
 */

/include/ "skeleton.dtsi"

/ {
	compatible = "renesas,r8a7740";

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;
		cpu@0 {
			compatible = "arm,cortex-a9";
			device_type = "cpu";
			reg = <0x0>;
		};
	};

	gic: interrupt-controller@c2800000 {
		compatible = "arm,cortex-a9-gic";
		#interrupt-cells = <3>;
		#address-cells = <1>;
		interrupt-controller;
		reg = <0xc2800000 0x1000>,
		      <0xc2000000 0x1000>;
	};

	/* irqpin0: IRQ0 - IRQ7 */
	irqpin0: irqpin@e6900000 {
		compatible = "renesas,intc-irqpin";
		#interrupt-cells = <2>;
		interrupt-controller;
		reg = <0xe6900000 4>,
			<0xe6900010 4>,
			<0xe6900020 1>,
			<0xe6900040 1>,
			<0xe6900060 1>;
		interrupt-parent = <&gic>;
		interrupts = <0 149 0x4
			      0 149 0x4
			      0 149 0x4
			      0 149 0x4
			      0 149 0x4
			      0 149 0x4
			      0 149 0x4
			      0 149 0x4>;
	};

	/* irqpin1: IRQ8 - IRQ15 */
	irqpin1: irqpin@e6900004 {
		compatible = "renesas,intc-irqpin";
		#interrupt-cells = <2>;
		interrupt-controller;
		reg = <0xe6900004 4>,
			<0xe6900014 4>,
			<0xe6900024 1>,
			<0xe6900044 1>,
			<0xe6900064 1>;
		interrupt-parent = <&gic>;
		interrupts = <0 149 0x4
			      0 149 0x4
			      0 149 0x4
			      0 149 0x4
			      0 149 0x4
			      0 149 0x4
			      0 149 0x4
			      0 149 0x4>;
	};

	/* irqpin2: IRQ16 - IRQ23 */
	irqpin2: irqpin@e6900008 {
		compatible = "renesas,intc-irqpin";
		#interrupt-cells = <2>;
		interrupt-controller;
		reg = <0xe6900008 4>,
			<0xe6900018 4>,
			<0xe6900028 1>,
			<0xe6900048 1>,
			<0xe6900068 1>;
		interrupt-parent = <&gic>;
		interrupts = <0 149 0x4
			      0 149 0x4
			      0 149 0x4
			      0 149 0x4
			      0 149 0x4
			      0 149 0x4
			      0 149 0x4
			      0 149 0x4>;
	};

	/* irqpin3: IRQ24 - IRQ31 */
	irqpin3: irqpin@e690000c {
		compatible = "renesas,intc-irqpin";
		#interrupt-cells = <2>;
		interrupt-controller;
		reg = <0xe690000c 4>,
			<0xe690001c 4>,
			<0xe690002c 1>,
			<0xe690004c 1>,
			<0xe690006c 1>;
		interrupt-parent = <&gic>;
		interrupts = <0 149 0x4
			      0 149 0x4
			      0 149 0x4
			      0 149 0x4
			      0 149 0x4
			      0 149 0x4
			      0 149 0x4
			      0 149 0x4>;
	};

	i2c0: i2c@fff20000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "renesas,rmobile-iic";
		reg = <0xfff20000 0x425>;
		interrupt-parent = <&gic>;
		interrupts = <0 201 0x4
			      0 202 0x4
			      0 203 0x4
			      0 204 0x4>;
	};

	i2c1: i2c@e6c20000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "renesas,rmobile-iic";
		reg = <0xe6c20000 0x425>;
		interrupt-parent = <&gic>;
		interrupts = <0 70 0x4
			      0 71 0x4
			      0 72 0x4
			      0 73 0x4>;
	};
};